drm/vmwgfx: Update device includes for DX device functionality
[linux-2.6-block.git] / drivers / gpu / drm / vmwgfx / vmwgfx_kms.c
CommitLineData
fb1d9738
JB
1/**************************************************************************
2 *
c8261a96 3 * Copyright © 2009-2014 VMware, Inc., Palo Alto, CA., USA
fb1d9738
JB
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_kms.h"
29
56d1c78d 30
fb1d9738
JB
31/* Might need a hrtimer here? */
32#define VMWGFX_PRESENT_RATE ((HZ / 60 > 0) ? HZ / 60 : 1)
33
c8261a96 34void vmw_du_cleanup(struct vmw_display_unit *du)
fb1d9738
JB
35{
36 if (du->cursor_surface)
37 vmw_surface_unreference(&du->cursor_surface);
38 if (du->cursor_dmabuf)
39 vmw_dmabuf_unreference(&du->cursor_dmabuf);
34ea3d38 40 drm_connector_unregister(&du->connector);
fb1d9738
JB
41 drm_crtc_cleanup(&du->crtc);
42 drm_encoder_cleanup(&du->encoder);
43 drm_connector_cleanup(&du->connector);
44}
45
46/*
47 * Display Unit Cursor functions
48 */
49
50int vmw_cursor_update_image(struct vmw_private *dev_priv,
51 u32 *image, u32 width, u32 height,
52 u32 hotspotX, u32 hotspotY)
53{
54 struct {
55 u32 cmd;
56 SVGAFifoCmdDefineAlphaCursor cursor;
57 } *cmd;
58 u32 image_size = width * height * 4;
59 u32 cmd_size = sizeof(*cmd) + image_size;
60
61 if (!image)
62 return -EINVAL;
63
64 cmd = vmw_fifo_reserve(dev_priv, cmd_size);
65 if (unlikely(cmd == NULL)) {
66 DRM_ERROR("Fifo reserve failed.\n");
67 return -ENOMEM;
68 }
69
70 memset(cmd, 0, sizeof(*cmd));
71
72 memcpy(&cmd[1], image, image_size);
73
b9eb1a61
TH
74 cmd->cmd = SVGA_CMD_DEFINE_ALPHA_CURSOR;
75 cmd->cursor.id = 0;
76 cmd->cursor.width = width;
77 cmd->cursor.height = height;
78 cmd->cursor.hotspotX = hotspotX;
79 cmd->cursor.hotspotY = hotspotY;
fb1d9738
JB
80
81 vmw_fifo_commit(dev_priv, cmd_size);
82
83 return 0;
84}
85
6a91d97e
JB
86int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
87 struct vmw_dma_buffer *dmabuf,
88 u32 width, u32 height,
89 u32 hotspotX, u32 hotspotY)
90{
91 struct ttm_bo_kmap_obj map;
92 unsigned long kmap_offset;
93 unsigned long kmap_num;
94 void *virtual;
95 bool dummy;
96 int ret;
97
98 kmap_offset = 0;
99 kmap_num = (width*height*4 + PAGE_SIZE - 1) >> PAGE_SHIFT;
100
ee3939e0 101 ret = ttm_bo_reserve(&dmabuf->base, true, false, false, NULL);
6a91d97e
JB
102 if (unlikely(ret != 0)) {
103 DRM_ERROR("reserve failed\n");
104 return -EINVAL;
105 }
106
107 ret = ttm_bo_kmap(&dmabuf->base, kmap_offset, kmap_num, &map);
108 if (unlikely(ret != 0))
109 goto err_unreserve;
110
111 virtual = ttm_kmap_obj_virtual(&map, &dummy);
112 ret = vmw_cursor_update_image(dev_priv, virtual, width, height,
113 hotspotX, hotspotY);
114
115 ttm_bo_kunmap(&map);
116err_unreserve:
117 ttm_bo_unreserve(&dmabuf->base);
118
119 return ret;
120}
121
122
fb1d9738
JB
123void vmw_cursor_update_position(struct vmw_private *dev_priv,
124 bool show, int x, int y)
125{
b9eb1a61 126 u32 __iomem *fifo_mem = dev_priv->mmio_virt;
fb1d9738
JB
127 uint32_t count;
128
129 iowrite32(show ? 1 : 0, fifo_mem + SVGA_FIFO_CURSOR_ON);
130 iowrite32(x, fifo_mem + SVGA_FIFO_CURSOR_X);
131 iowrite32(y, fifo_mem + SVGA_FIFO_CURSOR_Y);
132 count = ioread32(fifo_mem + SVGA_FIFO_CURSOR_COUNT);
133 iowrite32(++count, fifo_mem + SVGA_FIFO_CURSOR_COUNT);
134}
135
136int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv,
137 uint32_t handle, uint32_t width, uint32_t height)
138{
139 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
fb1d9738
JB
140 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
141 struct vmw_surface *surface = NULL;
142 struct vmw_dma_buffer *dmabuf = NULL;
143 int ret;
144
bfb89928
DV
145 /*
146 * FIXME: Unclear whether there's any global state touched by the
147 * cursor_set function, especially vmw_cursor_update_position looks
148 * suspicious. For now take the easy route and reacquire all locks. We
149 * can do this since the caller in the drm core doesn't check anything
150 * which is protected by any looks.
151 */
21e88620 152 drm_modeset_unlock_crtc(crtc);
bfb89928
DV
153 drm_modeset_lock_all(dev_priv->dev);
154
baa91d64 155 /* A lot of the code assumes this */
bfb89928
DV
156 if (handle && (width != 64 || height != 64)) {
157 ret = -EINVAL;
158 goto out;
159 }
baa91d64 160
fb1d9738 161 if (handle) {
a5d0f576
VS
162 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
163
e7ac9211
JB
164 ret = vmw_user_lookup_handle(dev_priv, tfile,
165 handle, &surface, &dmabuf);
166 if (ret) {
167 DRM_ERROR("failed to find surface or dmabuf: %i\n", ret);
bfb89928
DV
168 ret = -EINVAL;
169 goto out;
fb1d9738
JB
170 }
171 }
172
e7ac9211
JB
173 /* need to do this before taking down old image */
174 if (surface && !surface->snooper.image) {
175 DRM_ERROR("surface not suitable for cursor\n");
176 vmw_surface_unreference(&surface);
bfb89928
DV
177 ret = -EINVAL;
178 goto out;
e7ac9211
JB
179 }
180
fb1d9738
JB
181 /* takedown old cursor */
182 if (du->cursor_surface) {
183 du->cursor_surface->snooper.crtc = NULL;
184 vmw_surface_unreference(&du->cursor_surface);
185 }
186 if (du->cursor_dmabuf)
187 vmw_dmabuf_unreference(&du->cursor_dmabuf);
188
189 /* setup new image */
190 if (surface) {
191 /* vmw_user_surface_lookup takes one reference */
192 du->cursor_surface = surface;
193
194 du->cursor_surface->snooper.crtc = crtc;
195 du->cursor_age = du->cursor_surface->snooper.age;
196 vmw_cursor_update_image(dev_priv, surface->snooper.image,
197 64, 64, du->hotspot_x, du->hotspot_y);
198 } else if (dmabuf) {
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JB
199 /* vmw_user_surface_lookup takes one reference */
200 du->cursor_dmabuf = dmabuf;
201
6a91d97e
JB
202 ret = vmw_cursor_update_dmabuf(dev_priv, dmabuf, width, height,
203 du->hotspot_x, du->hotspot_y);
fb1d9738
JB
204 } else {
205 vmw_cursor_update_position(dev_priv, false, 0, 0);
bfb89928
DV
206 ret = 0;
207 goto out;
fb1d9738
JB
208 }
209
da7653d6
TH
210 vmw_cursor_update_position(dev_priv, true,
211 du->cursor_x + du->hotspot_x,
212 du->cursor_y + du->hotspot_y);
fb1d9738 213
bfb89928
DV
214 ret = 0;
215out:
216 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 217 drm_modeset_lock_crtc(crtc, crtc->cursor);
bfb89928
DV
218
219 return ret;
fb1d9738
JB
220}
221
222int vmw_du_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
223{
224 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
225 struct vmw_display_unit *du = vmw_crtc_to_du(crtc);
226 bool shown = du->cursor_surface || du->cursor_dmabuf ? true : false;
227
228 du->cursor_x = x + crtc->x;
229 du->cursor_y = y + crtc->y;
230
dac35663
DV
231 /*
232 * FIXME: Unclear whether there's any global state touched by the
233 * cursor_set function, especially vmw_cursor_update_position looks
234 * suspicious. For now take the easy route and reacquire all locks. We
235 * can do this since the caller in the drm core doesn't check anything
236 * which is protected by any looks.
237 */
21e88620 238 drm_modeset_unlock_crtc(crtc);
dac35663
DV
239 drm_modeset_lock_all(dev_priv->dev);
240
fb1d9738 241 vmw_cursor_update_position(dev_priv, shown,
da7653d6
TH
242 du->cursor_x + du->hotspot_x,
243 du->cursor_y + du->hotspot_y);
fb1d9738 244
dac35663 245 drm_modeset_unlock_all(dev_priv->dev);
4d02e2de 246 drm_modeset_lock_crtc(crtc, crtc->cursor);
dac35663 247
fb1d9738
JB
248 return 0;
249}
250
251void vmw_kms_cursor_snoop(struct vmw_surface *srf,
252 struct ttm_object_file *tfile,
253 struct ttm_buffer_object *bo,
254 SVGA3dCmdHeader *header)
255{
256 struct ttm_bo_kmap_obj map;
257 unsigned long kmap_offset;
258 unsigned long kmap_num;
259 SVGA3dCopyBox *box;
260 unsigned box_count;
261 void *virtual;
262 bool dummy;
263 struct vmw_dma_cmd {
264 SVGA3dCmdHeader header;
265 SVGA3dCmdSurfaceDMA dma;
266 } *cmd;
2ac86371 267 int i, ret;
fb1d9738
JB
268
269 cmd = container_of(header, struct vmw_dma_cmd, header);
270
271 /* No snooper installed */
272 if (!srf->snooper.image)
273 return;
274
275 if (cmd->dma.host.face != 0 || cmd->dma.host.mipmap != 0) {
276 DRM_ERROR("face and mipmap for cursors should never != 0\n");
277 return;
278 }
279
280 if (cmd->header.size < 64) {
281 DRM_ERROR("at least one full copy box must be given\n");
282 return;
283 }
284
285 box = (SVGA3dCopyBox *)&cmd[1];
286 box_count = (cmd->header.size - sizeof(SVGA3dCmdSurfaceDMA)) /
287 sizeof(SVGA3dCopyBox);
288
2ac86371 289 if (cmd->dma.guest.ptr.offset % PAGE_SIZE ||
fb1d9738
JB
290 box->x != 0 || box->y != 0 || box->z != 0 ||
291 box->srcx != 0 || box->srcy != 0 || box->srcz != 0 ||
2ac86371 292 box->d != 1 || box_count != 1) {
fb1d9738 293 /* TODO handle none page aligned offsets */
2ac86371
JB
294 /* TODO handle more dst & src != 0 */
295 /* TODO handle more then one copy */
296 DRM_ERROR("Cant snoop dma request for cursor!\n");
297 DRM_ERROR("(%u, %u, %u) (%u, %u, %u) (%ux%ux%u) %u %u\n",
298 box->srcx, box->srcy, box->srcz,
299 box->x, box->y, box->z,
300 box->w, box->h, box->d, box_count,
301 cmd->dma.guest.ptr.offset);
fb1d9738
JB
302 return;
303 }
304
305 kmap_offset = cmd->dma.guest.ptr.offset >> PAGE_SHIFT;
306 kmap_num = (64*64*4) >> PAGE_SHIFT;
307
ee3939e0 308 ret = ttm_bo_reserve(bo, true, false, false, NULL);
fb1d9738
JB
309 if (unlikely(ret != 0)) {
310 DRM_ERROR("reserve failed\n");
311 return;
312 }
313
314 ret = ttm_bo_kmap(bo, kmap_offset, kmap_num, &map);
315 if (unlikely(ret != 0))
316 goto err_unreserve;
317
318 virtual = ttm_kmap_obj_virtual(&map, &dummy);
319
2ac86371
JB
320 if (box->w == 64 && cmd->dma.guest.pitch == 64*4) {
321 memcpy(srf->snooper.image, virtual, 64*64*4);
322 } else {
323 /* Image is unsigned pointer. */
324 for (i = 0; i < box->h; i++)
325 memcpy(srf->snooper.image + i * 64,
326 virtual + i * cmd->dma.guest.pitch,
327 box->w * 4);
328 }
329
fb1d9738
JB
330 srf->snooper.age++;
331
fb1d9738
JB
332 ttm_bo_kunmap(&map);
333err_unreserve:
334 ttm_bo_unreserve(bo);
335}
336
337void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv)
338{
339 struct drm_device *dev = dev_priv->dev;
340 struct vmw_display_unit *du;
341 struct drm_crtc *crtc;
342
343 mutex_lock(&dev->mode_config.mutex);
344
345 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
346 du = vmw_crtc_to_du(crtc);
347 if (!du->cursor_surface ||
348 du->cursor_age == du->cursor_surface->snooper.age)
349 continue;
350
351 du->cursor_age = du->cursor_surface->snooper.age;
352 vmw_cursor_update_image(dev_priv,
353 du->cursor_surface->snooper.image,
354 64, 64, du->hotspot_x, du->hotspot_y);
355 }
356
357 mutex_unlock(&dev->mode_config.mutex);
358}
359
360/*
361 * Generic framebuffer code
362 */
363
fb1d9738
JB
364/*
365 * Surface framebuffer code
366 */
367
847c5964 368static void vmw_framebuffer_surface_destroy(struct drm_framebuffer *framebuffer)
fb1d9738 369{
3a939a5e 370 struct vmw_framebuffer_surface *vfbs =
fb1d9738 371 vmw_framebuffer_to_vfbs(framebuffer);
3a939a5e 372
fb1d9738 373 drm_framebuffer_cleanup(framebuffer);
3a939a5e 374 vmw_surface_unreference(&vfbs->surface);
a278724a
TH
375 if (vfbs->base.user_obj)
376 ttm_base_object_unref(&vfbs->base.user_obj);
fb1d9738 377
3a939a5e 378 kfree(vfbs);
fb1d9738
JB
379}
380
847c5964 381static int vmw_framebuffer_surface_dirty(struct drm_framebuffer *framebuffer,
02b00162 382 struct drm_file *file_priv,
fb1d9738
JB
383 unsigned flags, unsigned color,
384 struct drm_clip_rect *clips,
385 unsigned num_clips)
386{
387 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
388 struct vmw_framebuffer_surface *vfbs =
389 vmw_framebuffer_to_vfbs(framebuffer);
fb1d9738 390 struct drm_clip_rect norect;
5deb65cf 391 int ret, inc = 1;
fb1d9738 392
c8261a96
SY
393 /* Legacy Display Unit does not support 3D */
394 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB
395 return -EINVAL;
396
73e9efd4
VS
397 drm_modeset_lock_all(dev_priv->dev);
398
294adf7d 399 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS
400 if (unlikely(ret != 0)) {
401 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 402 return ret;
73e9efd4 403 }
3a939a5e 404
fb1d9738
JB
405 if (!num_clips) {
406 num_clips = 1;
407 clips = &norect;
408 norect.x1 = norect.y1 = 0;
409 norect.x2 = framebuffer->width;
410 norect.y2 = framebuffer->height;
411 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
412 num_clips /= 2;
413 inc = 2; /* skip source rects */
414 }
415
c8261a96 416 if (dev_priv->active_display_unit == vmw_du_screen_object)
10b1e0ca
TH
417 ret = vmw_kms_sou_do_surface_dirty(dev_priv, &vfbs->base,
418 clips, NULL, NULL, 0, 0,
419 num_clips, inc, NULL);
35c05125 420 else
6bf6bf03
TH
421 ret = vmw_kms_stdu_surface_dirty(dev_priv, &vfbs->base,
422 clips, NULL, NULL, 0, 0,
423 num_clips, inc, NULL);
fb1d9738 424
3eab3d9e 425 vmw_fifo_flush(dev_priv, false);
294adf7d 426 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS
427
428 drm_modeset_unlock_all(dev_priv->dev);
429
fb1d9738
JB
430 return 0;
431}
432
10b1e0ca
TH
433/**
434 * vmw_kms_readback - Perform a readback from the screen system to
435 * a dma-buffer backed framebuffer.
436 *
437 * @dev_priv: Pointer to the device private structure.
438 * @file_priv: Pointer to a struct drm_file identifying the caller.
439 * Must be set to NULL if @user_fence_rep is NULL.
440 * @vfb: Pointer to the dma-buffer backed framebuffer.
441 * @user_fence_rep: User-space provided structure for fence information.
442 * Must be set to non-NULL if @file_priv is non-NULL.
443 * @vclips: Array of clip rects.
444 * @num_clips: Number of clip rects in @vclips.
445 *
446 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
447 * interrupted.
448 */
449int vmw_kms_readback(struct vmw_private *dev_priv,
450 struct drm_file *file_priv,
451 struct vmw_framebuffer *vfb,
452 struct drm_vmw_fence_rep __user *user_fence_rep,
453 struct drm_vmw_rect *vclips,
454 uint32_t num_clips)
455{
456 switch (dev_priv->active_display_unit) {
457 case vmw_du_screen_object:
458 return vmw_kms_sou_readback(dev_priv, file_priv, vfb,
459 user_fence_rep, vclips, num_clips);
6bf6bf03
TH
460 case vmw_du_screen_target:
461 return vmw_kms_stdu_dma(dev_priv, file_priv, vfb,
462 user_fence_rep, NULL, vclips, num_clips,
463 1, false, true);
10b1e0ca
TH
464 default:
465 WARN_ONCE(true,
466 "Readback called with invalid display system.\n");
6bf6bf03 467}
10b1e0ca
TH
468
469 return -ENOSYS;
470}
471
472
fb1d9738
JB
473static struct drm_framebuffer_funcs vmw_framebuffer_surface_funcs = {
474 .destroy = vmw_framebuffer_surface_destroy,
475 .dirty = vmw_framebuffer_surface_dirty,
fb1d9738
JB
476};
477
d3216a0c
TH
478static int vmw_kms_new_framebuffer_surface(struct vmw_private *dev_priv,
479 struct vmw_surface *surface,
480 struct vmw_framebuffer **out,
481 const struct drm_mode_fb_cmd
f89c6c32
SY
482 *mode_cmd,
483 bool is_dmabuf_proxy)
fb1d9738
JB
484
485{
486 struct drm_device *dev = dev_priv->dev;
487 struct vmw_framebuffer_surface *vfbs;
d3216a0c 488 enum SVGA3dSurfaceFormat format;
fb1d9738
JB
489 int ret;
490
c8261a96
SY
491 /* 3D is only supported on HWv8 and newer hosts */
492 if (dev_priv->active_display_unit == vmw_du_legacy)
01e81419
JB
493 return -ENOSYS;
494
d3216a0c
TH
495 /*
496 * Sanity checks.
497 */
498
e7ac9211
JB
499 /* Surface must be marked as a scanout. */
500 if (unlikely(!surface->scanout))
501 return -EINVAL;
502
d3216a0c
TH
503 if (unlikely(surface->mip_levels[0] != 1 ||
504 surface->num_sizes != 1 ||
b360a3ce
TH
505 surface->base_size.width < mode_cmd->width ||
506 surface->base_size.height < mode_cmd->height ||
507 surface->base_size.depth != 1)) {
d3216a0c
TH
508 DRM_ERROR("Incompatible surface dimensions "
509 "for requested mode.\n");
510 return -EINVAL;
511 }
512
513 switch (mode_cmd->depth) {
514 case 32:
515 format = SVGA3D_A8R8G8B8;
516 break;
517 case 24:
518 format = SVGA3D_X8R8G8B8;
519 break;
520 case 16:
521 format = SVGA3D_R5G6B5;
522 break;
523 case 15:
524 format = SVGA3D_A1R5G5B5;
525 break;
526 default:
527 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
528 return -EINVAL;
529 }
530
531 if (unlikely(format != surface->format)) {
532 DRM_ERROR("Invalid surface format for requested mode.\n");
533 return -EINVAL;
534 }
535
fb1d9738
JB
536 vfbs = kzalloc(sizeof(*vfbs), GFP_KERNEL);
537 if (!vfbs) {
538 ret = -ENOMEM;
539 goto out_err1;
540 }
541
fb1d9738 542 /* XXX get the first 3 from the surface info */
d3216a0c 543 vfbs->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 544 vfbs->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH
545 vfbs->base.base.depth = mode_cmd->depth;
546 vfbs->base.base.width = mode_cmd->width;
547 vfbs->base.base.height = mode_cmd->height;
05c95018 548 vfbs->surface = vmw_surface_reference(surface);
90ff18bc 549 vfbs->base.user_handle = mode_cmd->handle;
f89c6c32 550 vfbs->is_dmabuf_proxy = is_dmabuf_proxy;
3a939a5e 551
fb1d9738
JB
552 *out = &vfbs->base;
553
80f0b5af
DV
554 ret = drm_framebuffer_init(dev, &vfbs->base.base,
555 &vmw_framebuffer_surface_funcs);
556 if (ret)
05c95018 557 goto out_err2;
80f0b5af 558
fb1d9738
JB
559 return 0;
560
fb1d9738 561out_err2:
05c95018 562 vmw_surface_unreference(&surface);
fb1d9738
JB
563 kfree(vfbs);
564out_err1:
565 return ret;
566}
567
568/*
569 * Dmabuf framebuffer code
570 */
571
847c5964 572static void vmw_framebuffer_dmabuf_destroy(struct drm_framebuffer *framebuffer)
fb1d9738
JB
573{
574 struct vmw_framebuffer_dmabuf *vfbd =
575 vmw_framebuffer_to_vfbd(framebuffer);
576
577 drm_framebuffer_cleanup(framebuffer);
578 vmw_dmabuf_unreference(&vfbd->buffer);
a278724a
TH
579 if (vfbd->base.user_obj)
580 ttm_base_object_unref(&vfbd->base.user_obj);
fb1d9738
JB
581
582 kfree(vfbd);
583}
584
847c5964 585static int vmw_framebuffer_dmabuf_dirty(struct drm_framebuffer *framebuffer,
02b00162 586 struct drm_file *file_priv,
fb1d9738
JB
587 unsigned flags, unsigned color,
588 struct drm_clip_rect *clips,
589 unsigned num_clips)
590{
591 struct vmw_private *dev_priv = vmw_priv(framebuffer->dev);
5deb65cf
JB
592 struct vmw_framebuffer_dmabuf *vfbd =
593 vmw_framebuffer_to_vfbd(framebuffer);
fb1d9738 594 struct drm_clip_rect norect;
5deb65cf 595 int ret, increment = 1;
fb1d9738 596
73e9efd4
VS
597 drm_modeset_lock_all(dev_priv->dev);
598
294adf7d 599 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
73e9efd4
VS
600 if (unlikely(ret != 0)) {
601 drm_modeset_unlock_all(dev_priv->dev);
3a939a5e 602 return ret;
73e9efd4 603 }
3a939a5e 604
df1c93ba 605 if (!num_clips) {
fb1d9738
JB
606 num_clips = 1;
607 clips = &norect;
608 norect.x1 = norect.y1 = 0;
609 norect.x2 = framebuffer->width;
610 norect.y2 = framebuffer->height;
611 } else if (flags & DRM_MODE_FB_DIRTY_ANNOTATE_COPY) {
612 num_clips /= 2;
613 increment = 2;
614 }
615
6bf6bf03
TH
616 switch (dev_priv->active_display_unit) {
617 case vmw_du_screen_target:
618 ret = vmw_kms_stdu_dma(dev_priv, NULL, &vfbd->base, NULL,
619 clips, NULL, num_clips, increment,
620 true, true);
621 break;
622 case vmw_du_screen_object:
10b1e0ca 623 ret = vmw_kms_sou_do_dmabuf_dirty(dev_priv, &vfbd->base,
c8261a96 624 clips, num_clips, increment,
10b1e0ca 625 true,
c8261a96 626 NULL);
6bf6bf03 627 break;
352b20dc
TH
628 case vmw_du_legacy:
629 ret = vmw_kms_ldu_do_dmabuf_dirty(dev_priv, &vfbd->base, 0, 0,
630 clips, num_clips, increment);
631 break;
6bf6bf03 632 default:
352b20dc
TH
633 ret = -EINVAL;
634 WARN_ONCE(true, "Dirty called with invalid display system.\n");
6bf6bf03 635 break;
56d1c78d 636 }
fb1d9738 637
3eab3d9e 638 vmw_fifo_flush(dev_priv, false);
294adf7d 639 ttm_read_unlock(&dev_priv->reservation_sem);
73e9efd4
VS
640
641 drm_modeset_unlock_all(dev_priv->dev);
642
5deb65cf 643 return ret;
fb1d9738
JB
644}
645
646static struct drm_framebuffer_funcs vmw_framebuffer_dmabuf_funcs = {
647 .destroy = vmw_framebuffer_dmabuf_destroy,
648 .dirty = vmw_framebuffer_dmabuf_dirty,
fb1d9738
JB
649};
650
497a3ff9
JB
651/**
652 * Pin the dmabuffer to the start of vram.
653 */
fd006a43 654static int vmw_framebuffer_pin(struct vmw_framebuffer *vfb)
fb1d9738
JB
655{
656 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
fd006a43 657 struct vmw_dma_buffer *buf;
fb1d9738
JB
658 int ret;
659
fd006a43
TH
660 buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
661 vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
fb1d9738 662
fd006a43
TH
663 if (!buf)
664 return 0;
fb1d9738 665
fd006a43
TH
666 switch (dev_priv->active_display_unit) {
667 case vmw_du_legacy:
668 vmw_overlay_pause_all(dev_priv);
669 ret = vmw_dmabuf_pin_in_start_of_vram(dev_priv, buf, false);
670 vmw_overlay_resume_all(dev_priv);
671 break;
672 case vmw_du_screen_object:
673 case vmw_du_screen_target:
674 if (vfb->dmabuf)
675 return vmw_dmabuf_pin_in_vram_or_gmr(dev_priv, buf,
676 false);
fb1d9738 677
fd006a43
TH
678 return vmw_dmabuf_pin_in_placement(dev_priv, buf,
679 &vmw_mob_placement, false);
680 default:
681 return -EINVAL;
682 }
316ab13a 683
fd006a43 684 return ret;
fb1d9738
JB
685}
686
fd006a43 687static int vmw_framebuffer_unpin(struct vmw_framebuffer *vfb)
fb1d9738
JB
688{
689 struct vmw_private *dev_priv = vmw_priv(vfb->base.dev);
fd006a43 690 struct vmw_dma_buffer *buf;
fb1d9738 691
fd006a43
TH
692 buf = vfb->dmabuf ? vmw_framebuffer_to_vfbd(&vfb->base)->buffer :
693 vmw_framebuffer_to_vfbs(&vfb->base)->surface->res.backup;
694
695 if (WARN_ON(!buf))
fb1d9738 696 return 0;
fb1d9738 697
fd006a43 698 return vmw_dmabuf_unpin(dev_priv, buf, false);
fb1d9738
JB
699}
700
f89c6c32
SY
701/**
702 * vmw_create_dmabuf_proxy - create a proxy surface for the DMA buf
703 *
704 * @dev: DRM device
705 * @mode_cmd: parameters for the new surface
706 * @dmabuf_mob: MOB backing the DMA buf
707 * @srf_out: newly created surface
708 *
709 * When the content FB is a DMA buf, we create a surface as a proxy to the
710 * same buffer. This way we can do a surface copy rather than a surface DMA.
711 * This is a more efficient approach
712 *
713 * RETURNS:
714 * 0 on success, error code otherwise
715 */
716static int vmw_create_dmabuf_proxy(struct drm_device *dev,
fd006a43 717 const struct drm_mode_fb_cmd *mode_cmd,
f89c6c32
SY
718 struct vmw_dma_buffer *dmabuf_mob,
719 struct vmw_surface **srf_out)
720{
721 uint32_t format;
722 struct drm_vmw_size content_base_size;
6bf6bf03 723 struct vmw_resource *res;
f89c6c32
SY
724 int ret;
725
f89c6c32
SY
726 switch (mode_cmd->depth) {
727 case 32:
728 case 24:
729 format = SVGA3D_X8R8G8B8;
730 break;
731
732 case 16:
733 case 15:
734 format = SVGA3D_R5G6B5;
735 break;
736
737 case 8:
738 format = SVGA3D_P8;
739 break;
740
741 default:
742 DRM_ERROR("Invalid framebuffer format %d\n", mode_cmd->depth);
743 return -EINVAL;
744 }
745
746 content_base_size.width = mode_cmd->width;
747 content_base_size.height = mode_cmd->height;
748 content_base_size.depth = 1;
749
750 ret = vmw_surface_gb_priv_define(dev,
751 0, /* kernel visible only */
752 0, /* flags */
753 format,
754 true, /* can be a scanout buffer */
755 1, /* num of mip levels */
756 0,
757 content_base_size,
758 srf_out);
759 if (ret) {
760 DRM_ERROR("Failed to allocate proxy content buffer\n");
761 return ret;
762 }
763
6bf6bf03 764 res = &(*srf_out)->res;
f89c6c32 765
6bf6bf03
TH
766 /* Reserve and switch the backing mob. */
767 mutex_lock(&res->dev_priv->cmdbuf_mutex);
768 (void) vmw_resource_reserve(res, false, true);
769 vmw_dmabuf_unreference(&res->backup);
770 res->backup = vmw_dmabuf_reference(dmabuf_mob);
771 res->backup_offset = 0;
772 vmw_resource_unreserve(res, NULL, 0);
773 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
f89c6c32 774
6bf6bf03 775 return 0;
f89c6c32
SY
776}
777
778
779
d3216a0c
TH
780static int vmw_kms_new_framebuffer_dmabuf(struct vmw_private *dev_priv,
781 struct vmw_dma_buffer *dmabuf,
782 struct vmw_framebuffer **out,
783 const struct drm_mode_fb_cmd
784 *mode_cmd)
fb1d9738
JB
785
786{
787 struct drm_device *dev = dev_priv->dev;
788 struct vmw_framebuffer_dmabuf *vfbd;
d3216a0c 789 unsigned int requested_size;
fb1d9738
JB
790 int ret;
791
d3216a0c
TH
792 requested_size = mode_cmd->height * mode_cmd->pitch;
793 if (unlikely(requested_size > dmabuf->base.num_pages * PAGE_SIZE)) {
794 DRM_ERROR("Screen buffer object size is too small "
795 "for requested mode.\n");
796 return -EINVAL;
797 }
798
c337ada7 799 /* Limited framebuffer color depth support for screen objects */
c8261a96 800 if (dev_priv->active_display_unit == vmw_du_screen_object) {
c337ada7
JB
801 switch (mode_cmd->depth) {
802 case 32:
803 case 24:
804 /* Only support 32 bpp for 32 and 24 depth fbs */
805 if (mode_cmd->bpp == 32)
806 break;
807
808 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
809 mode_cmd->depth, mode_cmd->bpp);
810 return -EINVAL;
811 case 16:
812 case 15:
813 /* Only support 16 bpp for 16 and 15 depth fbs */
814 if (mode_cmd->bpp == 16)
815 break;
816
817 DRM_ERROR("Invalid color depth/bbp: %d %d\n",
818 mode_cmd->depth, mode_cmd->bpp);
819 return -EINVAL;
820 default:
821 DRM_ERROR("Invalid color depth: %d\n", mode_cmd->depth);
822 return -EINVAL;
823 }
824 }
825
fb1d9738
JB
826 vfbd = kzalloc(sizeof(*vfbd), GFP_KERNEL);
827 if (!vfbd) {
828 ret = -ENOMEM;
829 goto out_err1;
830 }
831
d3216a0c 832 vfbd->base.base.bits_per_pixel = mode_cmd->bpp;
01f2c773 833 vfbd->base.base.pitches[0] = mode_cmd->pitch;
d3216a0c
TH
834 vfbd->base.base.depth = mode_cmd->depth;
835 vfbd->base.base.width = mode_cmd->width;
836 vfbd->base.base.height = mode_cmd->height;
2fcd5a73 837 vfbd->base.dmabuf = true;
05c95018 838 vfbd->buffer = vmw_dmabuf_reference(dmabuf);
90ff18bc 839 vfbd->base.user_handle = mode_cmd->handle;
fb1d9738
JB
840 *out = &vfbd->base;
841
80f0b5af
DV
842 ret = drm_framebuffer_init(dev, &vfbd->base.base,
843 &vmw_framebuffer_dmabuf_funcs);
844 if (ret)
05c95018 845 goto out_err2;
80f0b5af 846
fb1d9738
JB
847 return 0;
848
fb1d9738 849out_err2:
05c95018 850 vmw_dmabuf_unreference(&dmabuf);
fb1d9738
JB
851 kfree(vfbd);
852out_err1:
853 return ret;
854}
855
fd006a43
TH
856/**
857 * vmw_kms_new_framebuffer - Create a new framebuffer.
858 *
859 * @dev_priv: Pointer to device private struct.
860 * @dmabuf: Pointer to dma buffer to wrap the kms framebuffer around.
861 * Either @dmabuf or @surface must be NULL.
862 * @surface: Pointer to a surface to wrap the kms framebuffer around.
863 * Either @dmabuf or @surface must be NULL.
864 * @only_2d: No presents will occur to this dma buffer based framebuffer. This
865 * Helps the code to do some important optimizations.
866 * @mode_cmd: Frame-buffer metadata.
867 */
868struct vmw_framebuffer *
869vmw_kms_new_framebuffer(struct vmw_private *dev_priv,
870 struct vmw_dma_buffer *dmabuf,
871 struct vmw_surface *surface,
872 bool only_2d,
873 const struct drm_mode_fb_cmd *mode_cmd)
874{
05c95018 875 struct vmw_framebuffer *vfb = NULL;
fd006a43
TH
876 bool is_dmabuf_proxy = false;
877 int ret;
878
879 /*
880 * We cannot use the SurfaceDMA command in an non-accelerated VM,
881 * therefore, wrap the DMA buf in a surface so we can use the
882 * SurfaceCopy command.
883 */
884 if (dmabuf && only_2d &&
885 dev_priv->active_display_unit == vmw_du_screen_target) {
886 ret = vmw_create_dmabuf_proxy(dev_priv->dev, mode_cmd,
887 dmabuf, &surface);
888 if (ret)
889 return ERR_PTR(ret);
890
891 is_dmabuf_proxy = true;
892 }
893
894 /* Create the new framebuffer depending one what we have */
05c95018 895 if (surface) {
fd006a43
TH
896 ret = vmw_kms_new_framebuffer_surface(dev_priv, surface, &vfb,
897 mode_cmd,
898 is_dmabuf_proxy);
05c95018
SY
899
900 /*
901 * vmw_create_dmabuf_proxy() adds a reference that is no longer
902 * needed
903 */
904 if (is_dmabuf_proxy)
905 vmw_surface_unreference(&surface);
906 } else if (dmabuf) {
fd006a43
TH
907 ret = vmw_kms_new_framebuffer_dmabuf(dev_priv, dmabuf, &vfb,
908 mode_cmd);
05c95018 909 } else {
fd006a43 910 BUG();
05c95018 911 }
fd006a43
TH
912
913 if (ret)
914 return ERR_PTR(ret);
915
916 vfb->pin = vmw_framebuffer_pin;
917 vfb->unpin = vmw_framebuffer_unpin;
918
919 return vfb;
920}
921
fb1d9738
JB
922/*
923 * Generic Kernel modesetting functions
924 */
925
926static struct drm_framebuffer *vmw_kms_fb_create(struct drm_device *dev,
927 struct drm_file *file_priv,
308e5bcb 928 struct drm_mode_fb_cmd2 *mode_cmd2)
fb1d9738
JB
929{
930 struct vmw_private *dev_priv = vmw_priv(dev);
931 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
932 struct vmw_framebuffer *vfb = NULL;
933 struct vmw_surface *surface = NULL;
934 struct vmw_dma_buffer *bo = NULL;
90ff18bc 935 struct ttm_base_object *user_obj;
308e5bcb 936 struct drm_mode_fb_cmd mode_cmd;
fb1d9738
JB
937 int ret;
938
308e5bcb
JB
939 mode_cmd.width = mode_cmd2->width;
940 mode_cmd.height = mode_cmd2->height;
941 mode_cmd.pitch = mode_cmd2->pitches[0];
942 mode_cmd.handle = mode_cmd2->handles[0];
248dbc23 943 drm_fb_get_bpp_depth(mode_cmd2->pixel_format, &mode_cmd.depth,
308e5bcb
JB
944 &mode_cmd.bpp);
945
d3216a0c
TH
946 /**
947 * This code should be conditioned on Screen Objects not being used.
948 * If screen objects are used, we can allocate a GMR to hold the
949 * requested framebuffer.
950 */
951
8a783896 952 if (!vmw_kms_validate_mode_vram(dev_priv,
1a464cbb
LT
953 mode_cmd.pitch,
954 mode_cmd.height)) {
c8261a96 955 DRM_ERROR("Requested mode exceed bounding box limit.\n");
d9826409 956 return ERR_PTR(-ENOMEM);
d3216a0c
TH
957 }
958
90ff18bc
TH
959 /*
960 * Take a reference on the user object of the resource
961 * backing the kms fb. This ensures that user-space handle
962 * lookups on that resource will always work as long as
963 * it's registered with a kms framebuffer. This is important,
964 * since vmw_execbuf_process identifies resources in the
965 * command stream using user-space handles.
966 */
967
308e5bcb 968 user_obj = ttm_base_object_lookup(tfile, mode_cmd.handle);
90ff18bc
TH
969 if (unlikely(user_obj == NULL)) {
970 DRM_ERROR("Could not locate requested kms frame buffer.\n");
971 return ERR_PTR(-ENOENT);
972 }
973
d3216a0c
TH
974 /**
975 * End conditioned code.
976 */
977
e7ac9211
JB
978 /* returns either a dmabuf or surface */
979 ret = vmw_user_lookup_handle(dev_priv, tfile,
4cf73129 980 mode_cmd.handle,
e7ac9211 981 &surface, &bo);
fb1d9738 982 if (ret)
e7ac9211
JB
983 goto err_out;
984
fd006a43
TH
985 vfb = vmw_kms_new_framebuffer(dev_priv, bo, surface,
986 !(dev_priv->capabilities & SVGA_CAP_3D),
987 &mode_cmd);
988 if (IS_ERR(vfb)) {
989 ret = PTR_ERR(vfb);
990 goto err_out;
991 }
e7ac9211
JB
992
993err_out:
994 /* vmw_user_lookup_handle takes one ref so does new_fb */
995 if (bo)
996 vmw_dmabuf_unreference(&bo);
997 if (surface)
998 vmw_surface_unreference(&surface);
fb1d9738
JB
999
1000 if (ret) {
1001 DRM_ERROR("failed to create vmw_framebuffer: %i\n", ret);
90ff18bc 1002 ttm_base_object_unref(&user_obj);
cce13ff7 1003 return ERR_PTR(ret);
90ff18bc
TH
1004 } else
1005 vfb->user_obj = user_obj;
fb1d9738
JB
1006
1007 return &vfb->base;
1008}
1009
e6ecefaa 1010static const struct drm_mode_config_funcs vmw_kms_funcs = {
fb1d9738 1011 .fb_create = vmw_kms_fb_create,
fb1d9738
JB
1012};
1013
b9eb1a61
TH
1014static int vmw_kms_generic_present(struct vmw_private *dev_priv,
1015 struct drm_file *file_priv,
1016 struct vmw_framebuffer *vfb,
1017 struct vmw_surface *surface,
1018 uint32_t sid,
1019 int32_t destX, int32_t destY,
1020 struct drm_vmw_rect *clips,
1021 uint32_t num_clips)
2fcd5a73 1022{
10b1e0ca
TH
1023 return vmw_kms_sou_do_surface_dirty(dev_priv, vfb, NULL, clips,
1024 &surface->res, destX, destY,
1025 num_clips, 1, NULL);
2fcd5a73
JB
1026}
1027
6bf6bf03 1028
c8261a96
SY
1029int vmw_kms_present(struct vmw_private *dev_priv,
1030 struct drm_file *file_priv,
1031 struct vmw_framebuffer *vfb,
1032 struct vmw_surface *surface,
1033 uint32_t sid,
1034 int32_t destX, int32_t destY,
1035 struct drm_vmw_rect *clips,
1036 uint32_t num_clips)
1037{
35c05125
SY
1038 int ret;
1039
6bf6bf03
TH
1040 switch (dev_priv->active_display_unit) {
1041 case vmw_du_screen_target:
1042 ret = vmw_kms_stdu_surface_dirty(dev_priv, vfb, NULL, clips,
1043 &surface->res, destX, destY,
1044 num_clips, 1, NULL);
1045 break;
1046 case vmw_du_screen_object:
1047 ret = vmw_kms_generic_present(dev_priv, file_priv, vfb, surface,
1048 sid, destX, destY, clips,
1049 num_clips);
1050 break;
1051 default:
1052 WARN_ONCE(true,
1053 "Present called with invalid display system.\n");
1054 ret = -ENOSYS;
1055 break;
1056 }
35c05125
SY
1057 if (ret)
1058 return ret;
1059
1060 vmw_fifo_flush(dev_priv, false);
1061
1062 return 0;
c8261a96
SY
1063}
1064
fb1d9738
JB
1065int vmw_kms_init(struct vmw_private *dev_priv)
1066{
1067 struct drm_device *dev = dev_priv->dev;
1068 int ret;
1069
1070 drm_mode_config_init(dev);
1071 dev->mode_config.funcs = &vmw_kms_funcs;
3bef3572
JB
1072 dev->mode_config.min_width = 1;
1073 dev->mode_config.min_height = 1;
65ade7d3
SY
1074 dev->mode_config.max_width = dev_priv->texture_max_width;
1075 dev->mode_config.max_height = dev_priv->texture_max_height;
fb1d9738 1076
35c05125
SY
1077 ret = vmw_kms_stdu_init_display(dev_priv);
1078 if (ret) {
1079 ret = vmw_kms_sou_init_display(dev_priv);
1080 if (ret) /* Fallback */
1081 ret = vmw_kms_ldu_init_display(dev_priv);
1082 }
fb1d9738 1083
c8261a96 1084 return ret;
fb1d9738
JB
1085}
1086
1087int vmw_kms_close(struct vmw_private *dev_priv)
1088{
c8261a96
SY
1089 int ret;
1090
fb1d9738
JB
1091 /*
1092 * Docs says we should take the lock before calling this function
1093 * but since it destroys encoders and our destructor calls
1094 * drm_encoder_cleanup which takes the lock we deadlock.
1095 */
1096 drm_mode_config_cleanup(dev_priv->dev);
c8261a96
SY
1097 if (dev_priv->active_display_unit == vmw_du_screen_object)
1098 ret = vmw_kms_sou_close_display(dev_priv);
35c05125
SY
1099 else if (dev_priv->active_display_unit == vmw_du_screen_target)
1100 ret = vmw_kms_stdu_close_display(dev_priv);
c0d18316 1101 else
c8261a96
SY
1102 ret = vmw_kms_ldu_close_display(dev_priv);
1103
1104 return ret;
fb1d9738
JB
1105}
1106
1107int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
1108 struct drm_file *file_priv)
1109{
1110 struct drm_vmw_cursor_bypass_arg *arg = data;
1111 struct vmw_display_unit *du;
fb1d9738
JB
1112 struct drm_crtc *crtc;
1113 int ret = 0;
1114
1115
1116 mutex_lock(&dev->mode_config.mutex);
1117 if (arg->flags & DRM_VMW_CURSOR_BYPASS_ALL) {
1118
1119 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1120 du = vmw_crtc_to_du(crtc);
1121 du->hotspot_x = arg->xhot;
1122 du->hotspot_y = arg->yhot;
1123 }
1124
1125 mutex_unlock(&dev->mode_config.mutex);
1126 return 0;
1127 }
1128
a4cd5d68
RC
1129 crtc = drm_crtc_find(dev, arg->crtc_id);
1130 if (!crtc) {
4ae87ff0 1131 ret = -ENOENT;
fb1d9738
JB
1132 goto out;
1133 }
1134
fb1d9738
JB
1135 du = vmw_crtc_to_du(crtc);
1136
1137 du->hotspot_x = arg->xhot;
1138 du->hotspot_y = arg->yhot;
1139
1140out:
1141 mutex_unlock(&dev->mode_config.mutex);
1142
1143 return ret;
1144}
1145
0bef23f9 1146int vmw_kms_write_svga(struct vmw_private *vmw_priv,
d7e1958d 1147 unsigned width, unsigned height, unsigned pitch,
6558429b 1148 unsigned bpp, unsigned depth)
fb1d9738 1149{
d7e1958d
JB
1150 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1151 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK, pitch);
1152 else if (vmw_fifo_have_pitchlock(vmw_priv))
1153 iowrite32(pitch, vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
1154 vmw_write(vmw_priv, SVGA_REG_WIDTH, width);
1155 vmw_write(vmw_priv, SVGA_REG_HEIGHT, height);
6558429b 1156 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, bpp);
0bef23f9
MD
1157
1158 if (vmw_read(vmw_priv, SVGA_REG_DEPTH) != depth) {
1159 DRM_ERROR("Invalid depth %u for %u bpp, host expects %u\n",
1160 depth, bpp, vmw_read(vmw_priv, SVGA_REG_DEPTH));
1161 return -EINVAL;
1162 }
1163
1164 return 0;
d7e1958d 1165}
fb1d9738 1166
d7e1958d
JB
1167int vmw_kms_save_vga(struct vmw_private *vmw_priv)
1168{
7c4f7780
TH
1169 struct vmw_vga_topology_state *save;
1170 uint32_t i;
1171
fb1d9738
JB
1172 vmw_priv->vga_width = vmw_read(vmw_priv, SVGA_REG_WIDTH);
1173 vmw_priv->vga_height = vmw_read(vmw_priv, SVGA_REG_HEIGHT);
7c4f7780 1174 vmw_priv->vga_bpp = vmw_read(vmw_priv, SVGA_REG_BITS_PER_PIXEL);
d7e1958d
JB
1175 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1176 vmw_priv->vga_pitchlock =
7c4f7780 1177 vmw_read(vmw_priv, SVGA_REG_PITCHLOCK);
d7e1958d 1178 else if (vmw_fifo_have_pitchlock(vmw_priv))
7c4f7780 1179 vmw_priv->vga_pitchlock = ioread32(vmw_priv->mmio_virt +
c8261a96 1180 SVGA_FIFO_PITCHLOCK);
7c4f7780
TH
1181
1182 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1183 return 0;
fb1d9738 1184
7c4f7780
TH
1185 vmw_priv->num_displays = vmw_read(vmw_priv,
1186 SVGA_REG_NUM_GUEST_DISPLAYS);
1187
029e50bf
TH
1188 if (vmw_priv->num_displays == 0)
1189 vmw_priv->num_displays = 1;
1190
7c4f7780
TH
1191 for (i = 0; i < vmw_priv->num_displays; ++i) {
1192 save = &vmw_priv->vga_save[i];
1193 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1194 save->primary = vmw_read(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY);
1195 save->pos_x = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_X);
1196 save->pos_y = vmw_read(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y);
1197 save->width = vmw_read(vmw_priv, SVGA_REG_DISPLAY_WIDTH);
1198 save->height = vmw_read(vmw_priv, SVGA_REG_DISPLAY_HEIGHT);
1199 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
30c78bb8
TH
1200 if (i == 0 && vmw_priv->num_displays == 1 &&
1201 save->width == 0 && save->height == 0) {
1202
1203 /*
1204 * It should be fairly safe to assume that these
1205 * values are uninitialized.
1206 */
1207
1208 save->width = vmw_priv->vga_width - save->pos_x;
1209 save->height = vmw_priv->vga_height - save->pos_y;
1210 }
7c4f7780 1211 }
30c78bb8 1212
fb1d9738
JB
1213 return 0;
1214}
1215
1216int vmw_kms_restore_vga(struct vmw_private *vmw_priv)
1217{
7c4f7780
TH
1218 struct vmw_vga_topology_state *save;
1219 uint32_t i;
1220
fb1d9738
JB
1221 vmw_write(vmw_priv, SVGA_REG_WIDTH, vmw_priv->vga_width);
1222 vmw_write(vmw_priv, SVGA_REG_HEIGHT, vmw_priv->vga_height);
7c4f7780 1223 vmw_write(vmw_priv, SVGA_REG_BITS_PER_PIXEL, vmw_priv->vga_bpp);
d7e1958d
JB
1224 if (vmw_priv->capabilities & SVGA_CAP_PITCHLOCK)
1225 vmw_write(vmw_priv, SVGA_REG_PITCHLOCK,
1226 vmw_priv->vga_pitchlock);
1227 else if (vmw_fifo_have_pitchlock(vmw_priv))
1228 iowrite32(vmw_priv->vga_pitchlock,
1229 vmw_priv->mmio_virt + SVGA_FIFO_PITCHLOCK);
fb1d9738 1230
7c4f7780
TH
1231 if (!(vmw_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY))
1232 return 0;
1233
1234 for (i = 0; i < vmw_priv->num_displays; ++i) {
1235 save = &vmw_priv->vga_save[i];
1236 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, i);
1237 vmw_write(vmw_priv, SVGA_REG_DISPLAY_IS_PRIMARY, save->primary);
1238 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_X, save->pos_x);
1239 vmw_write(vmw_priv, SVGA_REG_DISPLAY_POSITION_Y, save->pos_y);
1240 vmw_write(vmw_priv, SVGA_REG_DISPLAY_WIDTH, save->width);
1241 vmw_write(vmw_priv, SVGA_REG_DISPLAY_HEIGHT, save->height);
1242 vmw_write(vmw_priv, SVGA_REG_DISPLAY_ID, SVGA_ID_INVALID);
1243 }
1244
fb1d9738
JB
1245 return 0;
1246}
d8bd19d2 1247
e133e737
TH
1248bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
1249 uint32_t pitch,
1250 uint32_t height)
1251{
35c05125
SY
1252 return ((u64) pitch * (u64) height) < (u64)
1253 ((dev_priv->active_display_unit == vmw_du_screen_target) ?
1254 dev_priv->prim_bb_mem : dev_priv->vram_size);
e133e737
TH
1255}
1256
1c482ab3
JB
1257
1258/**
1259 * Function called by DRM code called with vbl_lock held.
1260 */
7a1c2f6c
TH
1261u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc)
1262{
1263 return 0;
1264}
626ab771 1265
1c482ab3
JB
1266/**
1267 * Function called by DRM code called with vbl_lock held.
1268 */
1269int vmw_enable_vblank(struct drm_device *dev, int crtc)
1270{
1271 return -ENOSYS;
1272}
1273
1274/**
1275 * Function called by DRM code called with vbl_lock held.
1276 */
1277void vmw_disable_vblank(struct drm_device *dev, int crtc)
1278{
1279}
1280
626ab771
JB
1281
1282/*
1283 * Small shared kms functions.
1284 */
1285
847c5964 1286static int vmw_du_update_layout(struct vmw_private *dev_priv, unsigned num,
626ab771
JB
1287 struct drm_vmw_rect *rects)
1288{
1289 struct drm_device *dev = dev_priv->dev;
1290 struct vmw_display_unit *du;
1291 struct drm_connector *con;
626ab771
JB
1292
1293 mutex_lock(&dev->mode_config.mutex);
1294
1295#if 0
6ea77d13
TH
1296 {
1297 unsigned int i;
1298
1299 DRM_INFO("%s: new layout ", __func__);
1300 for (i = 0; i < num; i++)
1301 DRM_INFO("(%i, %i %ux%u) ", rects[i].x, rects[i].y,
1302 rects[i].w, rects[i].h);
1303 DRM_INFO("\n");
1304 }
626ab771
JB
1305#endif
1306
1307 list_for_each_entry(con, &dev->mode_config.connector_list, head) {
1308 du = vmw_connector_to_du(con);
1309 if (num > du->unit) {
1310 du->pref_width = rects[du->unit].w;
1311 du->pref_height = rects[du->unit].h;
1312 du->pref_active = true;
cd2b89e7
TH
1313 du->gui_x = rects[du->unit].x;
1314 du->gui_y = rects[du->unit].y;
626ab771
JB
1315 } else {
1316 du->pref_width = 800;
1317 du->pref_height = 600;
1318 du->pref_active = false;
1319 }
1320 con->status = vmw_du_connector_detect(con, true);
1321 }
1322
1323 mutex_unlock(&dev->mode_config.mutex);
1324
1325 return 0;
1326}
1327
1328void vmw_du_crtc_save(struct drm_crtc *crtc)
1329{
1330}
1331
1332void vmw_du_crtc_restore(struct drm_crtc *crtc)
1333{
1334}
1335
1336void vmw_du_crtc_gamma_set(struct drm_crtc *crtc,
1337 u16 *r, u16 *g, u16 *b,
1338 uint32_t start, uint32_t size)
1339{
1340 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1341 int i;
1342
1343 for (i = 0; i < size; i++) {
1344 DRM_DEBUG("%d r/g/b = 0x%04x / 0x%04x / 0x%04x\n", i,
1345 r[i], g[i], b[i]);
1346 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 0, r[i] >> 8);
1347 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 1, g[i] >> 8);
1348 vmw_write(dev_priv, SVGA_PALETTE_BASE + i * 3 + 2, b[i] >> 8);
1349 }
1350}
1351
1352void vmw_du_connector_dpms(struct drm_connector *connector, int mode)
1353{
1354}
1355
1356void vmw_du_connector_save(struct drm_connector *connector)
1357{
1358}
1359
1360void vmw_du_connector_restore(struct drm_connector *connector)
1361{
1362}
1363
1364enum drm_connector_status
1365vmw_du_connector_detect(struct drm_connector *connector, bool force)
1366{
1367 uint32_t num_displays;
1368 struct drm_device *dev = connector->dev;
1369 struct vmw_private *dev_priv = vmw_priv(dev);
cd2b89e7 1370 struct vmw_display_unit *du = vmw_connector_to_du(connector);
626ab771 1371
626ab771 1372 num_displays = vmw_read(dev_priv, SVGA_REG_NUM_DISPLAYS);
626ab771 1373
cd2b89e7
TH
1374 return ((vmw_connector_to_du(connector)->unit < num_displays &&
1375 du->pref_active) ?
626ab771
JB
1376 connector_status_connected : connector_status_disconnected);
1377}
1378
1379static struct drm_display_mode vmw_kms_connector_builtin[] = {
1380 /* 640x480@60Hz */
1381 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
1382 752, 800, 0, 480, 489, 492, 525, 0,
1383 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1384 /* 800x600@60Hz */
1385 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
1386 968, 1056, 0, 600, 601, 605, 628, 0,
1387 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1388 /* 1024x768@60Hz */
1389 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
1390 1184, 1344, 0, 768, 771, 777, 806, 0,
1391 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
1392 /* 1152x864@75Hz */
1393 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
1394 1344, 1600, 0, 864, 865, 868, 900, 0,
1395 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1396 /* 1280x768@60Hz */
1397 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
1398 1472, 1664, 0, 768, 771, 778, 798, 0,
1399 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1400 /* 1280x800@60Hz */
1401 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
1402 1480, 1680, 0, 800, 803, 809, 831, 0,
1403 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
1404 /* 1280x960@60Hz */
1405 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
1406 1488, 1800, 0, 960, 961, 964, 1000, 0,
1407 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1408 /* 1280x1024@60Hz */
1409 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
1410 1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
1411 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1412 /* 1360x768@60Hz */
1413 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
1414 1536, 1792, 0, 768, 771, 777, 795, 0,
1415 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1416 /* 1440x1050@60Hz */
1417 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
1418 1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
1419 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1420 /* 1440x900@60Hz */
1421 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
1422 1672, 1904, 0, 900, 903, 909, 934, 0,
1423 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1424 /* 1600x1200@60Hz */
1425 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
1426 1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
1427 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1428 /* 1680x1050@60Hz */
1429 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
1430 1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
1431 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1432 /* 1792x1344@60Hz */
1433 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
1434 2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
1435 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1436 /* 1853x1392@60Hz */
1437 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
1438 2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
1439 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1440 /* 1920x1200@60Hz */
1441 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
1442 2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
1443 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1444 /* 1920x1440@60Hz */
1445 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
1446 2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
1447 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1448 /* 2560x1600@60Hz */
1449 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
1450 3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
1451 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
1452 /* Terminate */
1453 { DRM_MODE("", 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) },
1454};
1455
1543b4dd
TH
1456/**
1457 * vmw_guess_mode_timing - Provide fake timings for a
1458 * 60Hz vrefresh mode.
1459 *
1460 * @mode - Pointer to a struct drm_display_mode with hdisplay and vdisplay
1461 * members filled in.
1462 */
a278724a 1463void vmw_guess_mode_timing(struct drm_display_mode *mode)
1543b4dd
TH
1464{
1465 mode->hsync_start = mode->hdisplay + 50;
1466 mode->hsync_end = mode->hsync_start + 50;
1467 mode->htotal = mode->hsync_end + 50;
1468
1469 mode->vsync_start = mode->vdisplay + 50;
1470 mode->vsync_end = mode->vsync_start + 50;
1471 mode->vtotal = mode->vsync_end + 50;
1472
1473 mode->clock = (u32)mode->htotal * (u32)mode->vtotal / 100 * 6;
1474 mode->vrefresh = drm_mode_vrefresh(mode);
1475}
1476
1477
626ab771
JB
1478int vmw_du_connector_fill_modes(struct drm_connector *connector,
1479 uint32_t max_width, uint32_t max_height)
1480{
1481 struct vmw_display_unit *du = vmw_connector_to_du(connector);
1482 struct drm_device *dev = connector->dev;
1483 struct vmw_private *dev_priv = vmw_priv(dev);
1484 struct drm_display_mode *mode = NULL;
1485 struct drm_display_mode *bmode;
1486 struct drm_display_mode prefmode = { DRM_MODE("preferred",
1487 DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
1488 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1489 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC)
1490 };
1491 int i;
9a72384d
SY
1492 u32 assumed_bpp = 2;
1493
1494 /*
1495 * If using screen objects, then assume 32-bpp because that's what the
1496 * SVGA device is assuming
1497 */
c8261a96 1498 if (dev_priv->active_display_unit == vmw_du_screen_object)
9a72384d 1499 assumed_bpp = 4;
626ab771 1500
35c05125
SY
1501 if (dev_priv->active_display_unit == vmw_du_screen_target) {
1502 max_width = min(max_width, dev_priv->stdu_max_width);
1503 max_height = min(max_height, dev_priv->stdu_max_height);
1504 }
1505
626ab771 1506 /* Add preferred mode */
c8261a96
SY
1507 mode = drm_mode_duplicate(dev, &prefmode);
1508 if (!mode)
1509 return 0;
1510 mode->hdisplay = du->pref_width;
1511 mode->vdisplay = du->pref_height;
1512 vmw_guess_mode_timing(mode);
626ab771 1513
c8261a96
SY
1514 if (vmw_kms_validate_mode_vram(dev_priv,
1515 mode->hdisplay * assumed_bpp,
1516 mode->vdisplay)) {
1517 drm_mode_probed_add(connector, mode);
1518 } else {
1519 drm_mode_destroy(dev, mode);
1520 mode = NULL;
1521 }
55bde5b2 1522
c8261a96
SY
1523 if (du->pref_mode) {
1524 list_del_init(&du->pref_mode->head);
1525 drm_mode_destroy(dev, du->pref_mode);
626ab771
JB
1526 }
1527
c8261a96
SY
1528 /* mode might be null here, this is intended */
1529 du->pref_mode = mode;
1530
626ab771
JB
1531 for (i = 0; vmw_kms_connector_builtin[i].type != 0; i++) {
1532 bmode = &vmw_kms_connector_builtin[i];
1533 if (bmode->hdisplay > max_width ||
1534 bmode->vdisplay > max_height)
1535 continue;
1536
9a72384d
SY
1537 if (!vmw_kms_validate_mode_vram(dev_priv,
1538 bmode->hdisplay * assumed_bpp,
626ab771
JB
1539 bmode->vdisplay))
1540 continue;
1541
1542 mode = drm_mode_duplicate(dev, bmode);
1543 if (!mode)
1544 return 0;
1545 mode->vrefresh = drm_mode_vrefresh(mode);
1546
1547 drm_mode_probed_add(connector, mode);
1548 }
1549
b87577b7 1550 drm_mode_connector_list_update(connector, true);
f6b05004
TH
1551 /* Move the prefered mode first, help apps pick the right mode. */
1552 drm_mode_sort(&connector->modes);
626ab771
JB
1553
1554 return 1;
1555}
1556
1557int vmw_du_connector_set_property(struct drm_connector *connector,
1558 struct drm_property *property,
1559 uint64_t val)
1560{
1561 return 0;
1562}
cd2b89e7
TH
1563
1564
1565int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
1566 struct drm_file *file_priv)
1567{
1568 struct vmw_private *dev_priv = vmw_priv(dev);
1569 struct drm_vmw_update_layout_arg *arg =
1570 (struct drm_vmw_update_layout_arg *)data;
cd2b89e7
TH
1571 void __user *user_rects;
1572 struct drm_vmw_rect *rects;
1573 unsigned rects_size;
1574 int ret;
1575 int i;
65ade7d3 1576 u64 total_pixels = 0;
cd2b89e7 1577 struct drm_mode_config *mode_config = &dev->mode_config;
c8261a96 1578 struct drm_vmw_rect bounding_box = {0};
cd2b89e7 1579
cd2b89e7
TH
1580 if (!arg->num_outputs) {
1581 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
1582 vmw_du_update_layout(dev_priv, 1, &def_rect);
5151adb3 1583 return 0;
cd2b89e7
TH
1584 }
1585
1586 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
bab9efc2
XW
1587 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
1588 GFP_KERNEL);
5151adb3
TH
1589 if (unlikely(!rects))
1590 return -ENOMEM;
cd2b89e7
TH
1591
1592 user_rects = (void __user *)(unsigned long)arg->rects;
1593 ret = copy_from_user(rects, user_rects, rects_size);
1594 if (unlikely(ret != 0)) {
1595 DRM_ERROR("Failed to get rects.\n");
1596 ret = -EFAULT;
1597 goto out_free;
1598 }
1599
1600 for (i = 0; i < arg->num_outputs; ++i) {
bab9efc2
XW
1601 if (rects[i].x < 0 ||
1602 rects[i].y < 0 ||
1603 rects[i].x + rects[i].w > mode_config->max_width ||
1604 rects[i].y + rects[i].h > mode_config->max_height) {
cd2b89e7
TH
1605 DRM_ERROR("Invalid GUI layout.\n");
1606 ret = -EINVAL;
1607 goto out_free;
1608 }
c8261a96
SY
1609
1610 /*
1611 * bounding_box.w and bunding_box.h are used as
1612 * lower-right coordinates
1613 */
1614 if (rects[i].x + rects[i].w > bounding_box.w)
1615 bounding_box.w = rects[i].x + rects[i].w;
1616
1617 if (rects[i].y + rects[i].h > bounding_box.h)
1618 bounding_box.h = rects[i].y + rects[i].h;
65ade7d3
SY
1619
1620 total_pixels += (u64) rects[i].w * (u64) rects[i].h;
cd2b89e7
TH
1621 }
1622
65ade7d3
SY
1623 if (dev_priv->active_display_unit == vmw_du_screen_target) {
1624 /*
1625 * For Screen Targets, the limits for a toplogy are:
1626 * 1. Bounding box (assuming 32bpp) must be < prim_bb_mem
1627 * 2. Total pixels (assuming 32bpp) must be < prim_bb_mem
1628 */
1629 u64 bb_mem = bounding_box.w * bounding_box.h * 4;
1630 u64 pixel_mem = total_pixels * 4;
1631
1632 if (bb_mem > dev_priv->prim_bb_mem) {
1633 DRM_ERROR("Topology is beyond supported limits.\n");
35c05125
SY
1634 ret = -EINVAL;
1635 goto out_free;
1636 }
1637
65ade7d3
SY
1638 if (pixel_mem > dev_priv->prim_bb_mem) {
1639 DRM_ERROR("Combined output size too large\n");
1640 ret = -EINVAL;
1641 goto out_free;
1642 }
1643 }
35c05125 1644
cd2b89e7
TH
1645 vmw_du_update_layout(dev_priv, arg->num_outputs, rects);
1646
1647out_free:
1648 kfree(rects);
cd2b89e7
TH
1649 return ret;
1650}
1a4b172a
TH
1651
1652/**
1653 * vmw_kms_helper_dirty - Helper to build commands and perform actions based
1654 * on a set of cliprects and a set of display units.
1655 *
1656 * @dev_priv: Pointer to a device private structure.
1657 * @framebuffer: Pointer to the framebuffer on which to perform the actions.
1658 * @clips: A set of struct drm_clip_rect. Either this os @vclips must be NULL.
1659 * Cliprects are given in framebuffer coordinates.
1660 * @vclips: A set of struct drm_vmw_rect cliprects. Either this or @clips must
1661 * be NULL. Cliprects are given in source coordinates.
1662 * @dest_x: X coordinate offset for the crtc / destination clip rects.
1663 * @dest_y: Y coordinate offset for the crtc / destination clip rects.
1664 * @num_clips: Number of cliprects in the @clips or @vclips array.
1665 * @increment: Integer with which to increment the clip counter when looping.
1666 * Used to skip a predetermined number of clip rects.
1667 * @dirty: Closure structure. See the description of struct vmw_kms_dirty.
1668 */
1669int vmw_kms_helper_dirty(struct vmw_private *dev_priv,
1670 struct vmw_framebuffer *framebuffer,
1671 const struct drm_clip_rect *clips,
1672 const struct drm_vmw_rect *vclips,
1673 s32 dest_x, s32 dest_y,
1674 int num_clips,
1675 int increment,
1676 struct vmw_kms_dirty *dirty)
1677{
1678 struct vmw_display_unit *units[VMWGFX_NUM_DISPLAY_UNITS];
1679 struct drm_crtc *crtc;
1680 u32 num_units = 0;
1681 u32 i, k;
1682 int ret;
1683
1684 dirty->dev_priv = dev_priv;
1685
1686 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1687 if (crtc->primary->fb != &framebuffer->base)
1688 continue;
1689 units[num_units++] = vmw_crtc_to_du(crtc);
1690 }
1691
1692 for (k = 0; k < num_units; k++) {
1693 struct vmw_display_unit *unit = units[k];
1694 s32 crtc_x = unit->crtc.x;
1695 s32 crtc_y = unit->crtc.y;
1696 s32 crtc_width = unit->crtc.mode.hdisplay;
1697 s32 crtc_height = unit->crtc.mode.vdisplay;
1698 const struct drm_clip_rect *clips_ptr = clips;
1699 const struct drm_vmw_rect *vclips_ptr = vclips;
1700
1701 dirty->unit = unit;
1702 if (dirty->fifo_reserve_size > 0) {
1703 dirty->cmd = vmw_fifo_reserve(dev_priv,
1704 dirty->fifo_reserve_size);
1705 if (!dirty->cmd) {
1706 DRM_ERROR("Couldn't reserve fifo space "
1707 "for dirty blits.\n");
1708 return ret;
1709 }
1710 memset(dirty->cmd, 0, dirty->fifo_reserve_size);
1711 }
1712 dirty->num_hits = 0;
1713 for (i = 0; i < num_clips; i++, clips_ptr += increment,
1714 vclips_ptr += increment) {
1715 s32 clip_left;
1716 s32 clip_top;
1717
1718 /*
1719 * Select clip array type. Note that integer type
1720 * in @clips is unsigned short, whereas in @vclips
1721 * it's 32-bit.
1722 */
1723 if (clips) {
1724 dirty->fb_x = (s32) clips_ptr->x1;
1725 dirty->fb_y = (s32) clips_ptr->y1;
1726 dirty->unit_x2 = (s32) clips_ptr->x2 + dest_x -
1727 crtc_x;
1728 dirty->unit_y2 = (s32) clips_ptr->y2 + dest_y -
1729 crtc_y;
1730 } else {
1731 dirty->fb_x = vclips_ptr->x;
1732 dirty->fb_y = vclips_ptr->y;
1733 dirty->unit_x2 = dirty->fb_x + vclips_ptr->w +
1734 dest_x - crtc_x;
1735 dirty->unit_y2 = dirty->fb_y + vclips_ptr->h +
1736 dest_y - crtc_y;
1737 }
1738
1739 dirty->unit_x1 = dirty->fb_x + dest_x - crtc_x;
1740 dirty->unit_y1 = dirty->fb_y + dest_y - crtc_y;
1741
1742 /* Skip this clip if it's outside the crtc region */
1743 if (dirty->unit_x1 >= crtc_width ||
1744 dirty->unit_y1 >= crtc_height ||
1745 dirty->unit_x2 <= 0 || dirty->unit_y2 <= 0)
1746 continue;
1747
1748 /* Clip right and bottom to crtc limits */
1749 dirty->unit_x2 = min_t(s32, dirty->unit_x2,
1750 crtc_width);
1751 dirty->unit_y2 = min_t(s32, dirty->unit_y2,
1752 crtc_height);
1753
1754 /* Clip left and top to crtc limits */
1755 clip_left = min_t(s32, dirty->unit_x1, 0);
1756 clip_top = min_t(s32, dirty->unit_y1, 0);
1757 dirty->unit_x1 -= clip_left;
1758 dirty->unit_y1 -= clip_top;
1759 dirty->fb_x -= clip_left;
1760 dirty->fb_y -= clip_top;
1761
1762 dirty->clip(dirty);
1763 }
1764
1765 dirty->fifo_commit(dirty);
1766 }
1767
1768 return 0;
1769}
1770
1771/**
1772 * vmw_kms_helper_buffer_prepare - Reserve and validate a buffer object before
1773 * command submission.
1774 *
1775 * @dev_priv. Pointer to a device private structure.
1776 * @buf: The buffer object
1777 * @interruptible: Whether to perform waits as interruptible.
1778 * @validate_as_mob: Whether the buffer should be validated as a MOB. If false,
1779 * The buffer will be validated as a GMR. Already pinned buffers will not be
1780 * validated.
1781 *
1782 * Returns 0 on success, negative error code on failure, -ERESTARTSYS if
1783 * interrupted by a signal.
1784 */
1785int vmw_kms_helper_buffer_prepare(struct vmw_private *dev_priv,
1786 struct vmw_dma_buffer *buf,
1787 bool interruptible,
1788 bool validate_as_mob)
1789{
1790 struct ttm_buffer_object *bo = &buf->base;
1791 int ret;
1792
b9eb1a61 1793 ttm_bo_reserve(bo, false, false, interruptible, NULL);
1a4b172a
TH
1794 ret = vmw_validate_single_buffer(dev_priv, bo, interruptible,
1795 validate_as_mob);
1796 if (ret)
1797 ttm_bo_unreserve(bo);
1798
1799 return ret;
1800}
1801
1802/**
1803 * vmw_kms_helper_buffer_revert - Undo the actions of
1804 * vmw_kms_helper_buffer_prepare.
1805 *
1806 * @res: Pointer to the buffer object.
1807 *
1808 * Helper to be used if an error forces the caller to undo the actions of
1809 * vmw_kms_helper_buffer_prepare.
1810 */
1811void vmw_kms_helper_buffer_revert(struct vmw_dma_buffer *buf)
1812{
1813 if (buf)
1814 ttm_bo_unreserve(&buf->base);
1815}
1816
1817/**
1818 * vmw_kms_helper_buffer_finish - Unreserve and fence a buffer object after
1819 * kms command submission.
1820 *
1821 * @dev_priv: Pointer to a device private structure.
1822 * @file_priv: Pointer to a struct drm_file representing the caller's
1823 * connection. Must be set to NULL if @user_fence_rep is NULL, and conversely
1824 * if non-NULL, @user_fence_rep must be non-NULL.
1825 * @buf: The buffer object.
1826 * @out_fence: Optional pointer to a fence pointer. If non-NULL, a
1827 * ref-counted fence pointer is returned here.
1828 * @user_fence_rep: Optional pointer to a user-space provided struct
1829 * drm_vmw_fence_rep. If provided, @file_priv must also be provided and the
1830 * function copies fence data to user-space in a fail-safe manner.
1831 */
1832void vmw_kms_helper_buffer_finish(struct vmw_private *dev_priv,
1833 struct drm_file *file_priv,
1834 struct vmw_dma_buffer *buf,
1835 struct vmw_fence_obj **out_fence,
1836 struct drm_vmw_fence_rep __user *
1837 user_fence_rep)
1838{
1839 struct vmw_fence_obj *fence;
1840 uint32_t handle;
1841 int ret;
1842
1843 ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence,
1844 file_priv ? &handle : NULL);
1845 if (buf)
1846 vmw_fence_single_bo(&buf->base, fence);
1847 if (file_priv)
1848 vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv),
1849 ret, user_fence_rep, fence,
1850 handle);
1851 if (out_fence)
1852 *out_fence = fence;
1853 else
1854 vmw_fence_obj_unreference(&fence);
1855
1856 vmw_kms_helper_buffer_revert(buf);
1857}
1858
1859
1860/**
1861 * vmw_kms_helper_resource_revert - Undo the actions of
1862 * vmw_kms_helper_resource_prepare.
1863 *
1864 * @res: Pointer to the resource. Typically a surface.
1865 *
1866 * Helper to be used if an error forces the caller to undo the actions of
1867 * vmw_kms_helper_resource_prepare.
1868 */
1869void vmw_kms_helper_resource_revert(struct vmw_resource *res)
1870{
1871 vmw_kms_helper_buffer_revert(res->backup);
1872 vmw_resource_unreserve(res, NULL, 0);
1873 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1874}
1875
1876/**
1877 * vmw_kms_helper_resource_prepare - Reserve and validate a resource before
1878 * command submission.
1879 *
1880 * @res: Pointer to the resource. Typically a surface.
1881 * @interruptible: Whether to perform waits as interruptible.
1882 *
1883 * Reserves and validates also the backup buffer if a guest-backed resource.
1884 * Returns 0 on success, negative error code on failure. -ERESTARTSYS if
1885 * interrupted by a signal.
1886 */
1887int vmw_kms_helper_resource_prepare(struct vmw_resource *res,
1888 bool interruptible)
1889{
1890 int ret = 0;
1891
1892 if (interruptible)
1893 ret = mutex_lock_interruptible(&res->dev_priv->cmdbuf_mutex);
1894 else
1895 mutex_lock(&res->dev_priv->cmdbuf_mutex);
1896
1897 if (unlikely(ret != 0))
1898 return -ERESTARTSYS;
1899
1900 ret = vmw_resource_reserve(res, interruptible, false);
1901 if (ret)
1902 goto out_unlock;
1903
1904 if (res->backup) {
1905 ret = vmw_kms_helper_buffer_prepare(res->dev_priv, res->backup,
1906 interruptible,
1907 res->dev_priv->has_mob);
1908 if (ret)
1909 goto out_unreserve;
1910 }
1911 ret = vmw_resource_validate(res);
1912 if (ret)
1913 goto out_revert;
1914 return 0;
1915
1916out_revert:
1917 vmw_kms_helper_buffer_revert(res->backup);
1918out_unreserve:
1919 vmw_resource_unreserve(res, NULL, 0);
1920out_unlock:
1921 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1922 return ret;
1923}
1924
1925/**
1926 * vmw_kms_helper_resource_finish - Unreserve and fence a resource after
1927 * kms command submission.
1928 *
1929 * @res: Pointer to the resource. Typically a surface.
1930 * @out_fence: Optional pointer to a fence pointer. If non-NULL, a
1931 * ref-counted fence pointer is returned here.
1932 */
1933void vmw_kms_helper_resource_finish(struct vmw_resource *res,
1934 struct vmw_fence_obj **out_fence)
1935{
1936 if (res->backup || out_fence)
1937 vmw_kms_helper_buffer_finish(res->dev_priv, NULL, res->backup,
1938 out_fence, NULL);
1939
1940 vmw_resource_unreserve(res, NULL, 0);
1941 mutex_unlock(&res->dev_priv->cmdbuf_mutex);
1942}
6bf6bf03
TH
1943
1944/**
1945 * vmw_kms_update_proxy - Helper function to update a proxy surface from
1946 * its backing MOB.
1947 *
1948 * @res: Pointer to the surface resource
1949 * @clips: Clip rects in framebuffer (surface) space.
1950 * @num_clips: Number of clips in @clips.
1951 * @increment: Integer with which to increment the clip counter when looping.
1952 * Used to skip a predetermined number of clip rects.
1953 *
1954 * This function makes sure the proxy surface is updated from its backing MOB
1955 * using the region given by @clips. The surface resource @res and its backing
1956 * MOB needs to be reserved and validated on call.
1957 */
1958int vmw_kms_update_proxy(struct vmw_resource *res,
1959 const struct drm_clip_rect *clips,
1960 unsigned num_clips,
1961 int increment)
1962{
1963 struct vmw_private *dev_priv = res->dev_priv;
1964 struct drm_vmw_size *size = &vmw_res_to_srf(res)->base_size;
1965 struct {
1966 SVGA3dCmdHeader header;
1967 SVGA3dCmdUpdateGBImage body;
1968 } *cmd;
1969 SVGA3dBox *box;
1970 size_t copy_size = 0;
1971 int i;
1972
1973 if (!clips)
1974 return 0;
1975
1976 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd) * num_clips);
1977 if (!cmd) {
1978 DRM_ERROR("Couldn't reserve fifo space for proxy surface "
1979 "update.\n");
1980 return -ENOMEM;
1981 }
1982
1983 for (i = 0; i < num_clips; ++i, clips += increment, ++cmd) {
1984 box = &cmd->body.box;
1985
1986 cmd->header.id = SVGA_3D_CMD_UPDATE_GB_IMAGE;
1987 cmd->header.size = sizeof(cmd->body);
1988 cmd->body.image.sid = res->id;
1989 cmd->body.image.face = 0;
1990 cmd->body.image.mipmap = 0;
1991
1992 if (clips->x1 > size->width || clips->x2 > size->width ||
1993 clips->y1 > size->height || clips->y2 > size->height) {
1994 DRM_ERROR("Invalid clips outsize of framebuffer.\n");
1995 return -EINVAL;
1996 }
1997
1998 box->x = clips->x1;
1999 box->y = clips->y1;
2000 box->z = 0;
2001 box->w = clips->x2 - clips->x1;
2002 box->h = clips->y2 - clips->y1;
2003 box->d = 1;
2004
2005 copy_size += sizeof(*cmd);
2006 }
2007
2008 vmw_fifo_commit(dev_priv, copy_size);
2009
2010 return 0;
2011}
a278724a
TH
2012
2013int vmw_kms_fbdev_init_data(struct vmw_private *dev_priv,
2014 unsigned unit,
2015 u32 max_width,
2016 u32 max_height,
2017 struct drm_connector **p_con,
2018 struct drm_crtc **p_crtc,
2019 struct drm_display_mode **p_mode)
2020{
2021 struct drm_connector *con;
2022 struct vmw_display_unit *du;
2023 struct drm_display_mode *mode;
2024 int i = 0;
2025
2026 list_for_each_entry(con, &dev_priv->dev->mode_config.connector_list,
2027 head) {
2028 if (i == unit)
2029 break;
2030
2031 ++i;
2032 }
2033
2034 if (i != unit) {
2035 DRM_ERROR("Could not find initial display unit.\n");
2036 return -EINVAL;
2037 }
2038
2039 if (list_empty(&con->modes))
2040 (void) vmw_du_connector_fill_modes(con, max_width, max_height);
2041
2042 if (list_empty(&con->modes)) {
2043 DRM_ERROR("Could not find initial display mode.\n");
2044 return -EINVAL;
2045 }
2046
2047 du = vmw_connector_to_du(con);
2048 *p_con = con;
2049 *p_crtc = &du->crtc;
2050
2051 list_for_each_entry(mode, &con->modes, head) {
2052 if (mode->type & DRM_MODE_TYPE_PREFERRED)
2053 break;
2054 }
2055
2056 if (mode->type & DRM_MODE_TYPE_PREFERRED)
2057 *p_mode = mode;
2058 else {
2059 WARN_ONCE(true, "Could not find initial preferred mode.\n");
2060 *p_mode = list_first_entry(&con->modes,
2061 struct drm_display_mode,
2062 head);
2063 }
2064
2065 return 0;
2066}