Merge remote-tracking branches 'asoc/topic/ad193x', 'asoc/topic/alc5632', 'asoc/topic...
[linux-2.6-block.git] / drivers / gpu / drm / vmwgfx / vmwgfx_ioctl.c
CommitLineData
fb1d9738
JB
1/**************************************************************************
2 *
3 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#include "vmwgfx_drv.h"
760285e7 29#include <drm/vmwgfx_drm.h>
2fcd5a73 30#include "vmwgfx_kms.h"
fb1d9738 31
a6fc955f
TH
32struct svga_3d_compat_cap {
33 SVGA3dCapsRecordHeader header;
34 SVGA3dCapPair pairs[SVGA3D_DEVCAP_MAX];
35};
36
fb1d9738
JB
37int vmw_getparam_ioctl(struct drm_device *dev, void *data,
38 struct drm_file *file_priv)
39{
40 struct vmw_private *dev_priv = vmw_priv(dev);
41 struct drm_vmw_getparam_arg *param =
42 (struct drm_vmw_getparam_arg *)data;
a6fc955f 43 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
fb1d9738
JB
44
45 switch (param->param) {
46 case DRM_VMW_PARAM_NUM_STREAMS:
47 param->value = vmw_overlay_num_overlays(dev_priv);
48 break;
49 case DRM_VMW_PARAM_NUM_FREE_STREAMS:
50 param->value = vmw_overlay_num_free_overlays(dev_priv);
51 break;
52 case DRM_VMW_PARAM_3D:
8e19a951 53 param->value = vmw_fifo_have_3d(dev_priv) ? 1 : 0;
fb1d9738 54 break;
f77cef3d
TH
55 case DRM_VMW_PARAM_HW_CAPS:
56 param->value = dev_priv->capabilities;
57 break;
58 case DRM_VMW_PARAM_FIFO_CAPS:
59 param->value = dev_priv->fifo.capabilities;
60 break;
30f47fc8 61 case DRM_VMW_PARAM_MAX_FB_SIZE:
bc2d6508 62 param->value = dev_priv->prim_bb_mem;
30f47fc8 63 break;
f63f6a59
TH
64 case DRM_VMW_PARAM_FIFO_HW_VERSION:
65 {
66 __le32 __iomem *fifo_mem = dev_priv->mmio_virt;
ebd4c6f6 67 const struct vmw_fifo_state *fifo = &dev_priv->fifo;
f63f6a59 68
a6fc955f
TH
69 if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) {
70 param->value = SVGA3D_HWVERSION_WS8_B1;
71 break;
72 }
73
ebd4c6f6
TH
74 param->value =
75 ioread32(fifo_mem +
76 ((fifo->capabilities &
77 SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
78 SVGA_FIFO_3D_HWVERSION_REVISED :
79 SVGA_FIFO_3D_HWVERSION));
f63f6a59
TH
80 break;
81 }
716a2fd6 82 case DRM_VMW_PARAM_MAX_SURF_MEMORY:
a6fc955f
TH
83 if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
84 !vmw_fp->gb_aware)
85 param->value = dev_priv->max_mob_pages * PAGE_SIZE / 2;
86 else
87 param->value = dev_priv->memory_size;
716a2fd6
TH
88 break;
89 case DRM_VMW_PARAM_3D_CAPS_SIZE:
a6fc955f
TH
90 if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
91 vmw_fp->gb_aware)
92 param->value = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
93 else if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS)
94 param->value = sizeof(struct svga_3d_compat_cap) +
95 sizeof(uint32_t);
716a2fd6
TH
96 else
97 param->value = (SVGA_FIFO_3D_CAPS_LAST -
a6fc955f
TH
98 SVGA_FIFO_3D_CAPS + 1) *
99 sizeof(uint32_t);
716a2fd6 100 break;
311474db 101 case DRM_VMW_PARAM_MAX_MOB_MEMORY:
a6fc955f 102 vmw_fp->gb_aware = true;
311474db
TH
103 param->value = dev_priv->max_mob_pages * PAGE_SIZE;
104 break;
857aea1c
CL
105 case DRM_VMW_PARAM_MAX_MOB_SIZE:
106 param->value = dev_priv->max_mob_size;
107 break;
fb1d9738
JB
108 default:
109 DRM_ERROR("Illegal vmwgfx get param request: %d\n",
110 param->param);
111 return -EINVAL;
112 }
113
114 return 0;
115}
f63f6a59 116
a6fc955f
TH
117static int vmw_fill_compat_cap(struct vmw_private *dev_priv, void *bounce,
118 size_t size)
119{
120 struct svga_3d_compat_cap *compat_cap =
121 (struct svga_3d_compat_cap *) bounce;
122 unsigned int i;
123 size_t pair_offset = offsetof(struct svga_3d_compat_cap, pairs);
124 unsigned int max_size;
125
126 if (size < pair_offset)
127 return -EINVAL;
128
129 max_size = (size - pair_offset) / sizeof(SVGA3dCapPair);
130
131 if (max_size > SVGA3D_DEVCAP_MAX)
132 max_size = SVGA3D_DEVCAP_MAX;
133
134 compat_cap->header.length =
135 (pair_offset + max_size * sizeof(SVGA3dCapPair)) / sizeof(u32);
136 compat_cap->header.type = SVGA3DCAPS_RECORD_DEVCAPS;
137
496eb6fd 138 spin_lock(&dev_priv->cap_lock);
a6fc955f
TH
139 for (i = 0; i < max_size; ++i) {
140 vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
141 compat_cap->pairs[i][0] = i;
142 compat_cap->pairs[i][1] = vmw_read(dev_priv, SVGA_REG_DEV_CAP);
143 }
496eb6fd 144 spin_unlock(&dev_priv->cap_lock);
a6fc955f
TH
145
146 return 0;
147}
148
f63f6a59
TH
149
150int vmw_get_cap_3d_ioctl(struct drm_device *dev, void *data,
151 struct drm_file *file_priv)
152{
153 struct drm_vmw_get_3d_cap_arg *arg =
154 (struct drm_vmw_get_3d_cap_arg *) data;
155 struct vmw_private *dev_priv = vmw_priv(dev);
156 uint32_t size;
157 __le32 __iomem *fifo_mem;
158 void __user *buffer = (void __user *)((unsigned long)(arg->buffer));
159 void *bounce;
160 int ret;
716a2fd6 161 bool gb_objects = !!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS);
a6fc955f 162 struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
f63f6a59
TH
163
164 if (unlikely(arg->pad64 != 0)) {
165 DRM_ERROR("Illegal GET_3D_CAP argument.\n");
166 return -EINVAL;
167 }
168
a6fc955f
TH
169 if (gb_objects && vmw_fp->gb_aware)
170 size = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
171 else if (gb_objects)
172 size = sizeof(struct svga_3d_compat_cap) + sizeof(uint32_t);
716a2fd6 173 else
a6fc955f
TH
174 size = (SVGA_FIFO_3D_CAPS_LAST - SVGA_FIFO_3D_CAPS + 1) *
175 sizeof(uint32_t);
f63f6a59
TH
176
177 if (arg->max_size < size)
178 size = arg->max_size;
179
a6fc955f 180 bounce = vzalloc(size);
f63f6a59
TH
181 if (unlikely(bounce == NULL)) {
182 DRM_ERROR("Failed to allocate bounce buffer for 3D caps.\n");
183 return -ENOMEM;
184 }
185
a6fc955f
TH
186 if (gb_objects && vmw_fp->gb_aware) {
187 int i, num;
716a2fd6
TH
188 uint32_t *bounce32 = (uint32_t *) bounce;
189
a6fc955f
TH
190 num = size / sizeof(uint32_t);
191 if (num > SVGA3D_DEVCAP_MAX)
192 num = SVGA3D_DEVCAP_MAX;
193
496eb6fd 194 spin_lock(&dev_priv->cap_lock);
a6fc955f 195 for (i = 0; i < num; ++i) {
716a2fd6
TH
196 vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
197 *bounce32++ = vmw_read(dev_priv, SVGA_REG_DEV_CAP);
198 }
496eb6fd 199 spin_unlock(&dev_priv->cap_lock);
a6fc955f
TH
200 } else if (gb_objects) {
201 ret = vmw_fill_compat_cap(dev_priv, bounce, size);
202 if (unlikely(ret != 0))
203 goto out_err;
716a2fd6 204 } else {
716a2fd6
TH
205 fifo_mem = dev_priv->mmio_virt;
206 memcpy_fromio(bounce, &fifo_mem[SVGA_FIFO_3D_CAPS], size);
207 }
f63f6a59
TH
208
209 ret = copy_to_user(buffer, bounce, size);
888155bb
DC
210 if (ret)
211 ret = -EFAULT;
a6fc955f 212out_err:
f63f6a59
TH
213 vfree(bounce);
214
215 if (unlikely(ret != 0))
216 DRM_ERROR("Failed to report 3D caps info.\n");
217
218 return ret;
219}
2fcd5a73
JB
220
221int vmw_present_ioctl(struct drm_device *dev, void *data,
222 struct drm_file *file_priv)
223{
224 struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
225 struct vmw_private *dev_priv = vmw_priv(dev);
226 struct drm_vmw_present_arg *arg =
227 (struct drm_vmw_present_arg *)data;
228 struct vmw_surface *surface;
2fcd5a73
JB
229 struct drm_vmw_rect __user *clips_ptr;
230 struct drm_vmw_rect *clips = NULL;
786b99ed 231 struct drm_framebuffer *fb;
2fcd5a73 232 struct vmw_framebuffer *vfb;
c0951b79 233 struct vmw_resource *res;
2fcd5a73
JB
234 uint32_t num_clips;
235 int ret;
236
237 num_clips = arg->num_clips;
238 clips_ptr = (struct drm_vmw_rect *)(unsigned long)arg->clips_ptr;
239
240 if (unlikely(num_clips == 0))
241 return 0;
242
243 if (clips_ptr == NULL) {
244 DRM_ERROR("Variable clips_ptr must be specified.\n");
245 ret = -EINVAL;
246 goto out_clips;
247 }
248
24bb5a0c 249 clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
2fcd5a73
JB
250 if (clips == NULL) {
251 DRM_ERROR("Failed to allocate clip rect list.\n");
252 ret = -ENOMEM;
253 goto out_clips;
254 }
255
256 ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
257 if (ret) {
258 DRM_ERROR("Failed to copy clip rects from userspace.\n");
d2c184fb 259 ret = -EFAULT;
2fcd5a73
JB
260 goto out_no_copy;
261 }
262
bbe4b99f 263 drm_modeset_lock_all(dev);
2fcd5a73 264
786b99ed
DV
265 fb = drm_framebuffer_lookup(dev, arg->fb_id);
266 if (!fb) {
2fcd5a73 267 DRM_ERROR("Invalid framebuffer id.\n");
43789b9e 268 ret = -ENOENT;
2fcd5a73
JB
269 goto out_no_fb;
270 }
786b99ed 271 vfb = vmw_framebuffer_to_vfb(fb);
2fcd5a73 272
294adf7d 273 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
2fcd5a73
JB
274 if (unlikely(ret != 0))
275 goto out_no_ttm_lock;
276
c0951b79
TH
277 ret = vmw_user_resource_lookup_handle(dev_priv, tfile, arg->sid,
278 user_surface_converter,
279 &res);
2fcd5a73
JB
280 if (ret)
281 goto out_no_surface;
282
c0951b79 283 surface = vmw_res_to_srf(res);
2fcd5a73
JB
284 ret = vmw_kms_present(dev_priv, file_priv,
285 vfb, surface, arg->sid,
286 arg->dest_x, arg->dest_y,
287 clips, num_clips);
288
289 /* vmw_user_surface_lookup takes one ref so does new_fb */
290 vmw_surface_unreference(&surface);
291
292out_no_surface:
294adf7d 293 ttm_read_unlock(&dev_priv->reservation_sem);
2fcd5a73 294out_no_ttm_lock:
2fd5eaba 295 drm_framebuffer_unreference(fb);
2fcd5a73 296out_no_fb:
bbe4b99f 297 drm_modeset_unlock_all(dev);
2fcd5a73
JB
298out_no_copy:
299 kfree(clips);
300out_clips:
301 return ret;
302}
303
304int vmw_present_readback_ioctl(struct drm_device *dev, void *data,
305 struct drm_file *file_priv)
306{
307 struct vmw_private *dev_priv = vmw_priv(dev);
308 struct drm_vmw_present_readback_arg *arg =
309 (struct drm_vmw_present_readback_arg *)data;
310 struct drm_vmw_fence_rep __user *user_fence_rep =
311 (struct drm_vmw_fence_rep __user *)
312 (unsigned long)arg->fence_rep;
2fcd5a73
JB
313 struct drm_vmw_rect __user *clips_ptr;
314 struct drm_vmw_rect *clips = NULL;
786b99ed 315 struct drm_framebuffer *fb;
2fcd5a73
JB
316 struct vmw_framebuffer *vfb;
317 uint32_t num_clips;
318 int ret;
319
320 num_clips = arg->num_clips;
321 clips_ptr = (struct drm_vmw_rect *)(unsigned long)arg->clips_ptr;
322
323 if (unlikely(num_clips == 0))
324 return 0;
325
326 if (clips_ptr == NULL) {
327 DRM_ERROR("Argument clips_ptr must be specified.\n");
328 ret = -EINVAL;
329 goto out_clips;
330 }
331
24bb5a0c 332 clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
2fcd5a73
JB
333 if (clips == NULL) {
334 DRM_ERROR("Failed to allocate clip rect list.\n");
335 ret = -ENOMEM;
336 goto out_clips;
337 }
338
339 ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
340 if (ret) {
341 DRM_ERROR("Failed to copy clip rects from userspace.\n");
d2c184fb 342 ret = -EFAULT;
2fcd5a73
JB
343 goto out_no_copy;
344 }
345
bbe4b99f 346 drm_modeset_lock_all(dev);
2fcd5a73 347
786b99ed
DV
348 fb = drm_framebuffer_lookup(dev, arg->fb_id);
349 if (!fb) {
2fcd5a73 350 DRM_ERROR("Invalid framebuffer id.\n");
43789b9e 351 ret = -ENOENT;
2fcd5a73
JB
352 goto out_no_fb;
353 }
354
786b99ed 355 vfb = vmw_framebuffer_to_vfb(fb);
2fcd5a73
JB
356 if (!vfb->dmabuf) {
357 DRM_ERROR("Framebuffer not dmabuf backed.\n");
358 ret = -EINVAL;
2fd5eaba 359 goto out_no_ttm_lock;
2fcd5a73
JB
360 }
361
294adf7d 362 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
2fcd5a73
JB
363 if (unlikely(ret != 0))
364 goto out_no_ttm_lock;
365
366 ret = vmw_kms_readback(dev_priv, file_priv,
367 vfb, user_fence_rep,
368 clips, num_clips);
369
294adf7d 370 ttm_read_unlock(&dev_priv->reservation_sem);
2fcd5a73 371out_no_ttm_lock:
2fd5eaba 372 drm_framebuffer_unreference(fb);
2fcd5a73 373out_no_fb:
bbe4b99f 374 drm_modeset_unlock_all(dev);
2fcd5a73
JB
375out_no_copy:
376 kfree(clips);
377out_clips:
378 return ret;
379}
5438ae88
TH
380
381
382/**
383 * vmw_fops_poll - wrapper around the drm_poll function
384 *
385 * @filp: See the linux fops poll documentation.
386 * @wait: See the linux fops poll documentation.
387 *
388 * Wrapper around the drm_poll function that makes sure the device is
389 * processing the fifo if drm_poll decides to wait.
390 */
391unsigned int vmw_fops_poll(struct file *filp, struct poll_table_struct *wait)
392{
393 struct drm_file *file_priv = filp->private_data;
394 struct vmw_private *dev_priv =
395 vmw_priv(file_priv->minor->dev);
396
397 vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
398 return drm_poll(filp, wait);
399}
400
401
402/**
403 * vmw_fops_read - wrapper around the drm_read function
404 *
405 * @filp: See the linux fops read documentation.
406 * @buffer: See the linux fops read documentation.
407 * @count: See the linux fops read documentation.
408 * offset: See the linux fops read documentation.
409 *
410 * Wrapper around the drm_read function that makes sure the device is
411 * processing the fifo if drm_read decides to wait.
412 */
413ssize_t vmw_fops_read(struct file *filp, char __user *buffer,
414 size_t count, loff_t *offset)
415{
416 struct drm_file *file_priv = filp->private_data;
417 struct vmw_private *dev_priv =
418 vmw_priv(file_priv->minor->dev);
419
420 vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
421 return drm_read(filp, buffer, count, offset);
422}