[linux-2.6-block.git] / drivers / gpu / drm / vmwgfx / vmwgfx_ioctl.c

/**************************************************************************
 *
 * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
 * USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 **************************************************************************/

#include "vmwgfx_drv.h"
#include <drm/vmwgfx_drm.h>
#include "vmwgfx_kms.h"

struct svga_3d_compat_cap {
	SVGA3dCapsRecordHeader header;
	SVGA3dCapPair pairs[SVGA3D_DEVCAP_MAX];
};

int vmw_getparam_ioctl(struct drm_device *dev, void *data,
		       struct drm_file *file_priv)
{
	struct vmw_private *dev_priv = vmw_priv(dev);
	struct drm_vmw_getparam_arg *param =
	    (struct drm_vmw_getparam_arg *)data;
	struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);

	switch (param->param) {
	case DRM_VMW_PARAM_NUM_STREAMS:
		param->value = vmw_overlay_num_overlays(dev_priv);
		break;
	case DRM_VMW_PARAM_NUM_FREE_STREAMS:
		param->value = vmw_overlay_num_free_overlays(dev_priv);
		break;
	case DRM_VMW_PARAM_3D:
		param->value = vmw_fifo_have_3d(dev_priv) ? 1 : 0;
		break;
	case DRM_VMW_PARAM_HW_CAPS:
		param->value = dev_priv->capabilities;
		break;
	case DRM_VMW_PARAM_FIFO_CAPS:
		param->value = dev_priv->fifo.capabilities;
		break;
	case DRM_VMW_PARAM_MAX_FB_SIZE:
		param->value = dev_priv->prim_bb_mem;
		break;
	case DRM_VMW_PARAM_FIFO_HW_VERSION:
	{
		__le32 __iomem *fifo_mem = dev_priv->mmio_virt;
		const struct vmw_fifo_state *fifo = &dev_priv->fifo;

		if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) {
			param->value = SVGA3D_HWVERSION_WS8_B1;
			break;
		}

		param->value =
			ioread32(fifo_mem +
				 ((fifo->capabilities &
				   SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
				  SVGA_FIFO_3D_HWVERSION_REVISED :
				  SVGA_FIFO_3D_HWVERSION));
		break;
	}
	case DRM_VMW_PARAM_MAX_SURF_MEMORY:
		if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
		    !vmw_fp->gb_aware)
			param->value = dev_priv->max_mob_pages * PAGE_SIZE / 2;
		else
			param->value = dev_priv->memory_size;
		break;
	case DRM_VMW_PARAM_3D_CAPS_SIZE:
		if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
		    vmw_fp->gb_aware)
			param->value = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
		else if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS)
			param->value = sizeof(struct svga_3d_compat_cap) +
				sizeof(uint32_t);
		else
			param->value = (SVGA_FIFO_3D_CAPS_LAST -
					SVGA_FIFO_3D_CAPS + 1) *
				sizeof(uint32_t);
		break;
	case DRM_VMW_PARAM_MAX_MOB_MEMORY:
		vmw_fp->gb_aware = true;
		param->value = dev_priv->max_mob_pages * PAGE_SIZE;
		break;
	default:
		DRM_ERROR("Illegal vmwgfx get param request: %d\n",
			  param->param);
		return -EINVAL;
	}

	return 0;
}

static int vmw_fill_compat_cap(struct vmw_private *dev_priv, void *bounce,
			       size_t size)
{
	struct svga_3d_compat_cap *compat_cap =
		(struct svga_3d_compat_cap *) bounce;
	unsigned int i;
	size_t pair_offset = offsetof(struct svga_3d_compat_cap, pairs);
	unsigned int max_size;

	if (size < pair_offset)
		return -EINVAL;

	max_size = (size - pair_offset) / sizeof(SVGA3dCapPair);

	if (max_size > SVGA3D_DEVCAP_MAX)
		max_size = SVGA3D_DEVCAP_MAX;

	compat_cap->header.length =
		(pair_offset + max_size * sizeof(SVGA3dCapPair)) / sizeof(u32);
	compat_cap->header.type = SVGA3DCAPS_RECORD_DEVCAPS;

	mutex_lock(&dev_priv->hw_mutex);
	for (i = 0; i < max_size; ++i) {
		vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
		compat_cap->pairs[i][0] = i;
		compat_cap->pairs[i][1] = vmw_read(dev_priv, SVGA_REG_DEV_CAP);
	}
	mutex_unlock(&dev_priv->hw_mutex);

	return 0;
}


int vmw_get_cap_3d_ioctl(struct drm_device *dev, void *data,
			 struct drm_file *file_priv)
{
	struct drm_vmw_get_3d_cap_arg *arg =
		(struct drm_vmw_get_3d_cap_arg *) data;
	struct vmw_private *dev_priv = vmw_priv(dev);
	uint32_t size;
	__le32 __iomem *fifo_mem;
	void __user *buffer = (void __user *)((unsigned long)(arg->buffer));
	void *bounce;
	int ret;
	bool gb_objects = !!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS);
	struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);

	if (unlikely(arg->pad64 != 0)) {
		DRM_ERROR("Illegal GET_3D_CAP argument.\n");
		return -EINVAL;
	}

	if (gb_objects && vmw_fp->gb_aware)
		size = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
	else if (gb_objects)
		size = sizeof(struct svga_3d_compat_cap) + sizeof(uint32_t);
	else
		size = (SVGA_FIFO_3D_CAPS_LAST - SVGA_FIFO_3D_CAPS + 1) *
			sizeof(uint32_t);

	if (arg->max_size < size)
		size = arg->max_size;

	bounce = vzalloc(size);
	if (unlikely(bounce == NULL)) {
		DRM_ERROR("Failed to allocate bounce buffer for 3D caps.\n");
		return -ENOMEM;
	}

	if (gb_objects && vmw_fp->gb_aware) {
		int i, num;
		uint32_t *bounce32 = (uint32_t *) bounce;

		num = size / sizeof(uint32_t);
		if (num > SVGA3D_DEVCAP_MAX)
			num = SVGA3D_DEVCAP_MAX;

		mutex_lock(&dev_priv->hw_mutex);
		for (i = 0; i < num; ++i) {
			vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
			*bounce32++ = vmw_read(dev_priv, SVGA_REG_DEV_CAP);
		}
		mutex_unlock(&dev_priv->hw_mutex);
	} else if (gb_objects) {
		ret = vmw_fill_compat_cap(dev_priv, bounce, size);
		if (unlikely(ret != 0))
			goto out_err;
	} else {
		fifo_mem = dev_priv->mmio_virt;
		memcpy_fromio(bounce, &fifo_mem[SVGA_FIFO_3D_CAPS], size);
	}

	ret = copy_to_user(buffer, bounce, size);
	if (ret)
		ret = -EFAULT;
out_err:
	vfree(bounce);

	if (unlikely(ret != 0))
		DRM_ERROR("Failed to report 3D caps info.\n");

	return ret;
}

int vmw_present_ioctl(struct drm_device *dev, void *data,
		      struct drm_file *file_priv)
{
	struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
	struct vmw_private *dev_priv = vmw_priv(dev);
	struct drm_vmw_present_arg *arg =
		(struct drm_vmw_present_arg *)data;
	struct vmw_surface *surface;
	struct vmw_master *vmaster = vmw_master(file_priv->master);
	struct drm_vmw_rect __user *clips_ptr;
	struct drm_vmw_rect *clips = NULL;
	struct drm_framebuffer *fb;
	struct vmw_framebuffer *vfb;
	struct vmw_resource *res;
	uint32_t num_clips;
	int ret;

	num_clips = arg->num_clips;
	clips_ptr = (struct drm_vmw_rect *)(unsigned long)arg->clips_ptr;

	if (unlikely(num_clips == 0))
		return 0;

	if (clips_ptr == NULL) {
		DRM_ERROR("Variable clips_ptr must be specified.\n");
		ret = -EINVAL;
		goto out_clips;
	}

	clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
	if (clips == NULL) {
		DRM_ERROR("Failed to allocate clip rect list.\n");
		ret = -ENOMEM;
		goto out_clips;
	}

	ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
	if (ret) {
		DRM_ERROR("Failed to copy clip rects from userspace.\n");
		ret = -EFAULT;
		goto out_no_copy;
	}

	drm_modeset_lock_all(dev);

	fb = drm_framebuffer_lookup(dev, arg->fb_id);
	if (!fb) {
		DRM_ERROR("Invalid framebuffer id.\n");
		ret = -ENOENT;
		goto out_no_fb;
	}
	vfb = vmw_framebuffer_to_vfb(fb);

	ret = ttm_read_lock(&vmaster->lock, true);
	if (unlikely(ret != 0))
		goto out_no_ttm_lock;

	ret = vmw_user_resource_lookup_handle(dev_priv, tfile, arg->sid,
					      user_surface_converter,
					      &res);
	if (ret)
		goto out_no_surface;

	surface = vmw_res_to_srf(res);
	ret = vmw_kms_present(dev_priv, file_priv,
			      vfb, surface, arg->sid,
			      arg->dest_x, arg->dest_y,
			      clips, num_clips);

	/* vmw_user_surface_lookup takes one ref so does new_fb */
	vmw_surface_unreference(&surface);

out_no_surface:
	ttm_read_unlock(&vmaster->lock);
out_no_ttm_lock:
	drm_framebuffer_unreference(fb);
out_no_fb:
	drm_modeset_unlock_all(dev);
out_no_copy:
	kfree(clips);
out_clips:
	return ret;
}

int vmw_present_readback_ioctl(struct drm_device *dev, void *data,
			       struct drm_file *file_priv)
{
	struct vmw_private *dev_priv = vmw_priv(dev);
	struct drm_vmw_present_readback_arg *arg =
		(struct drm_vmw_present_readback_arg *)data;
	struct drm_vmw_fence_rep __user *user_fence_rep =
		(struct drm_vmw_fence_rep __user *)
		(unsigned long)arg->fence_rep;
	struct vmw_master *vmaster = vmw_master(file_priv->master);
	struct drm_vmw_rect __user *clips_ptr;
	struct drm_vmw_rect *clips = NULL;
	struct drm_framebuffer *fb;
	struct vmw_framebuffer *vfb;
	uint32_t num_clips;
	int ret;

	num_clips = arg->num_clips;
	clips_ptr = (struct drm_vmw_rect *)(unsigned long)arg->clips_ptr;

	if (unlikely(num_clips == 0))
		return 0;

	if (clips_ptr == NULL) {
		DRM_ERROR("Argument clips_ptr must be specified.\n");
		ret = -EINVAL;
		goto out_clips;
	}

	clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
	if (clips == NULL) {
		DRM_ERROR("Failed to allocate clip rect list.\n");
		ret = -ENOMEM;
		goto out_clips;
	}

	ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
	if (ret) {
		DRM_ERROR("Failed to copy clip rects from userspace.\n");
		ret = -EFAULT;
		goto out_no_copy;
	}

	drm_modeset_lock_all(dev);

	fb = drm_framebuffer_lookup(dev, arg->fb_id);
	if (!fb) {
		DRM_ERROR("Invalid framebuffer id.\n");
		ret = -ENOENT;
		goto out_no_fb;
	}

	vfb = vmw_framebuffer_to_vfb(fb);
	if (!vfb->dmabuf) {
		DRM_ERROR("Framebuffer not dmabuf backed.\n");
		ret = -EINVAL;
		goto out_no_ttm_lock;
	}

	ret = ttm_read_lock(&vmaster->lock, true);
	if (unlikely(ret != 0))
		goto out_no_ttm_lock;

	ret = vmw_kms_readback(dev_priv, file_priv,
			       vfb, user_fence_rep,
			       clips, num_clips);

	ttm_read_unlock(&vmaster->lock);
out_no_ttm_lock:
	drm_framebuffer_unreference(fb);
out_no_fb:
	drm_modeset_unlock_all(dev);
out_no_copy:
	kfree(clips);
out_clips:
	return ret;
}


/**
 * vmw_fops_poll - wrapper around the drm_poll function
 *
 * @filp: See the linux fops poll documentation.
 * @wait: See the linux fops poll documentation.
 *
 * Wrapper around the drm_poll function that makes sure the device is
 * processing the fifo if drm_poll decides to wait.
 */
unsigned int vmw_fops_poll(struct file *filp, struct poll_table_struct *wait)
{
	struct drm_file *file_priv = filp->private_data;
	struct vmw_private *dev_priv =
		vmw_priv(file_priv->minor->dev);

	vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
	return drm_poll(filp, wait);
}


/**
 * vmw_fops_read - wrapper around the drm_read function
 *
 * @filp: See the linux fops read documentation.
 * @buffer: See the linux fops read documentation.
 * @count: See the linux fops read documentation.
 * offset: See the linux fops read documentation.
 *
 * Wrapper around the drm_read function that makes sure the device is
 * processing the fifo if drm_read decides to wait.
 */
ssize_t vmw_fops_read(struct file *filp, char __user *buffer,
		      size_t count, loff_t *offset)
{
	struct drm_file *file_priv = filp->private_data;
	struct vmw_private *dev_priv =
		vmw_priv(file_priv->minor->dev);

	vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
	return drm_read(filp, buffer, count, offset);
}
Commit	Line	Data
fb1d9738 JB	1	/**************************************************************************
	2	*
	3	* Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
	4	* All Rights Reserved.
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a
	7	* copy of this software and associated documentation files (the
	8	* "Software"), to deal in the Software without restriction, including
	9	* without limitation the rights to use, copy, modify, merge, publish,
	10	* distribute, sub license, and/or sell copies of the Software, and to
	11	* permit persons to whom the Software is furnished to do so, subject to
	12	* the following conditions:
	13	*
	14	* The above copyright notice and this permission notice (including the
	15	* next paragraph) shall be included in all copies or substantial portions
	16	* of the Software.
	17	*
	18	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	19	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	20	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
	21	* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
	22	* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
	23	* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
	24	* USE OR OTHER DEALINGS IN THE SOFTWARE.
	25	*
	26	**************************************************************************/
	27
	28	#include "vmwgfx_drv.h"
760285e7	29	#include <drm/vmwgfx_drm.h>
2fcd5a73	30	#include "vmwgfx_kms.h"
fb1d9738	31
a6fc955f TH	32	struct svga_3d_compat_cap {
	33	SVGA3dCapsRecordHeader header;
	34	SVGA3dCapPair pairs[SVGA3D_DEVCAP_MAX];
	35	};
	36
fb1d9738 JB	37	int vmw_getparam_ioctl(struct drm_device dev, void data,
	38	struct drm_file *file_priv)
	39	{
	40	struct vmw_private *dev_priv = vmw_priv(dev);
	41	struct drm_vmw_getparam_arg *param =
	42	(struct drm_vmw_getparam_arg *)data;
a6fc955f	43	struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
fb1d9738 JB	44
	45	switch (param->param) {
	46	case DRM_VMW_PARAM_NUM_STREAMS:
	47	param->value = vmw_overlay_num_overlays(dev_priv);
	48	break;
	49	case DRM_VMW_PARAM_NUM_FREE_STREAMS:
	50	param->value = vmw_overlay_num_free_overlays(dev_priv);
	51	break;
	52	case DRM_VMW_PARAM_3D:
8e19a951	53	param->value = vmw_fifo_have_3d(dev_priv) ? 1 : 0;
fb1d9738	54	break;
f77cef3d TH	55	case DRM_VMW_PARAM_HW_CAPS:
	56	param->value = dev_priv->capabilities;
	57	break;
	58	case DRM_VMW_PARAM_FIFO_CAPS:
	59	param->value = dev_priv->fifo.capabilities;
	60	break;
30f47fc8	61	case DRM_VMW_PARAM_MAX_FB_SIZE:
bc2d6508	62	param->value = dev_priv->prim_bb_mem;
30f47fc8	63	break;
f63f6a59 TH	64	case DRM_VMW_PARAM_FIFO_HW_VERSION:
	65	{
	66	__le32 __iomem *fifo_mem = dev_priv->mmio_virt;
ebd4c6f6	67	const struct vmw_fifo_state *fifo = &dev_priv->fifo;
f63f6a59	68
a6fc955f TH	69	if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) {
	70	param->value = SVGA3D_HWVERSION_WS8_B1;
	71	break;
	72	}
	73
ebd4c6f6 TH	74	param->value =
	75	ioread32(fifo_mem +
	76	((fifo->capabilities &
	77	SVGA_FIFO_CAP_3D_HWVERSION_REVISED) ?
	78	SVGA_FIFO_3D_HWVERSION_REVISED :
	79	SVGA_FIFO_3D_HWVERSION));
f63f6a59 TH	80	break;
f63f6a59 TH	81	}
716a2fd6	82	case DRM_VMW_PARAM_MAX_SURF_MEMORY:
a6fc955f TH	83	if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
	84	!vmw_fp->gb_aware)
	85	param->value = dev_priv->max_mob_pages * PAGE_SIZE / 2;
	86	else
	87	param->value = dev_priv->memory_size;
716a2fd6 TH	88	break;
716a2fd6 TH	89	case DRM_VMW_PARAM_3D_CAPS_SIZE:
a6fc955f TH	90	if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS) &&
	91	vmw_fp->gb_aware)
	92	param->value = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
	93	else if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS)
	94	param->value = sizeof(struct svga_3d_compat_cap) +
	95	sizeof(uint32_t);
716a2fd6 TH	96	else
716a2fd6 TH	97	param->value = (SVGA_FIFO_3D_CAPS_LAST -
a6fc955f TH	98	SVGA_FIFO_3D_CAPS + 1) *
a6fc955f TH	99	sizeof(uint32_t);
716a2fd6	100	break;
311474db	101	case DRM_VMW_PARAM_MAX_MOB_MEMORY:
a6fc955f	102	vmw_fp->gb_aware = true;
311474db TH	103	param->value = dev_priv->max_mob_pages * PAGE_SIZE;
311474db TH	104	break;
fb1d9738 JB	105	default:
	106	DRM_ERROR("Illegal vmwgfx get param request: %d\n",
	107	param->param);
	108	return -EINVAL;
	109	}
	110
	111	return 0;
	112	}
f63f6a59	113
a6fc955f TH	114	static int vmw_fill_compat_cap(struct vmw_private dev_priv, void bounce,
	115	size_t size)
	116	{
	117	struct svga_3d_compat_cap *compat_cap =
	118	(struct svga_3d_compat_cap *) bounce;
	119	unsigned int i;
	120	size_t pair_offset = offsetof(struct svga_3d_compat_cap, pairs);
	121	unsigned int max_size;
	122
	123	if (size < pair_offset)
	124	return -EINVAL;
	125
	126	max_size = (size - pair_offset) / sizeof(SVGA3dCapPair);
	127
	128	if (max_size > SVGA3D_DEVCAP_MAX)
	129	max_size = SVGA3D_DEVCAP_MAX;
	130
	131	compat_cap->header.length =
	132	(pair_offset + max_size * sizeof(SVGA3dCapPair)) / sizeof(u32);
	133	compat_cap->header.type = SVGA3DCAPS_RECORD_DEVCAPS;
	134
	135	mutex_lock(&dev_priv->hw_mutex);
	136	for (i = 0; i < max_size; ++i) {
	137	vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
	138	compat_cap->pairs[i][0] = i;
	139	compat_cap->pairs[i][1] = vmw_read(dev_priv, SVGA_REG_DEV_CAP);
	140	}
	141	mutex_unlock(&dev_priv->hw_mutex);
	142
	143	return 0;
	144	}
	145
f63f6a59 TH	146
	147	int vmw_get_cap_3d_ioctl(struct drm_device dev, void data,
	148	struct drm_file *file_priv)
	149	{
	150	struct drm_vmw_get_3d_cap_arg *arg =
	151	(struct drm_vmw_get_3d_cap_arg *) data;
	152	struct vmw_private *dev_priv = vmw_priv(dev);
	153	uint32_t size;
	154	__le32 __iomem *fifo_mem;
	155	void __user buffer = (void __user )((unsigned long)(arg->buffer));
	156	void *bounce;
	157	int ret;
716a2fd6	158	bool gb_objects = !!(dev_priv->capabilities & SVGA_CAP_GBOBJECTS);
a6fc955f	159	struct vmw_fpriv *vmw_fp = vmw_fpriv(file_priv);
f63f6a59 TH	160
	161	if (unlikely(arg->pad64 != 0)) {
	162	DRM_ERROR("Illegal GET_3D_CAP argument.\n");
	163	return -EINVAL;
	164	}
	165
a6fc955f TH	166	if (gb_objects && vmw_fp->gb_aware)
	167	size = SVGA3D_DEVCAP_MAX * sizeof(uint32_t);
	168	else if (gb_objects)
	169	size = sizeof(struct svga_3d_compat_cap) + sizeof(uint32_t);
716a2fd6	170	else
a6fc955f TH	171	size = (SVGA_FIFO_3D_CAPS_LAST - SVGA_FIFO_3D_CAPS + 1) *
a6fc955f TH	172	sizeof(uint32_t);
f63f6a59 TH	173
	174	if (arg->max_size < size)
	175	size = arg->max_size;
	176
a6fc955f	177	bounce = vzalloc(size);
f63f6a59 TH	178	if (unlikely(bounce == NULL)) {
	179	DRM_ERROR("Failed to allocate bounce buffer for 3D caps.\n");
	180	return -ENOMEM;
	181	}
	182
a6fc955f TH	183	if (gb_objects && vmw_fp->gb_aware) {
a6fc955f TH	184	int i, num;
716a2fd6 TH	185	uint32_t bounce32 = (uint32_t ) bounce;
716a2fd6 TH	186
a6fc955f TH	187	num = size / sizeof(uint32_t);
	188	if (num > SVGA3D_DEVCAP_MAX)
	189	num = SVGA3D_DEVCAP_MAX;
	190
716a2fd6	191	mutex_lock(&dev_priv->hw_mutex);
a6fc955f	192	for (i = 0; i < num; ++i) {
716a2fd6 TH	193	vmw_write(dev_priv, SVGA_REG_DEV_CAP, i);
	194	*bounce32++ = vmw_read(dev_priv, SVGA_REG_DEV_CAP);
	195	}
	196	mutex_unlock(&dev_priv->hw_mutex);
a6fc955f TH	197	} else if (gb_objects) {
	198	ret = vmw_fill_compat_cap(dev_priv, bounce, size);
	199	if (unlikely(ret != 0))
	200	goto out_err;
716a2fd6	201	} else {
716a2fd6 TH	202	fifo_mem = dev_priv->mmio_virt;
	203	memcpy_fromio(bounce, &fifo_mem[SVGA_FIFO_3D_CAPS], size);
	204	}
f63f6a59 TH	205
f63f6a59 TH	206	ret = copy_to_user(buffer, bounce, size);
888155bb DC	207	if (ret)
888155bb DC	208	ret = -EFAULT;
a6fc955f	209	out_err:
f63f6a59 TH	210	vfree(bounce);
	211
	212	if (unlikely(ret != 0))
	213	DRM_ERROR("Failed to report 3D caps info.\n");
	214
	215	return ret;
	216	}
2fcd5a73 JB	217
	218	int vmw_present_ioctl(struct drm_device dev, void data,
	219	struct drm_file *file_priv)
	220	{
	221	struct ttm_object_file *tfile = vmw_fpriv(file_priv)->tfile;
	222	struct vmw_private *dev_priv = vmw_priv(dev);
	223	struct drm_vmw_present_arg *arg =
	224	(struct drm_vmw_present_arg *)data;
	225	struct vmw_surface *surface;
	226	struct vmw_master *vmaster = vmw_master(file_priv->master);
	227	struct drm_vmw_rect __user *clips_ptr;
	228	struct drm_vmw_rect *clips = NULL;
786b99ed	229	struct drm_framebuffer *fb;
2fcd5a73	230	struct vmw_framebuffer *vfb;
c0951b79	231	struct vmw_resource *res;
2fcd5a73 JB	232	uint32_t num_clips;
	233	int ret;
	234
	235	num_clips = arg->num_clips;
	236	clips_ptr = (struct drm_vmw_rect *)(unsigned long)arg->clips_ptr;
	237
	238	if (unlikely(num_clips == 0))
	239	return 0;
	240
	241	if (clips_ptr == NULL) {
	242	DRM_ERROR("Variable clips_ptr must be specified.\n");
	243	ret = -EINVAL;
	244	goto out_clips;
	245	}
	246
24bb5a0c	247	clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
2fcd5a73 JB	248	if (clips == NULL) {
	249	DRM_ERROR("Failed to allocate clip rect list.\n");
	250	ret = -ENOMEM;
	251	goto out_clips;
	252	}
	253
	254	ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
	255	if (ret) {
	256	DRM_ERROR("Failed to copy clip rects from userspace.\n");
d2c184fb	257	ret = -EFAULT;
2fcd5a73 JB	258	goto out_no_copy;
	259	}
	260
bbe4b99f	261	drm_modeset_lock_all(dev);
2fcd5a73	262
786b99ed DV	263	fb = drm_framebuffer_lookup(dev, arg->fb_id);
786b99ed DV	264	if (!fb) {
2fcd5a73	265	DRM_ERROR("Invalid framebuffer id.\n");
43789b9e	266	ret = -ENOENT;
2fcd5a73 JB	267	goto out_no_fb;
2fcd5a73 JB	268	}
786b99ed	269	vfb = vmw_framebuffer_to_vfb(fb);
2fcd5a73 JB	270
	271	ret = ttm_read_lock(&vmaster->lock, true);
	272	if (unlikely(ret != 0))
	273	goto out_no_ttm_lock;
	274
c0951b79 TH	275	ret = vmw_user_resource_lookup_handle(dev_priv, tfile, arg->sid,
	276	user_surface_converter,
	277	&res);
2fcd5a73 JB	278	if (ret)
	279	goto out_no_surface;
	280
c0951b79	281	surface = vmw_res_to_srf(res);
2fcd5a73 JB	282	ret = vmw_kms_present(dev_priv, file_priv,
	283	vfb, surface, arg->sid,
	284	arg->dest_x, arg->dest_y,
	285	clips, num_clips);
	286
	287	/* vmw_user_surface_lookup takes one ref so does new_fb */
	288	vmw_surface_unreference(&surface);
	289
	290	out_no_surface:
	291	ttm_read_unlock(&vmaster->lock);
	292	out_no_ttm_lock:
2fd5eaba	293	drm_framebuffer_unreference(fb);
2fcd5a73	294	out_no_fb:
bbe4b99f	295	drm_modeset_unlock_all(dev);
2fcd5a73 JB	296	out_no_copy:
	297	kfree(clips);
	298	out_clips:
	299	return ret;
	300	}
	301
	302	int vmw_present_readback_ioctl(struct drm_device dev, void data,
	303	struct drm_file *file_priv)
	304	{
	305	struct vmw_private *dev_priv = vmw_priv(dev);
	306	struct drm_vmw_present_readback_arg *arg =
	307	(struct drm_vmw_present_readback_arg *)data;
	308	struct drm_vmw_fence_rep __user *user_fence_rep =
	309	(struct drm_vmw_fence_rep __user *)
	310	(unsigned long)arg->fence_rep;
	311	struct vmw_master *vmaster = vmw_master(file_priv->master);
	312	struct drm_vmw_rect __user *clips_ptr;
	313	struct drm_vmw_rect *clips = NULL;
786b99ed	314	struct drm_framebuffer *fb;
2fcd5a73 JB	315	struct vmw_framebuffer *vfb;
	316	uint32_t num_clips;
	317	int ret;
	318
	319	num_clips = arg->num_clips;
	320	clips_ptr = (struct drm_vmw_rect *)(unsigned long)arg->clips_ptr;
	321
	322	if (unlikely(num_clips == 0))
	323	return 0;
	324
	325	if (clips_ptr == NULL) {
	326	DRM_ERROR("Argument clips_ptr must be specified.\n");
	327	ret = -EINVAL;
	328	goto out_clips;
	329	}
	330
24bb5a0c	331	clips = kcalloc(num_clips, sizeof(*clips), GFP_KERNEL);
2fcd5a73 JB	332	if (clips == NULL) {
	333	DRM_ERROR("Failed to allocate clip rect list.\n");
	334	ret = -ENOMEM;
	335	goto out_clips;
	336	}
	337
	338	ret = copy_from_user(clips, clips_ptr, num_clips * sizeof(*clips));
	339	if (ret) {
	340	DRM_ERROR("Failed to copy clip rects from userspace.\n");
d2c184fb	341	ret = -EFAULT;
2fcd5a73 JB	342	goto out_no_copy;
	343	}
	344
bbe4b99f	345	drm_modeset_lock_all(dev);
2fcd5a73	346
786b99ed DV	347	fb = drm_framebuffer_lookup(dev, arg->fb_id);
786b99ed DV	348	if (!fb) {
2fcd5a73	349	DRM_ERROR("Invalid framebuffer id.\n");
43789b9e	350	ret = -ENOENT;
2fcd5a73 JB	351	goto out_no_fb;
	352	}
	353
786b99ed	354	vfb = vmw_framebuffer_to_vfb(fb);
2fcd5a73 JB	355	if (!vfb->dmabuf) {
	356	DRM_ERROR("Framebuffer not dmabuf backed.\n");
	357	ret = -EINVAL;
2fd5eaba	358	goto out_no_ttm_lock;
2fcd5a73 JB	359	}
	360
	361	ret = ttm_read_lock(&vmaster->lock, true);
	362	if (unlikely(ret != 0))
	363	goto out_no_ttm_lock;
	364
	365	ret = vmw_kms_readback(dev_priv, file_priv,
	366	vfb, user_fence_rep,
	367	clips, num_clips);
	368
	369	ttm_read_unlock(&vmaster->lock);
	370	out_no_ttm_lock:
2fd5eaba	371	drm_framebuffer_unreference(fb);
2fcd5a73	372	out_no_fb:
bbe4b99f	373	drm_modeset_unlock_all(dev);
2fcd5a73 JB	374	out_no_copy:
	375	kfree(clips);
	376	out_clips:
	377	return ret;
	378	}
5438ae88 TH	379
	380
	381	/**
	382	* vmw_fops_poll - wrapper around the drm_poll function
	383	*
	384	* @filp: See the linux fops poll documentation.
	385	* @wait: See the linux fops poll documentation.
	386	*
	387	* Wrapper around the drm_poll function that makes sure the device is
	388	* processing the fifo if drm_poll decides to wait.
	389	*/
	390	unsigned int vmw_fops_poll(struct file filp, struct poll_table_struct wait)
	391	{
	392	struct drm_file *file_priv = filp->private_data;
	393	struct vmw_private *dev_priv =
	394	vmw_priv(file_priv->minor->dev);
	395
	396	vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
	397	return drm_poll(filp, wait);
	398	}
	399
	400
	401	/**
	402	* vmw_fops_read - wrapper around the drm_read function
	403	*
	404	* @filp: See the linux fops read documentation.
	405	* @buffer: See the linux fops read documentation.
	406	* @count: See the linux fops read documentation.
	407	* offset: See the linux fops read documentation.
	408	*
	409	* Wrapper around the drm_read function that makes sure the device is
	410	* processing the fifo if drm_read decides to wait.
	411	*/
	412	ssize_t vmw_fops_read(struct file filp, char __user buffer,
	413	size_t count, loff_t *offset)
	414	{
	415	struct drm_file *file_priv = filp->private_data;
	416	struct vmw_private *dev_priv =
	417	vmw_priv(file_priv->minor->dev);
	418
	419	vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC);
	420	return drm_read(filp, buffer, count, offset);
	421	}