drm/vmwgfx: Introduce a pin count to allow for recursive pinning v2
[linux-2.6-block.git] / drivers / gpu / drm / vmwgfx / vmwgfx_drv.h
CommitLineData
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1/**************************************************************************
2 *
c8261a96 3 * Copyright © 2009-2014 VMware, Inc., Palo Alto, CA., USA
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4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#ifndef _VMWGFX_DRV_H_
29#define _VMWGFX_DRV_H_
30
31#include "vmwgfx_reg.h"
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32#include <drm/drmP.h>
33#include <drm/vmwgfx_drm.h>
34#include <drm/drm_hashtab.h>
35#include <linux/suspend.h>
36#include <drm/ttm/ttm_bo_driver.h>
37#include <drm/ttm/ttm_object.h>
38#include <drm/ttm/ttm_lock.h>
39#include <drm/ttm/ttm_execbuf_util.h>
40#include <drm/ttm/ttm_module.h>
ae2a1040 41#include "vmwgfx_fence.h"
fb1d9738 42
35c05125 43#define VMWGFX_DRIVER_DATE "20150626"
2ae7b03c 44#define VMWGFX_DRIVER_MAJOR 2
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45#define VMWGFX_DRIVER_MINOR 7
46#define VMWGFX_DRIVER_PATCHLEVEL 0
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47#define VMWGFX_FILE_PAGE_OFFSET 0x00100000
48#define VMWGFX_FIFO_STATIC_SIZE (1024*1024)
49#define VMWGFX_MAX_RELOCATIONS 2048
be38ab6e 50#define VMWGFX_MAX_VALIDATIONS 2048
7c4f7780 51#define VMWGFX_MAX_DISPLAYS 16
be38ab6e 52#define VMWGFX_CMD_BOUNCE_INIT_SIZE 32768
35c05125 53#define VMWGFX_ENABLE_SCREEN_TARGET_OTABLE 1
fb1d9738 54
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55/*
56 * Perhaps we should have sysfs entries for these.
57 */
58#define VMWGFX_NUM_GB_CONTEXT 256
59#define VMWGFX_NUM_GB_SHADER 20000
60#define VMWGFX_NUM_GB_SURFACE 32768
7cba9062 61#define VMWGFX_NUM_GB_SCREEN_TARGET VMWGFX_MAX_DISPLAYS
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62#define VMWGFX_NUM_MOB (VMWGFX_NUM_GB_CONTEXT +\
63 VMWGFX_NUM_GB_SHADER +\
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64 VMWGFX_NUM_GB_SURFACE +\
65 VMWGFX_NUM_GB_SCREEN_TARGET)
3530bdc3 66
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67#define VMW_PL_GMR TTM_PL_PRIV0
68#define VMW_PL_FLAG_GMR TTM_PL_FLAG_PRIV0
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69#define VMW_PL_MOB TTM_PL_PRIV1
70#define VMW_PL_FLAG_MOB TTM_PL_FLAG_PRIV1
135cba0d 71
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72#define VMW_RES_CONTEXT ttm_driver_type0
73#define VMW_RES_SURFACE ttm_driver_type1
74#define VMW_RES_STREAM ttm_driver_type2
75#define VMW_RES_FENCE ttm_driver_type3
c74c162f 76#define VMW_RES_SHADER ttm_driver_type4
ae2a1040 77
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78struct vmw_fpriv {
79 struct drm_master *locked_master;
80 struct ttm_object_file *tfile;
6b82ef50 81 struct list_head fence_events;
d5bde956 82 bool gb_aware;
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83};
84
85struct vmw_dma_buffer {
86 struct ttm_buffer_object base;
c0951b79 87 struct list_head res_list;
459d0fa7 88 s32 pin_count;
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89};
90
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91/**
92 * struct vmw_validate_buffer - Carries validation info about buffers.
93 *
94 * @base: Validation info for TTM.
95 * @hash: Hash entry for quick lookup of the TTM buffer object.
96 *
97 * This structure contains also driver private validation info
98 * on top of the info needed by TTM.
99 */
100struct vmw_validate_buffer {
101 struct ttm_validate_buffer base;
102 struct drm_hash_item hash;
96c5f0df 103 bool validate_as_mob;
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104};
105
106struct vmw_res_func;
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107struct vmw_resource {
108 struct kref kref;
109 struct vmw_private *dev_priv;
fb1d9738 110 int id;
fb1d9738 111 bool avail;
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112 unsigned long backup_size;
113 bool res_dirty; /* Protected by backup buffer reserved */
114 bool backup_dirty; /* Protected by backup buffer reserved */
115 struct vmw_dma_buffer *backup;
116 unsigned long backup_offset;
ed93394c 117 unsigned long pin_count; /* Protected by resource reserved */
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118 const struct vmw_res_func *func;
119 struct list_head lru_head; /* Protected by the resource lock */
120 struct list_head mob_head; /* Protected by @backup reserved */
173fb7d4 121 struct list_head binding_head; /* Protected by binding_mutex */
fb1d9738 122 void (*res_free) (struct vmw_resource *res);
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123 void (*hw_destroy) (struct vmw_resource *res);
124};
125
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126
127/*
128 * Resources that are managed using ioctls.
129 */
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130enum vmw_res_type {
131 vmw_res_context,
132 vmw_res_surface,
133 vmw_res_stream,
c74c162f 134 vmw_res_shader,
c0951b79 135 vmw_res_max
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136};
137
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138/*
139 * Resources that are managed using command streams.
140 */
141enum vmw_cmdbuf_res_type {
142 vmw_cmdbuf_res_compat_shader
143};
144
145struct vmw_cmdbuf_res_manager;
146
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147struct vmw_cursor_snooper {
148 struct drm_crtc *crtc;
149 size_t age;
150 uint32_t *image;
151};
152
2fcd5a73 153struct vmw_framebuffer;
5bb39e81 154struct vmw_surface_offset;
2fcd5a73 155
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156struct vmw_surface {
157 struct vmw_resource res;
158 uint32_t flags;
159 uint32_t format;
160 uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
c0951b79 161 struct drm_vmw_size base_size;
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162 struct drm_vmw_size *sizes;
163 uint32_t num_sizes;
5ffdb658 164 bool scanout;
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165 /* TODO so far just a extra pointer */
166 struct vmw_cursor_snooper snooper;
5bb39e81 167 struct vmw_surface_offset *offsets;
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168 SVGA3dTextureFilter autogen_filter;
169 uint32_t multisample_count;
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170};
171
6bcd8d3c 172struct vmw_marker_queue {
1925d456 173 struct list_head head;
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174 u64 lag;
175 u64 lag_time;
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176 spinlock_t lock;
177};
178
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179struct vmw_fifo_state {
180 unsigned long reserved_size;
181 __le32 *dynamic_buffer;
182 __le32 *static_buffer;
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183 unsigned long static_buffer_size;
184 bool using_bounce_buffer;
185 uint32_t capabilities;
85b9e487 186 struct mutex fifo_mutex;
fb1d9738 187 struct rw_semaphore rwsem;
6bcd8d3c 188 struct vmw_marker_queue marker_queue;
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189};
190
191struct vmw_relocation {
ddcda24e 192 SVGAMobId *mob_loc;
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193 SVGAGuestPtr *location;
194 uint32_t index;
195};
196
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197/**
198 * struct vmw_res_cache_entry - resource information cache entry
199 *
200 * @valid: Whether the entry is valid, which also implies that the execbuf
201 * code holds a reference to the resource, and it's placed on the
202 * validation list.
203 * @handle: User-space handle of a resource.
204 * @res: Non-ref-counted pointer to the resource.
205 *
206 * Used to avoid frequent repeated user-space handle lookups of the
207 * same resource.
208 */
209struct vmw_res_cache_entry {
210 bool valid;
211 uint32_t handle;
212 struct vmw_resource *res;
213 struct vmw_resource_val_node *node;
214};
215
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216/**
217 * enum vmw_dma_map_mode - indicate how to perform TTM page dma mappings.
218 */
219enum vmw_dma_map_mode {
220 vmw_dma_phys, /* Use physical page addresses */
221 vmw_dma_alloc_coherent, /* Use TTM coherent pages */
222 vmw_dma_map_populate, /* Unmap from DMA just after unpopulate */
223 vmw_dma_map_bind, /* Unmap from DMA just before unbind */
224 vmw_dma_map_max
225};
226
227/**
228 * struct vmw_sg_table - Scatter/gather table for binding, with additional
229 * device-specific information.
230 *
231 * @sgt: Pointer to a struct sg_table with binding information
232 * @num_regions: Number of regions with device-address contigous pages
233 */
234struct vmw_sg_table {
235 enum vmw_dma_map_mode mode;
236 struct page **pages;
237 const dma_addr_t *addrs;
238 struct sg_table *sgt;
239 unsigned long num_regions;
240 unsigned long num_pages;
241};
242
243/**
244 * struct vmw_piter - Page iterator that iterates over a list of pages
245 * and DMA addresses that could be either a scatter-gather list or
246 * arrays
247 *
248 * @pages: Array of page pointers to the pages.
249 * @addrs: DMA addresses to the pages if coherent pages are used.
250 * @iter: Scatter-gather page iterator. Current position in SG list.
251 * @i: Current position in arrays.
252 * @num_pages: Number of pages total.
253 * @next: Function to advance the iterator. Returns false if past the list
254 * of pages, true otherwise.
255 * @dma_address: Function to return the DMA address of the current page.
256 */
257struct vmw_piter {
258 struct page **pages;
259 const dma_addr_t *addrs;
260 struct sg_page_iter iter;
261 unsigned long i;
262 unsigned long num_pages;
263 bool (*next)(struct vmw_piter *);
264 dma_addr_t (*dma_address)(struct vmw_piter *);
265 struct page *(*page)(struct vmw_piter *);
266};
267
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268/*
269 * enum vmw_ctx_binding_type - abstract resource to context binding types
270 */
271enum vmw_ctx_binding_type {
272 vmw_ctx_binding_shader,
273 vmw_ctx_binding_rt,
274 vmw_ctx_binding_tex,
275 vmw_ctx_binding_max
276};
277
278/**
279 * struct vmw_ctx_bindinfo - structure representing a single context binding
280 *
281 * @ctx: Pointer to the context structure. NULL means the binding is not
282 * active.
173fb7d4 283 * @res: Non ref-counted pointer to the bound resource.
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284 * @bt: The binding type.
285 * @i1: Union of information needed to unbind.
286 */
287struct vmw_ctx_bindinfo {
288 struct vmw_resource *ctx;
173fb7d4 289 struct vmw_resource *res;
b5c3b1a6 290 enum vmw_ctx_binding_type bt;
30f82d81 291 bool scrubbed;
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292 union {
293 SVGA3dShaderType shader_type;
294 SVGA3dRenderTargetType rt_type;
295 uint32 texture_stage;
296 } i1;
297};
298
299/**
300 * struct vmw_ctx_binding - structure representing a single context binding
301 * - suitable for tracking in a context
302 *
303 * @ctx_list: List head for context.
173fb7d4 304 * @res_list: List head for bound resource.
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305 * @bi: Binding info
306 */
307struct vmw_ctx_binding {
308 struct list_head ctx_list;
173fb7d4 309 struct list_head res_list;
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310 struct vmw_ctx_bindinfo bi;
311};
312
313
314/**
315 * struct vmw_ctx_binding_state - context binding state
316 *
317 * @list: linked list of individual bindings.
318 * @render_targets: Render target bindings.
319 * @texture_units: Texture units/samplers bindings.
320 * @shaders: Shader bindings.
321 *
322 * Note that this structure also provides storage space for the individual
323 * struct vmw_ctx_binding objects, so that no dynamic allocation is needed
324 * for individual bindings.
325 *
326 */
327struct vmw_ctx_binding_state {
328 struct list_head list;
329 struct vmw_ctx_binding render_targets[SVGA3D_RT_MAX];
330 struct vmw_ctx_binding texture_units[SVGA3D_NUM_TEXTURE_UNITS];
331 struct vmw_ctx_binding shaders[SVGA3D_SHADERTYPE_MAX];
332};
333
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334
335/*
336 * enum vmw_display_unit_type - Describes the display unit
337 */
338enum vmw_display_unit_type {
339 vmw_du_invalid = 0,
340 vmw_du_legacy,
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341 vmw_du_screen_object,
342 vmw_du_screen_target
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343};
344
345
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346#define VMW_QUIRK_DST_SID_OK (1U << 0)
347#define VMW_QUIRK_SRC_SID_OK (1U << 1)
c9146cd9 348
fb1d9738 349struct vmw_sw_context{
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350 struct drm_open_hash res_ht;
351 bool res_ht_initialized;
922ade0d 352 bool kernel; /**< is the called made from the kernel */
d5bde956 353 struct vmw_fpriv *fp;
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354 struct list_head validate_nodes;
355 struct vmw_relocation relocs[VMWGFX_MAX_RELOCATIONS];
356 uint32_t cur_reloc;
c0951b79 357 struct vmw_validate_buffer val_bufs[VMWGFX_MAX_VALIDATIONS];
fb1d9738 358 uint32_t cur_val_buf;
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359 uint32_t *cmd_bounce;
360 uint32_t cmd_bounce_size;
f18c8840 361 struct list_head resource_list;
459d0fa7 362 struct vmw_dma_buffer *cur_query_bo;
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363 struct list_head res_relocations;
364 uint32_t *buf_start;
365 struct vmw_res_cache_entry res_cache[vmw_res_max];
366 struct vmw_resource *last_query_ctx;
367 bool needs_post_query_barrier;
368 struct vmw_resource *error_resource;
b5c3b1a6 369 struct vmw_ctx_binding_state staged_bindings;
18e4a466 370 struct list_head staged_cmd_res;
c9146cd9 371 uint32_t quirks;
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372};
373
374struct vmw_legacy_display;
375struct vmw_overlay;
376
377struct vmw_master {
378 struct ttm_lock lock;
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379 struct mutex fb_surf_mutex;
380 struct list_head fb_surf;
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381};
382
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383struct vmw_vga_topology_state {
384 uint32_t width;
385 uint32_t height;
386 uint32_t primary;
387 uint32_t pos_x;
388 uint32_t pos_y;
389};
390
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391struct vmw_private {
392 struct ttm_bo_device bdev;
393 struct ttm_bo_global_ref bo_global_ref;
ba4420c2 394 struct drm_global_reference mem_global_ref;
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395
396 struct vmw_fifo_state fifo;
397
398 struct drm_device *dev;
399 unsigned long vmw_chipset;
400 unsigned int io_start;
401 uint32_t vram_start;
402 uint32_t vram_size;
bc2d6508 403 uint32_t prim_bb_mem;
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404 uint32_t mmio_start;
405 uint32_t mmio_size;
406 uint32_t fb_max_width;
407 uint32_t fb_max_height;
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408 uint32_t texture_max_width;
409 uint32_t texture_max_height;
410 uint32_t stdu_max_width;
411 uint32_t stdu_max_height;
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412 uint32_t initial_width;
413 uint32_t initial_height;
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414 __le32 __iomem *mmio_virt;
415 int mmio_mtrr;
416 uint32_t capabilities;
fb1d9738 417 uint32_t max_gmr_ids;
fb17f189 418 uint32_t max_gmr_pages;
6da768aa 419 uint32_t max_mob_pages;
857aea1c 420 uint32_t max_mob_size;
fb17f189 421 uint32_t memory_size;
135cba0d 422 bool has_gmr;
3530bdc3 423 bool has_mob;
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424 spinlock_t hw_lock;
425 spinlock_t cap_lock;
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426
427 /*
428 * VGA registers.
429 */
430
7c4f7780 431 struct vmw_vga_topology_state vga_save[VMWGFX_MAX_DISPLAYS];
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432 uint32_t vga_width;
433 uint32_t vga_height;
fb1d9738 434 uint32_t vga_bpp;
7c4f7780 435 uint32_t vga_bpl;
d7e1958d 436 uint32_t vga_pitchlock;
fb1d9738 437
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438 uint32_t num_displays;
439
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440 /*
441 * Framebuffer info.
442 */
443
444 void *fb_info;
c8261a96 445 enum vmw_display_unit_type active_display_unit;
fb1d9738 446 struct vmw_legacy_display *ldu_priv;
56d1c78d 447 struct vmw_screen_object_display *sou_priv;
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448 struct vmw_overlay *overlay_priv;
449
450 /*
451 * Context and surface management.
452 */
453
454 rwlock_t resource_lock;
c0951b79 455 struct idr res_idr[vmw_res_max];
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456 /*
457 * Block lastclose from racing with firstopen.
458 */
459
460 struct mutex init_mutex;
461
462 /*
463 * A resource manager for kernel-only surfaces and
464 * contexts.
465 */
466
467 struct ttm_object_device *tdev;
468
469 /*
470 * Fencing and IRQs.
471 */
472
6bcd8d3c 473 atomic_t marker_seq;
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474 wait_queue_head_t fence_queue;
475 wait_queue_head_t fifo_queue;
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476 spinlock_t waiter_lock;
477 int fence_queue_waiters; /* Protected by waiter_lock */
478 int goal_queue_waiters; /* Protected by waiter_lock */
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TH
479 int cmdbuf_waiters; /* Protected by irq_lock */
480 int error_waiters; /* Protected by irq_lock */
fb1d9738 481 atomic_t fifo_queue_waiters;
6bcd8d3c 482 uint32_t last_read_seqno;
fb1d9738 483 spinlock_t irq_lock;
ae2a1040 484 struct vmw_fence_manager *fman;
57c5ee79 485 uint32_t irq_mask;
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486
487 /*
488 * Device state
489 */
490
491 uint32_t traces_state;
492 uint32_t enable_state;
493 uint32_t config_done_state;
494
495 /**
496 * Execbuf
497 */
498 /**
499 * Protected by the cmdbuf mutex.
500 */
501
502 struct vmw_sw_context ctx;
fb1d9738 503 struct mutex cmdbuf_mutex;
173fb7d4 504 struct mutex binding_mutex;
fb1d9738 505
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506 /**
507 * Operating mode.
508 */
509
510 bool stealth;
30c78bb8 511 bool enable_fb;
153b3d5b 512 spinlock_t svga_lock;
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513
514 /**
515 * Master management.
516 */
517
518 struct vmw_master *active_master;
519 struct vmw_master fbdev_master;
d9f36a00 520 struct notifier_block pm_nb;
094e0fa8 521 bool suspended;
153b3d5b 522 bool refuse_hibernation;
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TH
523
524 struct mutex release_mutex;
153b3d5b 525 atomic_t num_fifo_resources;
e2fa3a76 526
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TH
527 /*
528 * Replace this with an rwsem as soon as we have down_xx_interruptible()
529 */
530 struct ttm_lock reservation_sem;
531
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TH
532 /*
533 * Query processing. These members
534 * are protected by the cmdbuf mutex.
535 */
536
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TH
537 struct vmw_dma_buffer *dummy_query_bo;
538 struct vmw_dma_buffer *pinned_bo;
e2fa3a76 539 uint32_t query_cid;
c0951b79 540 uint32_t query_cid_valid;
e2fa3a76 541 bool dummy_query_bo_pinned;
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TH
542
543 /*
544 * Surface swapping. The "surface_lru" list is protected by the
545 * resource lock in order to be able to destroy a surface and take
546 * it off the lru atomically. "used_memory_size" is currently
547 * protected by the cmdbuf mutex for simplicity.
548 */
549
c0951b79 550 struct list_head res_lru[vmw_res_max];
5bb39e81 551 uint32_t used_memory_size;
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552
553 /*
554 * DMA mapping stuff.
555 */
556 enum vmw_dma_map_mode map_mode;
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557
558 /*
559 * Guest Backed stuff
560 */
561 struct ttm_buffer_object *otable_bo;
562 struct vmw_otable *otables;
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TH
563
564 struct vmw_cmdbuf_man *cman;
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565};
566
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567static inline struct vmw_surface *vmw_res_to_srf(struct vmw_resource *res)
568{
569 return container_of(res, struct vmw_surface, res);
570}
571
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572static inline struct vmw_private *vmw_priv(struct drm_device *dev)
573{
574 return (struct vmw_private *)dev->dev_private;
575}
576
577static inline struct vmw_fpriv *vmw_fpriv(struct drm_file *file_priv)
578{
579 return (struct vmw_fpriv *)file_priv->driver_priv;
580}
581
582static inline struct vmw_master *vmw_master(struct drm_master *master)
583{
584 return (struct vmw_master *) master->driver_priv;
585}
586
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TH
587/*
588 * The locking here is fine-grained, so that it is performed once
589 * for every read- and write operation. This is of course costly, but we
590 * don't perform much register access in the timing critical paths anyway.
591 * Instead we have the extra benefit of being sure that we don't forget
592 * the hw lock around register accesses.
593 */
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594static inline void vmw_write(struct vmw_private *dev_priv,
595 unsigned int offset, uint32_t value)
596{
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TH
597 unsigned long irq_flags;
598
599 spin_lock_irqsave(&dev_priv->hw_lock, irq_flags);
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600 outl(offset, dev_priv->io_start + VMWGFX_INDEX_PORT);
601 outl(value, dev_priv->io_start + VMWGFX_VALUE_PORT);
496eb6fd 602 spin_unlock_irqrestore(&dev_priv->hw_lock, irq_flags);
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603}
604
605static inline uint32_t vmw_read(struct vmw_private *dev_priv,
606 unsigned int offset)
607{
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TH
608 unsigned long irq_flags;
609 u32 val;
fb1d9738 610
496eb6fd 611 spin_lock_irqsave(&dev_priv->hw_lock, irq_flags);
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612 outl(offset, dev_priv->io_start + VMWGFX_INDEX_PORT);
613 val = inl(dev_priv->io_start + VMWGFX_VALUE_PORT);
496eb6fd
TH
614 spin_unlock_irqrestore(&dev_priv->hw_lock, irq_flags);
615
fb1d9738
JB
616 return val;
617}
618
153b3d5b
TH
619extern void vmw_svga_enable(struct vmw_private *dev_priv);
620extern void vmw_svga_disable(struct vmw_private *dev_priv);
621
30c78bb8 622
fb1d9738
JB
623/**
624 * GMR utilities - vmwgfx_gmr.c
625 */
626
627extern int vmw_gmr_bind(struct vmw_private *dev_priv,
d92d9851 628 const struct vmw_sg_table *vsgt,
135cba0d
TH
629 unsigned long num_pages,
630 int gmr_id);
fb1d9738
JB
631extern void vmw_gmr_unbind(struct vmw_private *dev_priv, int gmr_id);
632
633/**
634 * Resource utilities - vmwgfx_resource.c
635 */
c0951b79 636struct vmw_user_resource_conv;
fb1d9738 637
fb1d9738
JB
638extern void vmw_resource_unreference(struct vmw_resource **p_res);
639extern struct vmw_resource *vmw_resource_reference(struct vmw_resource *res);
30f82d81
TH
640extern struct vmw_resource *
641vmw_resource_reference_unless_doomed(struct vmw_resource *res);
c0951b79
TH
642extern int vmw_resource_validate(struct vmw_resource *res);
643extern int vmw_resource_reserve(struct vmw_resource *res, bool no_backup);
644extern bool vmw_resource_needs_backup(const struct vmw_resource *res);
551a6697
JB
645extern int vmw_user_lookup_handle(struct vmw_private *dev_priv,
646 struct ttm_object_file *tfile,
647 uint32_t handle,
648 struct vmw_surface **out_surf,
649 struct vmw_dma_buffer **out_buf);
c0951b79
TH
650extern int vmw_user_resource_lookup_handle(
651 struct vmw_private *dev_priv,
652 struct ttm_object_file *tfile,
653 uint32_t handle,
654 const struct vmw_user_resource_conv *converter,
655 struct vmw_resource **p_res);
fb1d9738
JB
656extern void vmw_dmabuf_bo_free(struct ttm_buffer_object *bo);
657extern int vmw_dmabuf_init(struct vmw_private *dev_priv,
658 struct vmw_dma_buffer *vmw_bo,
659 size_t size, struct ttm_placement *placement,
660 bool interuptable,
661 void (*bo_free) (struct ttm_buffer_object *bo));
d08a9b9c
TH
662extern int vmw_user_dmabuf_verify_access(struct ttm_buffer_object *bo,
663 struct ttm_object_file *tfile);
a97e2192
TH
664extern int vmw_user_dmabuf_alloc(struct vmw_private *dev_priv,
665 struct ttm_object_file *tfile,
666 uint32_t size,
667 bool shareable,
668 uint32_t *handle,
669 struct vmw_dma_buffer **p_dma_buf);
670extern int vmw_user_dmabuf_reference(struct ttm_object_file *tfile,
671 struct vmw_dma_buffer *dma_buf,
672 uint32_t *handle);
fb1d9738
JB
673extern int vmw_dmabuf_alloc_ioctl(struct drm_device *dev, void *data,
674 struct drm_file *file_priv);
675extern int vmw_dmabuf_unref_ioctl(struct drm_device *dev, void *data,
676 struct drm_file *file_priv);
1d7a5cbf
TH
677extern int vmw_user_dmabuf_synccpu_ioctl(struct drm_device *dev, void *data,
678 struct drm_file *file_priv);
fb1d9738
JB
679extern uint32_t vmw_dmabuf_validate_node(struct ttm_buffer_object *bo,
680 uint32_t cur_validate_node);
681extern void vmw_dmabuf_validate_clear(struct ttm_buffer_object *bo);
682extern int vmw_user_dmabuf_lookup(struct ttm_object_file *tfile,
683 uint32_t id, struct vmw_dma_buffer **out);
fb1d9738
JB
684extern int vmw_stream_claim_ioctl(struct drm_device *dev, void *data,
685 struct drm_file *file_priv);
686extern int vmw_stream_unref_ioctl(struct drm_device *dev, void *data,
687 struct drm_file *file_priv);
688extern int vmw_user_stream_lookup(struct vmw_private *dev_priv,
689 struct ttm_object_file *tfile,
690 uint32_t *inout_id,
691 struct vmw_resource **out);
c0951b79
TH
692extern void vmw_resource_unreserve(struct vmw_resource *res,
693 struct vmw_dma_buffer *new_backup,
694 unsigned long new_backup_offset);
695extern void vmw_resource_move_notify(struct ttm_buffer_object *bo,
696 struct ttm_mem_reg *mem);
697extern void vmw_fence_single_bo(struct ttm_buffer_object *bo,
698 struct vmw_fence_obj *fence);
699extern void vmw_resource_evict_all(struct vmw_private *dev_priv);
fb1d9738 700
d991ef03
JB
701/**
702 * DMA buffer helper routines - vmwgfx_dmabuf.c
703 */
459d0fa7 704extern int vmw_dmabuf_pin_in_placement(struct vmw_private *vmw_priv,
d991ef03 705 struct vmw_dma_buffer *bo,
459d0fa7
TH
706 struct ttm_placement *placement,
707 bool interruptible);
708extern int vmw_dmabuf_pin_in_vram(struct vmw_private *dev_priv,
709 struct vmw_dma_buffer *buf,
710 bool interruptible);
711extern int vmw_dmabuf_pin_in_vram_or_gmr(struct vmw_private *dev_priv,
712 struct vmw_dma_buffer *buf,
713 bool interruptible);
714extern int vmw_dmabuf_pin_in_start_of_vram(struct vmw_private *vmw_priv,
715 struct vmw_dma_buffer *bo,
716 bool interruptible);
d991ef03
JB
717extern int vmw_dmabuf_unpin(struct vmw_private *vmw_priv,
718 struct vmw_dma_buffer *bo,
719 bool interruptible);
b37a6b9a
TH
720extern void vmw_bo_get_guest_ptr(const struct ttm_buffer_object *buf,
721 SVGAGuestPtr *ptr);
459d0fa7 722extern void vmw_bo_pin_reserved(struct vmw_dma_buffer *bo, bool pin);
fb1d9738
JB
723
724/**
725 * Misc Ioctl functionality - vmwgfx_ioctl.c
726 */
727
728extern int vmw_getparam_ioctl(struct drm_device *dev, void *data,
729 struct drm_file *file_priv);
f63f6a59
TH
730extern int vmw_get_cap_3d_ioctl(struct drm_device *dev, void *data,
731 struct drm_file *file_priv);
2fcd5a73
JB
732extern int vmw_present_ioctl(struct drm_device *dev, void *data,
733 struct drm_file *file_priv);
734extern int vmw_present_readback_ioctl(struct drm_device *dev, void *data,
735 struct drm_file *file_priv);
5438ae88
TH
736extern unsigned int vmw_fops_poll(struct file *filp,
737 struct poll_table_struct *wait);
738extern ssize_t vmw_fops_read(struct file *filp, char __user *buffer,
739 size_t count, loff_t *offset);
fb1d9738
JB
740
741/**
742 * Fifo utilities - vmwgfx_fifo.c
743 */
744
745extern int vmw_fifo_init(struct vmw_private *dev_priv,
746 struct vmw_fifo_state *fifo);
747extern void vmw_fifo_release(struct vmw_private *dev_priv,
748 struct vmw_fifo_state *fifo);
749extern void *vmw_fifo_reserve(struct vmw_private *dev_priv, uint32_t bytes);
750extern void vmw_fifo_commit(struct vmw_private *dev_priv, uint32_t bytes);
751extern int vmw_fifo_send_fence(struct vmw_private *dev_priv,
6bcd8d3c 752 uint32_t *seqno);
2298e804 753extern void vmw_fifo_ping_host_locked(struct vmw_private *, uint32_t reason);
fb1d9738 754extern void vmw_fifo_ping_host(struct vmw_private *dev_priv, uint32_t reason);
8e19a951 755extern bool vmw_fifo_have_3d(struct vmw_private *dev_priv);
d7e1958d 756extern bool vmw_fifo_have_pitchlock(struct vmw_private *dev_priv);
e2fa3a76
TH
757extern int vmw_fifo_emit_dummy_query(struct vmw_private *dev_priv,
758 uint32_t cid);
3eab3d9e
TH
759extern int vmw_fifo_flush(struct vmw_private *dev_priv,
760 bool interruptible);
fb1d9738
JB
761
762/**
763 * TTM glue - vmwgfx_ttm_glue.c
764 */
765
766extern int vmw_ttm_global_init(struct vmw_private *dev_priv);
767extern void vmw_ttm_global_release(struct vmw_private *dev_priv);
768extern int vmw_mmap(struct file *filp, struct vm_area_struct *vma);
769
770/**
771 * TTM buffer object driver - vmwgfx_buffer.c
772 */
773
308d17ef 774extern const size_t vmw_tt_size;
fb1d9738
JB
775extern struct ttm_placement vmw_vram_placement;
776extern struct ttm_placement vmw_vram_ne_placement;
8ba5152a 777extern struct ttm_placement vmw_vram_sys_placement;
135cba0d 778extern struct ttm_placement vmw_vram_gmr_placement;
d991ef03 779extern struct ttm_placement vmw_vram_gmr_ne_placement;
fb1d9738 780extern struct ttm_placement vmw_sys_placement;
3530bdc3 781extern struct ttm_placement vmw_sys_ne_placement;
d991ef03 782extern struct ttm_placement vmw_evictable_placement;
5bb39e81 783extern struct ttm_placement vmw_srf_placement;
96c5f0df 784extern struct ttm_placement vmw_mob_placement;
3eab3d9e 785extern struct ttm_placement vmw_mob_ne_placement;
fb1d9738
JB
786extern struct ttm_bo_driver vmw_bo_driver;
787extern int vmw_dma_quiescent(struct drm_device *dev);
0fd53cfb
TH
788extern int vmw_bo_map_dma(struct ttm_buffer_object *bo);
789extern void vmw_bo_unmap_dma(struct ttm_buffer_object *bo);
790extern const struct vmw_sg_table *
791vmw_bo_sg_table(struct ttm_buffer_object *bo);
d92d9851
TH
792extern void vmw_piter_start(struct vmw_piter *viter,
793 const struct vmw_sg_table *vsgt,
794 unsigned long p_offs);
795
796/**
797 * vmw_piter_next - Advance the iterator one page.
798 *
799 * @viter: Pointer to the iterator to advance.
800 *
801 * Returns false if past the list of pages, true otherwise.
802 */
803static inline bool vmw_piter_next(struct vmw_piter *viter)
804{
805 return viter->next(viter);
806}
807
808/**
809 * vmw_piter_dma_addr - Return the DMA address of the current page.
810 *
811 * @viter: Pointer to the iterator
812 *
813 * Returns the DMA address of the page pointed to by @viter.
814 */
815static inline dma_addr_t vmw_piter_dma_addr(struct vmw_piter *viter)
816{
817 return viter->dma_address(viter);
818}
819
820/**
821 * vmw_piter_page - Return a pointer to the current page.
822 *
823 * @viter: Pointer to the iterator
824 *
825 * Returns the DMA address of the page pointed to by @viter.
826 */
827static inline struct page *vmw_piter_page(struct vmw_piter *viter)
828{
829 return viter->page(viter);
830}
fb1d9738
JB
831
832/**
833 * Command submission - vmwgfx_execbuf.c
834 */
835
836extern int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
837 struct drm_file *file_priv);
922ade0d
TH
838extern int vmw_execbuf_process(struct drm_file *file_priv,
839 struct vmw_private *dev_priv,
840 void __user *user_commands,
841 void *kernel_commands,
842 uint32_t command_size,
843 uint64_t throttle_us,
c9146cd9 844 uint32_t quirks,
922ade0d 845 struct drm_vmw_fence_rep __user
bb1bd2f4
JB
846 *user_fence_rep,
847 struct vmw_fence_obj **out_fence);
c0951b79
TH
848extern void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv,
849 struct vmw_fence_obj *fence);
850extern void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv);
e2fa3a76 851
5bb39e81
TH
852extern int vmw_execbuf_fence_commands(struct drm_file *file_priv,
853 struct vmw_private *dev_priv,
854 struct vmw_fence_obj **p_fence,
855 uint32_t *p_handle);
57c5ee79
TH
856extern void vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
857 struct vmw_fpriv *vmw_fp,
858 int ret,
859 struct drm_vmw_fence_rep __user
860 *user_fence_rep,
861 struct vmw_fence_obj *fence,
862 uint32_t fence_handle);
5bb39e81 863
fb1d9738
JB
864/**
865 * IRQs and wating - vmwgfx_irq.c
866 */
867
e9f0d76f 868extern irqreturn_t vmw_irq_handler(int irq, void *arg);
6bcd8d3c 869extern int vmw_wait_seqno(struct vmw_private *dev_priv, bool lazy,
c8261a96
SY
870 uint32_t seqno, bool interruptible,
871 unsigned long timeout);
fb1d9738
JB
872extern void vmw_irq_preinstall(struct drm_device *dev);
873extern int vmw_irq_postinstall(struct drm_device *dev);
874extern void vmw_irq_uninstall(struct drm_device *dev);
6bcd8d3c
TH
875extern bool vmw_seqno_passed(struct vmw_private *dev_priv,
876 uint32_t seqno);
fb1d9738
JB
877extern int vmw_fallback_wait(struct vmw_private *dev_priv,
878 bool lazy,
879 bool fifo_idle,
6bcd8d3c 880 uint32_t seqno,
fb1d9738
JB
881 bool interruptible,
882 unsigned long timeout);
6bcd8d3c 883extern void vmw_update_seqno(struct vmw_private *dev_priv,
1925d456 884 struct vmw_fifo_state *fifo_state);
ae2a1040
TH
885extern void vmw_seqno_waiter_add(struct vmw_private *dev_priv);
886extern void vmw_seqno_waiter_remove(struct vmw_private *dev_priv);
57c5ee79
TH
887extern void vmw_goal_waiter_add(struct vmw_private *dev_priv);
888extern void vmw_goal_waiter_remove(struct vmw_private *dev_priv);
3eab3d9e
TH
889extern void vmw_generic_waiter_add(struct vmw_private *dev_priv, u32 flag,
890 int *waiter_count);
891extern void vmw_generic_waiter_remove(struct vmw_private *dev_priv,
892 u32 flag, int *waiter_count);
1925d456
TH
893
894/**
6bcd8d3c
TH
895 * Rudimentary fence-like objects currently used only for throttling -
896 * vmwgfx_marker.c
1925d456
TH
897 */
898
6bcd8d3c
TH
899extern void vmw_marker_queue_init(struct vmw_marker_queue *queue);
900extern void vmw_marker_queue_takedown(struct vmw_marker_queue *queue);
901extern int vmw_marker_push(struct vmw_marker_queue *queue,
c8261a96 902 uint32_t seqno);
6bcd8d3c 903extern int vmw_marker_pull(struct vmw_marker_queue *queue,
c8261a96 904 uint32_t signaled_seqno);
1925d456 905extern int vmw_wait_lag(struct vmw_private *dev_priv,
6bcd8d3c 906 struct vmw_marker_queue *queue, uint32_t us);
fb1d9738
JB
907
908/**
909 * Kernel framebuffer - vmwgfx_fb.c
910 */
911
912int vmw_fb_init(struct vmw_private *vmw_priv);
913int vmw_fb_close(struct vmw_private *dev_priv);
914int vmw_fb_off(struct vmw_private *vmw_priv);
915int vmw_fb_on(struct vmw_private *vmw_priv);
916
917/**
918 * Kernel modesetting - vmwgfx_kms.c
919 */
920
921int vmw_kms_init(struct vmw_private *dev_priv);
922int vmw_kms_close(struct vmw_private *dev_priv);
923int vmw_kms_save_vga(struct vmw_private *vmw_priv);
924int vmw_kms_restore_vga(struct vmw_private *vmw_priv);
925int vmw_kms_cursor_bypass_ioctl(struct drm_device *dev, void *data,
926 struct drm_file *file_priv);
927void vmw_kms_cursor_post_execbuf(struct vmw_private *dev_priv);
928void vmw_kms_cursor_snoop(struct vmw_surface *srf,
929 struct ttm_object_file *tfile,
930 struct ttm_buffer_object *bo,
931 SVGA3dCmdHeader *header);
0bef23f9
MD
932int vmw_kms_write_svga(struct vmw_private *vmw_priv,
933 unsigned width, unsigned height, unsigned pitch,
934 unsigned bpp, unsigned depth);
3a939a5e 935void vmw_kms_idle_workqueues(struct vmw_master *vmaster);
e133e737
TH
936bool vmw_kms_validate_mode_vram(struct vmw_private *dev_priv,
937 uint32_t pitch,
938 uint32_t height);
7a1c2f6c 939u32 vmw_get_vblank_counter(struct drm_device *dev, int crtc);
1c482ab3
JB
940int vmw_enable_vblank(struct drm_device *dev, int crtc);
941void vmw_disable_vblank(struct drm_device *dev, int crtc);
2fcd5a73
JB
942int vmw_kms_present(struct vmw_private *dev_priv,
943 struct drm_file *file_priv,
944 struct vmw_framebuffer *vfb,
945 struct vmw_surface *surface,
946 uint32_t sid, int32_t destX, int32_t destY,
947 struct drm_vmw_rect *clips,
948 uint32_t num_clips);
949int vmw_kms_readback(struct vmw_private *dev_priv,
950 struct drm_file *file_priv,
951 struct vmw_framebuffer *vfb,
952 struct drm_vmw_fence_rep __user *user_fence_rep,
953 struct drm_vmw_rect *clips,
954 uint32_t num_clips);
cd2b89e7
TH
955int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
956 struct drm_file *file_priv);
fb1d9738 957
5e1782d2
DA
958int vmw_dumb_create(struct drm_file *file_priv,
959 struct drm_device *dev,
960 struct drm_mode_create_dumb *args);
961
962int vmw_dumb_map_offset(struct drm_file *file_priv,
963 struct drm_device *dev, uint32_t handle,
964 uint64_t *offset);
965int vmw_dumb_destroy(struct drm_file *file_priv,
966 struct drm_device *dev,
967 uint32_t handle);
ed93394c
TH
968extern int vmw_resource_pin(struct vmw_resource *res);
969extern void vmw_resource_unpin(struct vmw_resource *res);
970
fb1d9738
JB
971/**
972 * Overlay control - vmwgfx_overlay.c
973 */
974
975int vmw_overlay_init(struct vmw_private *dev_priv);
976int vmw_overlay_close(struct vmw_private *dev_priv);
977int vmw_overlay_ioctl(struct drm_device *dev, void *data,
978 struct drm_file *file_priv);
979int vmw_overlay_stop_all(struct vmw_private *dev_priv);
980int vmw_overlay_resume_all(struct vmw_private *dev_priv);
981int vmw_overlay_pause_all(struct vmw_private *dev_priv);
982int vmw_overlay_claim(struct vmw_private *dev_priv, uint32_t *out);
983int vmw_overlay_unref(struct vmw_private *dev_priv, uint32_t stream_id);
984int vmw_overlay_num_overlays(struct vmw_private *dev_priv);
985int vmw_overlay_num_free_overlays(struct vmw_private *dev_priv);
986
135cba0d
TH
987/**
988 * GMR Id manager
989 */
990
991extern const struct ttm_mem_type_manager_func vmw_gmrid_manager_func;
992
69977ff5
TH
993/**
994 * Prime - vmwgfx_prime.c
995 */
996
997extern const struct dma_buf_ops vmw_prime_dmabuf_ops;
998extern int vmw_prime_fd_to_handle(struct drm_device *dev,
999 struct drm_file *file_priv,
1000 int fd, u32 *handle);
1001extern int vmw_prime_handle_to_fd(struct drm_device *dev,
1002 struct drm_file *file_priv,
1003 uint32_t handle, uint32_t flags,
1004 int *prime_fd);
1005
3530bdc3
TH
1006/*
1007 * MemoryOBject management - vmwgfx_mob.c
1008 */
1009struct vmw_mob;
1010extern int vmw_mob_bind(struct vmw_private *dev_priv, struct vmw_mob *mob,
0fd53cfb
TH
1011 const struct vmw_sg_table *vsgt,
1012 unsigned long num_data_pages, int32_t mob_id);
3530bdc3
TH
1013extern void vmw_mob_unbind(struct vmw_private *dev_priv,
1014 struct vmw_mob *mob);
1015extern void vmw_mob_destroy(struct vmw_mob *mob);
1016extern struct vmw_mob *vmw_mob_create(unsigned long data_pages);
1017extern int vmw_otables_setup(struct vmw_private *dev_priv);
1018extern void vmw_otables_takedown(struct vmw_private *dev_priv);
69977ff5 1019
7086d099
TH
1020/*
1021 * Context management - vmwgfx_context.c
1022 */
1023
1024extern const struct vmw_user_resource_conv *user_context_converter;
1025
1026extern struct vmw_resource *vmw_context_alloc(struct vmw_private *dev_priv);
1027
1028extern int vmw_context_check(struct vmw_private *dev_priv,
1029 struct ttm_object_file *tfile,
1030 int id,
1031 struct vmw_resource **p_res);
1032extern int vmw_context_define_ioctl(struct drm_device *dev, void *data,
1033 struct drm_file *file_priv);
1034extern int vmw_context_destroy_ioctl(struct drm_device *dev, void *data,
1035 struct drm_file *file_priv);
b5c3b1a6
TH
1036extern int vmw_context_binding_add(struct vmw_ctx_binding_state *cbs,
1037 const struct vmw_ctx_bindinfo *ci);
173fb7d4
TH
1038extern void
1039vmw_context_binding_state_transfer(struct vmw_resource *res,
1040 struct vmw_ctx_binding_state *cbs);
1041extern void vmw_context_binding_res_list_kill(struct list_head *head);
30f82d81
TH
1042extern void vmw_context_binding_res_list_scrub(struct list_head *head);
1043extern int vmw_context_rebind_all(struct vmw_resource *ctx);
1044extern struct list_head *vmw_context_binding_list(struct vmw_resource *ctx);
18e4a466
TH
1045extern struct vmw_cmdbuf_res_manager *
1046vmw_context_res_man(struct vmw_resource *ctx);
7086d099
TH
1047/*
1048 * Surface management - vmwgfx_surface.c
1049 */
1050
1051extern const struct vmw_user_resource_conv *user_surface_converter;
1052
1053extern void vmw_surface_res_free(struct vmw_resource *res);
1054extern int vmw_surface_destroy_ioctl(struct drm_device *dev, void *data,
1055 struct drm_file *file_priv);
1056extern int vmw_surface_define_ioctl(struct drm_device *dev, void *data,
1057 struct drm_file *file_priv);
1058extern int vmw_surface_reference_ioctl(struct drm_device *dev, void *data,
1059 struct drm_file *file_priv);
1060extern int vmw_gb_surface_define_ioctl(struct drm_device *dev, void *data,
1061 struct drm_file *file_priv);
1062extern int vmw_gb_surface_reference_ioctl(struct drm_device *dev, void *data,
1063 struct drm_file *file_priv);
1064extern int vmw_surface_check(struct vmw_private *dev_priv,
1065 struct ttm_object_file *tfile,
1066 uint32_t handle, int *id);
1067extern int vmw_surface_validate(struct vmw_private *dev_priv,
1068 struct vmw_surface *srf);
233826a7
SY
1069int vmw_surface_gb_priv_define(struct drm_device *dev,
1070 uint32_t user_accounting_size,
1071 uint32_t svga3d_flags,
1072 SVGA3dSurfaceFormat format,
1073 bool for_scanout,
1074 uint32_t num_mip_levels,
1075 uint32_t multisample_count,
1076 struct drm_vmw_size size,
1077 struct vmw_surface **srf_out);
7086d099 1078
c74c162f
TH
1079/*
1080 * Shader management - vmwgfx_shader.c
1081 */
1082
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1083extern const struct vmw_user_resource_conv *user_shader_converter;
1084
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1085extern int vmw_shader_define_ioctl(struct drm_device *dev, void *data,
1086 struct drm_file *file_priv);
1087extern int vmw_shader_destroy_ioctl(struct drm_device *dev, void *data,
1088 struct drm_file *file_priv);
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1089extern int vmw_compat_shader_add(struct vmw_private *dev_priv,
1090 struct vmw_cmdbuf_res_manager *man,
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1091 u32 user_key, const void *bytecode,
1092 SVGA3dShaderType shader_type,
1093 size_t size,
d5bde956 1094 struct list_head *list);
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1095extern int vmw_compat_shader_remove(struct vmw_cmdbuf_res_manager *man,
1096 u32 user_key, SVGA3dShaderType shader_type,
1097 struct list_head *list);
1098extern struct vmw_resource *
1099vmw_compat_shader_lookup(struct vmw_cmdbuf_res_manager *man,
1100 u32 user_key, SVGA3dShaderType shader_type);
1101
1102/*
1103 * Command buffer managed resources - vmwgfx_cmdbuf_res.c
1104 */
1105
1106extern struct vmw_cmdbuf_res_manager *
1107vmw_cmdbuf_res_man_create(struct vmw_private *dev_priv);
1108extern void vmw_cmdbuf_res_man_destroy(struct vmw_cmdbuf_res_manager *man);
1109extern size_t vmw_cmdbuf_res_man_size(void);
1110extern struct vmw_resource *
1111vmw_cmdbuf_res_lookup(struct vmw_cmdbuf_res_manager *man,
1112 enum vmw_cmdbuf_res_type res_type,
1113 u32 user_key);
1114extern void vmw_cmdbuf_res_revert(struct list_head *list);
1115extern void vmw_cmdbuf_res_commit(struct list_head *list);
1116extern int vmw_cmdbuf_res_add(struct vmw_cmdbuf_res_manager *man,
1117 enum vmw_cmdbuf_res_type res_type,
1118 u32 user_key,
1119 struct vmw_resource *res,
1120 struct list_head *list);
1121extern int vmw_cmdbuf_res_remove(struct vmw_cmdbuf_res_manager *man,
1122 enum vmw_cmdbuf_res_type res_type,
1123 u32 user_key,
1124 struct list_head *list);
d5bde956 1125
c74c162f 1126
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1127/*
1128 * Command buffer managerment vmwgfx_cmdbuf.c
1129 */
1130struct vmw_cmdbuf_man;
1131struct vmw_cmdbuf_header;
1132
1133extern struct vmw_cmdbuf_man *
1134vmw_cmdbuf_man_create(struct vmw_private *dev_priv);
1135extern int vmw_cmdbuf_set_pool_size(struct vmw_cmdbuf_man *man,
1136 size_t size, size_t default_size);
1137extern void vmw_cmdbuf_remove_pool(struct vmw_cmdbuf_man *man);
1138extern void vmw_cmdbuf_man_destroy(struct vmw_cmdbuf_man *man);
1139extern int vmw_cmdbuf_idle(struct vmw_cmdbuf_man *man, bool interruptible,
1140 unsigned long timeout);
1141extern void *vmw_cmdbuf_reserve(struct vmw_cmdbuf_man *man, size_t size,
1142 int ctx_id, bool interruptible,
1143 struct vmw_cmdbuf_header *header);
1144extern void vmw_cmdbuf_commit(struct vmw_cmdbuf_man *man, size_t size,
1145 struct vmw_cmdbuf_header *header,
1146 bool flush);
1147extern void vmw_cmdbuf_tasklet_schedule(struct vmw_cmdbuf_man *man);
1148extern void *vmw_cmdbuf_alloc(struct vmw_cmdbuf_man *man,
1149 size_t size, bool interruptible,
1150 struct vmw_cmdbuf_header **p_header);
1151extern void vmw_cmdbuf_header_free(struct vmw_cmdbuf_header *header);
1152extern int vmw_cmdbuf_cur_flush(struct vmw_cmdbuf_man *man,
1153 bool interruptible);
1154
1155
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1156/**
1157 * Inline helper functions
1158 */
1159
1160static inline void vmw_surface_unreference(struct vmw_surface **srf)
1161{
1162 struct vmw_surface *tmp_srf = *srf;
1163 struct vmw_resource *res = &tmp_srf->res;
1164 *srf = NULL;
1165
1166 vmw_resource_unreference(&res);
1167}
1168
1169static inline struct vmw_surface *vmw_surface_reference(struct vmw_surface *srf)
1170{
1171 (void) vmw_resource_reference(&srf->res);
1172 return srf;
1173}
1174
1175static inline void vmw_dmabuf_unreference(struct vmw_dma_buffer **buf)
1176{
1177 struct vmw_dma_buffer *tmp_buf = *buf;
bf6f0368 1178
fb1d9738 1179 *buf = NULL;
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1180 if (tmp_buf != NULL) {
1181 struct ttm_buffer_object *bo = &tmp_buf->base;
fb1d9738 1182
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1183 ttm_bo_unref(&bo);
1184 }
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1185}
1186
1187static inline struct vmw_dma_buffer *vmw_dmabuf_reference(struct vmw_dma_buffer *buf)
1188{
1189 if (ttm_bo_reference(&buf->base))
1190 return buf;
1191 return NULL;
1192}
1193
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1194static inline struct ttm_mem_global *vmw_mem_glob(struct vmw_private *dev_priv)
1195{
1196 return (struct ttm_mem_global *) dev_priv->mem_global_ref.object;
1197}
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1198
1199static inline void vmw_fifo_resource_inc(struct vmw_private *dev_priv)
1200{
1201 atomic_inc(&dev_priv->num_fifo_resources);
1202}
1203
1204static inline void vmw_fifo_resource_dec(struct vmw_private *dev_priv)
1205{
1206 atomic_dec(&dev_priv->num_fifo_resources);
1207}
fb1d9738 1208#endif