[linux-2.6-block.git] / drivers / gpu / drm / virtio / virtgpu_plane.c

/*
 * Copyright (C) 2015 Red Hat, Inc.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining
 * a copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sublicense, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial
 * portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */

#include "virtgpu_drv.h"
#include <drm/drm_plane_helper.h>
#include <drm/drm_atomic_helper.h>

static const uint32_t virtio_gpu_formats[] = {
	DRM_FORMAT_XRGB8888,
	DRM_FORMAT_ARGB8888,
	DRM_FORMAT_BGRX8888,
	DRM_FORMAT_BGRA8888,
	DRM_FORMAT_RGBX8888,
	DRM_FORMAT_RGBA8888,
	DRM_FORMAT_XBGR8888,
	DRM_FORMAT_ABGR8888,
};

static const uint32_t virtio_gpu_cursor_formats[] = {
	DRM_FORMAT_ARGB8888,
};

static void virtio_gpu_plane_destroy(struct drm_plane *plane)
{
	kfree(plane);
}

static const struct drm_plane_funcs virtio_gpu_plane_funcs = {
	.update_plane		= drm_atomic_helper_update_plane,
	.disable_plane		= drm_atomic_helper_disable_plane,
	.destroy		= virtio_gpu_plane_destroy,
	.reset			= drm_atomic_helper_plane_reset,
	.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
	.atomic_destroy_state	= drm_atomic_helper_plane_destroy_state,
};

static int virtio_gpu_plane_atomic_check(struct drm_plane *plane,
					 struct drm_plane_state *state)
{
	return 0;
}

static void virtio_gpu_primary_plane_update(struct drm_plane *plane,
					    struct drm_plane_state *old_state)
{
	struct drm_device *dev = plane->dev;
	struct virtio_gpu_device *vgdev = dev->dev_private;
	struct virtio_gpu_output *output = NULL;
	struct virtio_gpu_framebuffer *vgfb;
	struct virtio_gpu_object *bo;
	uint32_t handle;

	if (plane->state->crtc)
		output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);
	if (old_state->crtc)
		output = drm_crtc_to_virtio_gpu_output(old_state->crtc);
	if (WARN_ON(!output))
		return;

	if (plane->state->fb) {
		vgfb = to_virtio_gpu_framebuffer(plane->state->fb);
		bo = gem_to_virtio_gpu_obj(vgfb->obj);
		handle = bo->hw_res_handle;
		if (bo->dumb) {
			virtio_gpu_cmd_transfer_to_host_2d
				(vgdev, handle, 0,
				 cpu_to_le32(plane->state->src_w >> 16),
				 cpu_to_le32(plane->state->src_h >> 16),
				 plane->state->src_x >> 16,
				 plane->state->src_y >> 16, NULL);
		}
	} else {
		handle = 0;
	}

	DRM_DEBUG("handle 0x%x, crtc %dx%d+%d+%d, src %dx%d+%d+%d\n", handle,
		  plane->state->crtc_w, plane->state->crtc_h,
		  plane->state->crtc_x, plane->state->crtc_y,
		  plane->state->src_w >> 16,
		  plane->state->src_h >> 16,
		  plane->state->src_x >> 16,
		  plane->state->src_y >> 16);
	virtio_gpu_cmd_set_scanout(vgdev, output->index, handle,
				   plane->state->src_w >> 16,
				   plane->state->src_h >> 16,
				   plane->state->src_x >> 16,
				   plane->state->src_y >> 16);
	virtio_gpu_cmd_resource_flush(vgdev, handle,
				      plane->state->src_x >> 16,
				      plane->state->src_y >> 16,
				      plane->state->src_w >> 16,
				      plane->state->src_h >> 16);
}

static void virtio_gpu_cursor_plane_update(struct drm_plane *plane,
					   struct drm_plane_state *old_state)
{
	struct drm_device *dev = plane->dev;
	struct virtio_gpu_device *vgdev = dev->dev_private;
	struct virtio_gpu_output *output = NULL;
	struct virtio_gpu_framebuffer *vgfb;
	struct virtio_gpu_fence *fence = NULL;
	struct virtio_gpu_object *bo = NULL;
	uint32_t handle;
	int ret = 0;

	if (plane->state->crtc)
		output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);
	if (old_state->crtc)
		output = drm_crtc_to_virtio_gpu_output(old_state->crtc);
	if (WARN_ON(!output))
		return;

	if (plane->state->fb) {
		vgfb = to_virtio_gpu_framebuffer(plane->state->fb);
		bo = gem_to_virtio_gpu_obj(vgfb->obj);
		handle = bo->hw_res_handle;
	} else {
		handle = 0;
	}

	if (bo && bo->dumb && (plane->state->fb != old_state->fb)) {
		/* new cursor -- update & wait */
		virtio_gpu_cmd_transfer_to_host_2d
			(vgdev, handle, 0,
			 cpu_to_le32(plane->state->crtc_w),
			 cpu_to_le32(plane->state->crtc_h),
			 0, 0, &fence);
		ret = virtio_gpu_object_reserve(bo, false);
		if (!ret) {
			reservation_object_add_excl_fence(bo->tbo.resv,
							  &fence->f);
			dma_fence_put(&fence->f);
			fence = NULL;
			virtio_gpu_object_unreserve(bo);
			virtio_gpu_object_wait(bo, false);
		}
	}

	if (plane->state->fb != old_state->fb) {
		DRM_DEBUG("update, handle %d, pos +%d+%d, hot %d,%d\n", handle,
			  plane->state->crtc_x,
			  plane->state->crtc_y,
			  plane->state->fb ? plane->state->fb->hot_x : 0,
			  plane->state->fb ? plane->state->fb->hot_y : 0);
		output->cursor.hdr.type =
			cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR);
		output->cursor.resource_id = cpu_to_le32(handle);
		if (plane->state->fb) {
			output->cursor.hot_x =
				cpu_to_le32(plane->state->fb->hot_x);
			output->cursor.hot_y =
				cpu_to_le32(plane->state->fb->hot_y);
		} else {
			output->cursor.hot_x = cpu_to_le32(0);
			output->cursor.hot_y = cpu_to_le32(0);
		}
	} else {
		DRM_DEBUG("move +%d+%d\n",
			  plane->state->crtc_x,
			  plane->state->crtc_y);
		output->cursor.hdr.type =
			cpu_to_le32(VIRTIO_GPU_CMD_MOVE_CURSOR);
	}
	output->cursor.pos.x = cpu_to_le32(plane->state->crtc_x);
	output->cursor.pos.y = cpu_to_le32(plane->state->crtc_y);
	virtio_gpu_cursor_ping(vgdev, output);
}

static const struct drm_plane_helper_funcs virtio_gpu_primary_helper_funcs = {
	.atomic_check		= virtio_gpu_plane_atomic_check,
	.atomic_update		= virtio_gpu_primary_plane_update,
};

static const struct drm_plane_helper_funcs virtio_gpu_cursor_helper_funcs = {
	.atomic_check		= virtio_gpu_plane_atomic_check,
	.atomic_update		= virtio_gpu_cursor_plane_update,
};

struct drm_plane *virtio_gpu_plane_init(struct virtio_gpu_device *vgdev,
					enum drm_plane_type type,
					int index)
{
	struct drm_device *dev = vgdev->ddev;
	const struct drm_plane_helper_funcs *funcs;
	struct drm_plane *plane;
	const uint32_t *formats;
	int ret, nformats;

	plane = kzalloc(sizeof(*plane), GFP_KERNEL);
	if (!plane)
		return ERR_PTR(-ENOMEM);

	if (type == DRM_PLANE_TYPE_CURSOR) {
		formats = virtio_gpu_cursor_formats;
		nformats = ARRAY_SIZE(virtio_gpu_cursor_formats);
		funcs = &virtio_gpu_cursor_helper_funcs;
	} else {
		formats = virtio_gpu_formats;
		nformats = ARRAY_SIZE(virtio_gpu_formats);
		funcs = &virtio_gpu_primary_helper_funcs;
	}
	ret = drm_universal_plane_init(dev, plane, 1 << index,
				       &virtio_gpu_plane_funcs,
				       formats, nformats,
				       type, NULL);
	if (ret)
		goto err_plane_init;

	drm_plane_helper_add(plane, funcs);
	return plane;

err_plane_init:
	kfree(plane);
	return ERR_PTR(ret);
}
Commit	Line	Data
dc5698e8 DA	1	/*
	2	* Copyright (C) 2015 Red Hat, Inc.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining
	6	* a copy of this software and associated documentation files (the
	7	* "Software"), to deal in the Software without restriction, including
	8	* without limitation the rights to use, copy, modify, merge, publish,
	9	* distribute, sublicense, and/or sell copies of the Software, and to
	10	* permit persons to whom the Software is furnished to do so, subject to
	11	* the following conditions:
	12	*
	13	* The above copyright notice and this permission notice (including the
	14	* next paragraph) shall be included in all copies or substantial
	15	* portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	18	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	19	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
	20	* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
	21	* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
	22	* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
	23	* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
	24	*/
	25
	26	#include "virtgpu_drv.h"
	27	#include <drm/drm_plane_helper.h>
	28	#include <drm/drm_atomic_helper.h>
	29
	30	static const uint32_t virtio_gpu_formats[] = {
	31	DRM_FORMAT_XRGB8888,
	32	DRM_FORMAT_ARGB8888,
	33	DRM_FORMAT_BGRX8888,
	34	DRM_FORMAT_BGRA8888,
	35	DRM_FORMAT_RGBX8888,
	36	DRM_FORMAT_RGBA8888,
	37	DRM_FORMAT_XBGR8888,
	38	DRM_FORMAT_ABGR8888,
	39	};
	40
bbbed888 GH	41	static const uint32_t virtio_gpu_cursor_formats[] = {
	42	DRM_FORMAT_ARGB8888,
	43	};
	44
dc5698e8 DA	45	static void virtio_gpu_plane_destroy(struct drm_plane *plane)
	46	{
	47	kfree(plane);
	48	}
	49
	50	static const struct drm_plane_funcs virtio_gpu_plane_funcs = {
	51	.update_plane = drm_atomic_helper_update_plane,
	52	.disable_plane = drm_atomic_helper_disable_plane,
	53	.destroy = virtio_gpu_plane_destroy,
	54	.reset = drm_atomic_helper_plane_reset,
	55	.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
	56	.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
	57	};
	58
	59	static int virtio_gpu_plane_atomic_check(struct drm_plane *plane,
	60	struct drm_plane_state *state)
	61	{
	62	return 0;
	63	}
	64
bbbed888 GH	65	static void virtio_gpu_primary_plane_update(struct drm_plane *plane,
bbbed888 GH	66	struct drm_plane_state *old_state)
dc5698e8 DA	67	{
	68	struct drm_device *dev = plane->dev;
	69	struct virtio_gpu_device *vgdev = dev->dev_private;
d3767d49	70	struct virtio_gpu_output *output = NULL;
dc5698e8 DA	71	struct virtio_gpu_framebuffer *vgfb;
	72	struct virtio_gpu_object *bo;
	73	uint32_t handle;
	74
d3767d49 GH	75	if (plane->state->crtc)
	76	output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);
	77	if (old_state->crtc)
	78	output = drm_crtc_to_virtio_gpu_output(old_state->crtc);
b28c69dd HS	79	if (WARN_ON(!output))
b28c69dd HS	80	return;
d3767d49	81
11c94ace RH	82	if (plane->state->fb) {
11c94ace RH	83	vgfb = to_virtio_gpu_framebuffer(plane->state->fb);
dc5698e8 DA	84	bo = gem_to_virtio_gpu_obj(vgfb->obj);
dc5698e8 DA	85	handle = bo->hw_res_handle;
4109e7f7 RH	86	if (bo->dumb) {
	87	virtio_gpu_cmd_transfer_to_host_2d
	88	(vgdev, handle, 0,
0062795e GH	89	cpu_to_le32(plane->state->src_w >> 16),
	90	cpu_to_le32(plane->state->src_h >> 16),
	91	plane->state->src_x >> 16,
	92	plane->state->src_y >> 16, NULL);
4109e7f7	93	}
dc5698e8 DA	94	} else {
	95	handle = 0;
	96	}
	97
0062795e	98	DRM_DEBUG("handle 0x%x, crtc %dx%d+%d+%d, src %dx%d+%d+%d\n", handle,
dc5698e8	99	plane->state->crtc_w, plane->state->crtc_h,
0062795e GH	100	plane->state->crtc_x, plane->state->crtc_y,
	101	plane->state->src_w >> 16,
	102	plane->state->src_h >> 16,
	103	plane->state->src_x >> 16,
	104	plane->state->src_y >> 16);
dc5698e8	105	virtio_gpu_cmd_set_scanout(vgdev, output->index, handle,
0062795e GH	106	plane->state->src_w >> 16,
	107	plane->state->src_h >> 16,
	108	plane->state->src_x >> 16,
	109	plane->state->src_y >> 16);
bd17d1c7	110	virtio_gpu_cmd_resource_flush(vgdev, handle,
0062795e GH	111	plane->state->src_x >> 16,
	112	plane->state->src_y >> 16,
	113	plane->state->src_w >> 16,
	114	plane->state->src_h >> 16);
dc5698e8 DA	115	}
dc5698e8 DA	116
bbbed888 GH	117	static void virtio_gpu_cursor_plane_update(struct drm_plane *plane,
	118	struct drm_plane_state *old_state)
	119	{
	120	struct drm_device *dev = plane->dev;
	121	struct virtio_gpu_device *vgdev = dev->dev_private;
	122	struct virtio_gpu_output *output = NULL;
	123	struct virtio_gpu_framebuffer *vgfb;
	124	struct virtio_gpu_fence *fence = NULL;
	125	struct virtio_gpu_object *bo = NULL;
	126	uint32_t handle;
	127	int ret = 0;
dc5698e8	128
bbbed888 GH	129	if (plane->state->crtc)
	130	output = drm_crtc_to_virtio_gpu_output(plane->state->crtc);
	131	if (old_state->crtc)
	132	output = drm_crtc_to_virtio_gpu_output(old_state->crtc);
b28c69dd HS	133	if (WARN_ON(!output))
b28c69dd HS	134	return;
bbbed888 GH	135
	136	if (plane->state->fb) {
	137	vgfb = to_virtio_gpu_framebuffer(plane->state->fb);
	138	bo = gem_to_virtio_gpu_obj(vgfb->obj);
	139	handle = bo->hw_res_handle;
	140	} else {
	141	handle = 0;
	142	}
	143
	144	if (bo && bo->dumb && (plane->state->fb != old_state->fb)) {
	145	/* new cursor -- update & wait */
	146	virtio_gpu_cmd_transfer_to_host_2d
	147	(vgdev, handle, 0,
	148	cpu_to_le32(plane->state->crtc_w),
	149	cpu_to_le32(plane->state->crtc_h),
	150	0, 0, &fence);
	151	ret = virtio_gpu_object_reserve(bo, false);
	152	if (!ret) {
	153	reservation_object_add_excl_fence(bo->tbo.resv,
	154	&fence->f);
f54d1867	155	dma_fence_put(&fence->f);
bbbed888 GH	156	fence = NULL;
	157	virtio_gpu_object_unreserve(bo);
	158	virtio_gpu_object_wait(bo, false);
	159	}
	160	}
	161
	162	if (plane->state->fb != old_state->fb) {
86f752d2	163	DRM_DEBUG("update, handle %d, pos +%d+%d, hot %d,%d\n", handle,
bbbed888	164	plane->state->crtc_x,
86f752d2 GH	165	plane->state->crtc_y,
	166	plane->state->fb ? plane->state->fb->hot_x : 0,
	167	plane->state->fb ? plane->state->fb->hot_y : 0);
bbbed888 GH	168	output->cursor.hdr.type =
	169	cpu_to_le32(VIRTIO_GPU_CMD_UPDATE_CURSOR);
	170	output->cursor.resource_id = cpu_to_le32(handle);
86f752d2 GH	171	if (plane->state->fb) {
	172	output->cursor.hot_x =
	173	cpu_to_le32(plane->state->fb->hot_x);
	174	output->cursor.hot_y =
	175	cpu_to_le32(plane->state->fb->hot_y);
	176	} else {
	177	output->cursor.hot_x = cpu_to_le32(0);
	178	output->cursor.hot_y = cpu_to_le32(0);
	179	}
bbbed888 GH	180	} else {
	181	DRM_DEBUG("move +%d+%d\n",
	182	plane->state->crtc_x,
	183	plane->state->crtc_y);
	184	output->cursor.hdr.type =
	185	cpu_to_le32(VIRTIO_GPU_CMD_MOVE_CURSOR);
	186	}
	187	output->cursor.pos.x = cpu_to_le32(plane->state->crtc_x);
	188	output->cursor.pos.y = cpu_to_le32(plane->state->crtc_y);
	189	virtio_gpu_cursor_ping(vgdev, output);
	190	}
	191
	192	static const struct drm_plane_helper_funcs virtio_gpu_primary_helper_funcs = {
dc5698e8	193	.atomic_check = virtio_gpu_plane_atomic_check,
bbbed888 GH	194	.atomic_update = virtio_gpu_primary_plane_update,
	195	};
	196
	197	static const struct drm_plane_helper_funcs virtio_gpu_cursor_helper_funcs = {
	198	.atomic_check = virtio_gpu_plane_atomic_check,
	199	.atomic_update = virtio_gpu_cursor_plane_update,
dc5698e8 DA	200	};
	201
	202	struct drm_plane virtio_gpu_plane_init(struct virtio_gpu_device vgdev,
bbbed888	203	enum drm_plane_type type,
dc5698e8 DA	204	int index)
	205	{
	206	struct drm_device *dev = vgdev->ddev;
bbbed888	207	const struct drm_plane_helper_funcs *funcs;
dc5698e8	208	struct drm_plane *plane;
bbbed888 GH	209	const uint32_t *formats;
bbbed888 GH	210	int ret, nformats;
dc5698e8 DA	211
	212	plane = kzalloc(sizeof(*plane), GFP_KERNEL);
	213	if (!plane)
	214	return ERR_PTR(-ENOMEM);
	215
bbbed888 GH	216	if (type == DRM_PLANE_TYPE_CURSOR) {
	217	formats = virtio_gpu_cursor_formats;
	218	nformats = ARRAY_SIZE(virtio_gpu_cursor_formats);
	219	funcs = &virtio_gpu_cursor_helper_funcs;
	220	} else {
	221	formats = virtio_gpu_formats;
	222	nformats = ARRAY_SIZE(virtio_gpu_formats);
	223	funcs = &virtio_gpu_primary_helper_funcs;
	224	}
dc5698e8 DA	225	ret = drm_universal_plane_init(dev, plane, 1 << index,
dc5698e8 DA	226	&virtio_gpu_plane_funcs,
bbbed888 GH	227	formats, nformats,
bbbed888 GH	228	type, NULL);
dc5698e8 DA	229	if (ret)
	230	goto err_plane_init;
	231
bbbed888	232	drm_plane_helper_add(plane, funcs);
dc5698e8 DA	233	return plane;
	234
	235	err_plane_init:
	236	kfree(plane);
	237	return ERR_PTR(ret);
	238	}