[linux-2.6-block.git] / drivers / gpu / drm / via / via_drv.h

/*
 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sub license,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial portions
 * of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */
#ifndef _VIA_DRV_H_
#define _VIA_DRV_H_

#include <linux/dma-mapping.h>
#include <linux/irqreturn.h>
#include <linux/jiffies.h>
#include <linux/sched.h>
#include <linux/sched/signal.h>
#include <linux/wait.h>

#include <drm/drm_ioctl.h>
#include <drm/drm_legacy.h>
#include <drm/drm_mm.h>
#include <drm/via_drm.h>

#define DRIVER_AUTHOR	"Various"

#define DRIVER_NAME		"via"
#define DRIVER_DESC		"VIA Unichrome / Pro"
#define DRIVER_DATE		"20070202"

#define DRIVER_MAJOR		2
#define DRIVER_MINOR		11
#define DRIVER_PATCHLEVEL	1

#include "via_verifier.h"

#define VIA_PCI_BUF_SIZE 60000
#define VIA_FIRE_BUF_SIZE  1024
#define VIA_NUM_IRQS 4


#define VIA_NUM_BLIT_ENGINES 2
#define VIA_NUM_BLIT_SLOTS 8

struct _drm_via_descriptor;

typedef struct _drm_via_sg_info {
	struct page **pages;
	unsigned long num_pages;
	struct _drm_via_descriptor **desc_pages;
	int num_desc_pages;
	int num_desc;
	enum dma_data_direction direction;
	unsigned char *bounce_buffer;
	dma_addr_t chain_start;
	uint32_t free_on_sequence;
	unsigned int descriptors_per_page;
	int aborted;
	enum {
		dr_via_device_mapped,
		dr_via_desc_pages_alloc,
		dr_via_pages_locked,
		dr_via_pages_alloc,
		dr_via_sg_init
	} state;
} drm_via_sg_info_t;

typedef struct _drm_via_blitq {
	struct drm_device *dev;
	uint32_t cur_blit_handle;
	uint32_t done_blit_handle;
	unsigned serviced;
	unsigned head;
	unsigned cur;
	unsigned num_free;
	unsigned num_outstanding;
	unsigned long end;
	int aborting;
	int is_active;
	drm_via_sg_info_t *blits[VIA_NUM_BLIT_SLOTS];
	spinlock_t blit_lock;
	wait_queue_head_t blit_queue[VIA_NUM_BLIT_SLOTS];
	wait_queue_head_t busy_queue;
	struct work_struct wq;
	struct timer_list poll_timer;
} drm_via_blitq_t;

typedef struct drm_via_ring_buffer {
	drm_local_map_t map;
	char *virtual_start;
} drm_via_ring_buffer_t;

typedef uint32_t maskarray_t[5];

typedef struct drm_via_irq {
	atomic_t irq_received;
	uint32_t pending_mask;
	uint32_t enable_mask;
	wait_queue_head_t irq_queue;
} drm_via_irq_t;

typedef struct drm_via_private {
	drm_via_sarea_t *sarea_priv;
	drm_local_map_t *sarea;
	drm_local_map_t *fb;
	drm_local_map_t *mmio;
	unsigned long agpAddr;
	wait_queue_head_t decoder_queue[VIA_NR_XVMC_LOCKS];
	char *dma_ptr;
	unsigned int dma_low;
	unsigned int dma_high;
	unsigned int dma_offset;
	uint32_t dma_wrap;
	volatile uint32_t *last_pause_ptr;
	volatile uint32_t *hw_addr_ptr;
	drm_via_ring_buffer_t ring;
	ktime_t last_vblank;
	int last_vblank_valid;
	ktime_t nsec_per_vblank;
	atomic_t vbl_received;
	drm_via_state_t hc_state;
	char pci_buf[VIA_PCI_BUF_SIZE];
	const uint32_t *fire_offsets[VIA_FIRE_BUF_SIZE];
	uint32_t num_fire_offsets;
	int chipset;
	drm_via_irq_t via_irqs[VIA_NUM_IRQS];
	unsigned num_irqs;
	maskarray_t *irq_masks;
	uint32_t irq_enable_mask;
	uint32_t irq_pending_mask;
	int *irq_map;
	unsigned int idle_fault;
	int vram_initialized;
	struct drm_mm vram_mm;
	int agp_initialized;
	struct drm_mm agp_mm;
	/** Mapping of userspace keys to mm objects */
	struct idr object_idr;
	unsigned long vram_offset;
	unsigned long agp_offset;
	drm_via_blitq_t blit_queues[VIA_NUM_BLIT_ENGINES];
	uint32_t dma_diff;
} drm_via_private_t;

struct via_file_private {
	struct list_head obj_list;
};

enum via_family {
  VIA_OTHER = 0,     /* Baseline */
  VIA_PRO_GROUP_A,   /* Another video engine and DMA commands */
  VIA_DX9_0          /* Same video as pro_group_a, but 3D is unsupported */
};

/* VIA MMIO register access */
static inline u32 via_read(struct drm_via_private *dev_priv, u32 reg)
{
	return readl((void __iomem *)(dev_priv->mmio->handle + reg));
}

static inline void via_write(struct drm_via_private *dev_priv, u32 reg,
			     u32 val)
{
	writel(val, (void __iomem *)(dev_priv->mmio->handle + reg));
}

static inline void via_write8(struct drm_via_private *dev_priv, u32 reg,
			      u32 val)
{
	writeb(val, (void __iomem *)(dev_priv->mmio->handle + reg));
}

static inline void via_write8_mask(struct drm_via_private *dev_priv,
				   u32 reg, u32 mask, u32 val)
{
	u32 tmp;

	tmp = readb((void __iomem *)(dev_priv->mmio->handle + reg));
	tmp = (tmp & ~mask) | (val & mask);
	writeb(tmp, (void __iomem *)(dev_priv->mmio->handle + reg));
}

/*
 * Poll in a loop waiting for 'contidition' to be true.
 * Note: A direct replacement with wait_event_interruptible_timeout()
 *       will not work unless driver is updated to emit wake_up()
 *       in relevant places that can impact the 'condition'
 *
 * Returns:
 *   ret keeps current value if 'condition' becomes true
 *   ret = -BUSY if timeout happens
 *   ret = -EINTR if a signal interrupted the waiting period
 */
#define VIA_WAIT_ON( ret, queue, timeout, condition )		\
do {								\
	DECLARE_WAITQUEUE(entry, current);			\
	unsigned long end = jiffies + (timeout);		\
	add_wait_queue(&(queue), &entry);			\
								\
	for (;;) {						\
		__set_current_state(TASK_INTERRUPTIBLE);	\
		if (condition)					\
			break;					\
		if (time_after_eq(jiffies, end)) {		\
			ret = -EBUSY;				\
			break;					\
		}						\
		schedule_timeout((HZ/100 > 1) ? HZ/100 : 1);	\
		if (signal_pending(current)) {			\
			ret = -EINTR;				\
			break;					\
		}						\
	}							\
	__set_current_state(TASK_RUNNING);			\
	remove_wait_queue(&(queue), &entry);			\
} while (0)

extern int via_init_context(struct drm_device *dev, int context);

extern int via_do_cleanup_map(struct drm_device *dev);

extern int via_dma_cleanup(struct drm_device *dev);
extern void via_init_command_verifier(void);
extern int via_driver_dma_quiescent(struct drm_device *dev);

#endif
Commit	Line	Data
22f579c6 DA	1	/*
	2	* Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
	3	* Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sub license,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the
	13	* next paragraph) shall be included in all copies or substantial portions
	14	* of the Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
	19	* VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	22	* DEALINGS IN THE SOFTWARE.
	23	*/
	24	#ifndef _VIA_DRV_H_
	25	#define _VIA_DRV_H_
	26
f99995a4	27	#include <linux/dma-mapping.h>
2299b52d	28	#include <linux/irqreturn.h>
9154e60c SR	29	#include <linux/jiffies.h>
	30	#include <linux/sched.h>
	31	#include <linux/sched/signal.h>
	32	#include <linux/wait.h>
	33
2299b52d	34	#include <drm/drm_ioctl.h>
4f03b1fc	35	#include <drm/drm_legacy.h>
9154e60c	36	#include <drm/drm_mm.h>
2299b52d	37	#include <drm/via_drm.h>
4f03b1fc	38
92514243	39	#define DRIVER_AUTHOR "Various"
22f579c6 DA	40
	41	#define DRIVER_NAME "via"
	42	#define DRIVER_DESC "VIA Unichrome / Pro"
a0a6dd0b	43	#define DRIVER_DATE "20070202"
22f579c6 DA	44
22f579c6 DA	45	#define DRIVER_MAJOR 2
9b8d9d0e	46	#define DRIVER_MINOR 11
a0a6dd0b	47	#define DRIVER_PATCHLEVEL 1
22f579c6 DA	48
	49	#include "via_verifier.h"
	50
	51	#define VIA_PCI_BUF_SIZE 60000
	52	#define VIA_FIRE_BUF_SIZE 1024
92514243	53	#define VIA_NUM_IRQS 4
22f579c6	54
f99995a4 SR	55
	56	#define VIA_NUM_BLIT_ENGINES 2
	57	#define VIA_NUM_BLIT_SLOTS 8
	58
	59	struct _drm_via_descriptor;
	60
	61	typedef struct _drm_via_sg_info {
	62	struct page **pages;
	63	unsigned long num_pages;
	64	struct _drm_via_descriptor **desc_pages;
	65	int num_desc_pages;
	66	int num_desc;
	67	enum dma_data_direction direction;
	68	unsigned char *bounce_buffer;
	69	dma_addr_t chain_start;
	70	uint32_t free_on_sequence;
	71	unsigned int descriptors_per_page;
	72	int aborted;
	73	enum {
	74	dr_via_device_mapped,
	75	dr_via_desc_pages_alloc,
	76	dr_via_pages_locked,
	77	dr_via_pages_alloc,
	78	dr_via_sg_init
	79	} state;
	80	} drm_via_sg_info_t;
	81
	82	typedef struct _drm_via_blitq {
	83	struct drm_device *dev;
	84	uint32_t cur_blit_handle;
	85	uint32_t done_blit_handle;
	86	unsigned serviced;
	87	unsigned head;
	88	unsigned cur;
	89	unsigned num_free;
	90	unsigned num_outstanding;
	91	unsigned long end;
	92	int aborting;
	93	int is_active;
	94	drm_via_sg_info_t *blits[VIA_NUM_BLIT_SLOTS];
	95	spinlock_t blit_lock;
	96	wait_queue_head_t blit_queue[VIA_NUM_BLIT_SLOTS];
	97	wait_queue_head_t busy_queue;
	98	struct work_struct wq;
	99	struct timer_list poll_timer;
	100	} drm_via_blitq_t;
	101
22f579c6	102	typedef struct drm_via_ring_buffer {
92514243	103	drm_local_map_t map;
22f579c6 DA	104	char *virtual_start;
	105	} drm_via_ring_buffer_t;
	106
	107	typedef uint32_t maskarray_t[5];
	108
	109	typedef struct drm_via_irq {
	110	atomic_t irq_received;
	111	uint32_t pending_mask;
	112	uint32_t enable_mask;
	113	wait_queue_head_t irq_queue;
	114	} drm_via_irq_t;
b5e89ed5	115
22f579c6 DA	116	typedef struct drm_via_private {
22f579c6 DA	117	drm_via_sarea_t *sarea_priv;
92514243 DA	118	drm_local_map_t *sarea;
	119	drm_local_map_t *fb;
	120	drm_local_map_t *mmio;
22f579c6 DA	121	unsigned long agpAddr;
	122	wait_queue_head_t decoder_queue[VIA_NR_XVMC_LOCKS];
	123	char *dma_ptr;
	124	unsigned int dma_low;
	125	unsigned int dma_high;
	126	unsigned int dma_offset;
	127	uint32_t dma_wrap;
	128	volatile uint32_t *last_pause_ptr;
	129	volatile uint32_t *hw_addr_ptr;
	130	drm_via_ring_buffer_t ring;
de7e8bd0	131	ktime_t last_vblank;
b5e89ed5	132	int last_vblank_valid;
de7e8bd0	133	ktime_t nsec_per_vblank;
0a3e67a4	134	atomic_t vbl_received;
22f579c6 DA	135	drm_via_state_t hc_state;
	136	char pci_buf[VIA_PCI_BUF_SIZE];
	137	const uint32_t *fire_offsets[VIA_FIRE_BUF_SIZE];
	138	uint32_t num_fire_offsets;
689692e7	139	int chipset;
22f579c6 DA	140	drm_via_irq_t via_irqs[VIA_NUM_IRQS];
	141	unsigned num_irqs;
	142	maskarray_t *irq_masks;
b5e89ed5 DA	143	uint32_t irq_enable_mask;
b5e89ed5 DA	144	uint32_t irq_pending_mask;
92514243	145	int *irq_map;
ce65a44d	146	unsigned int idle_fault;
ce65a44d	147	int vram_initialized;
977b4f6e	148	struct drm_mm vram_mm;
ce65a44d	149	int agp_initialized;
977b4f6e	150	struct drm_mm agp_mm;
77ee8f38 DV	151	/** Mapping of userspace keys to mm objects */
77ee8f38 DV	152	struct idr object_idr;
ce65a44d TH	153	unsigned long vram_offset;
ce65a44d TH	154	unsigned long agp_offset;
92514243	155	drm_via_blitq_t blit_queues[VIA_NUM_BLIT_ENGINES];
a0a6dd0b	156	uint32_t dma_diff;
22f579c6 DA	157	} drm_via_private_t;
22f579c6 DA	158
c76af02d MR	159	struct via_file_private {
	160	struct list_head obj_list;
	161	};
	162
92514243	163	enum via_family {
689692e7 TH	164	VIA_OTHER = 0, /* Baseline */
	165	VIA_PRO_GROUP_A, /* Another video engine and DMA commands */
	166	VIA_DX9_0 /* Same video as pro_group_a, but 3D is unsupported */
92514243 DA	167	};
92514243 DA	168
22f579c6	169	/* VIA MMIO register access */
3bf2a06e SR	170	static inline u32 via_read(struct drm_via_private *dev_priv, u32 reg)
	171	{
	172	return readl((void __iomem *)(dev_priv->mmio->handle + reg));
	173	}
	174
	175	static inline void via_write(struct drm_via_private *dev_priv, u32 reg,
	176	u32 val)
	177	{
	178	writel(val, (void __iomem *)(dev_priv->mmio->handle + reg));
	179	}
	180
	181	static inline void via_write8(struct drm_via_private *dev_priv, u32 reg,
	182	u32 val)
	183	{
	184	writeb(val, (void __iomem *)(dev_priv->mmio->handle + reg));
	185	}
	186
	187	static inline void via_write8_mask(struct drm_via_private *dev_priv,
	188	u32 reg, u32 mask, u32 val)
	189	{
	190	u32 tmp;
	191
	192	tmp = readb((void __iomem *)(dev_priv->mmio->handle + reg));
	193	tmp = (tmp & ~mask) \| (val & mask);
	194	writeb(tmp, (void __iomem *)(dev_priv->mmio->handle + reg));
	195	}
22f579c6	196
9154e60c SR	197	/*
	198	* Poll in a loop waiting for 'contidition' to be true.
	199	* Note: A direct replacement with wait_event_interruptible_timeout()
	200	* will not work unless driver is updated to emit wake_up()
	201	* in relevant places that can impact the 'condition'
	202	*
	203	* Returns:
	204	* ret keeps current value if 'condition' becomes true
	205	* ret = -BUSY if timeout happens
	206	* ret = -EINTR if a signal interrupted the waiting period
	207	*/
	208	#define VIA_WAIT_ON( ret, queue, timeout, condition ) \
	209	do { \
	210	DECLARE_WAITQUEUE(entry, current); \
	211	unsigned long end = jiffies + (timeout); \
	212	add_wait_queue(&(queue), &entry); \
	213	\
	214	for (;;) { \
	215	__set_current_state(TASK_INTERRUPTIBLE); \
	216	if (condition) \
	217	break; \
	218	if (time_after_eq(jiffies, end)) { \
	219	ret = -EBUSY; \
	220	break; \
	221	} \
	222	schedule_timeout((HZ/100 > 1) ? HZ/100 : 1); \
	223	if (signal_pending(current)) { \
	224	ret = -EINTR; \
	225	break; \
	226	} \
	227	} \
	228	__set_current_state(TASK_RUNNING); \
	229	remove_wait_queue(&(queue), &entry); \
	230	} while (0)
	231
58c1e85a	232	extern int via_init_context(struct drm_device *dev, int context);
22f579c6	233
58c1e85a	234	extern int via_do_cleanup_map(struct drm_device *dev);
22f579c6	235
58c1e85a	236	extern int via_dma_cleanup(struct drm_device *dev);
22f579c6	237	extern void via_init_command_verifier(void);
58c1e85a	238	extern int via_driver_dma_quiescent(struct drm_device *dev);
22f579c6 DA	239
22f579c6 DA	240	#endif