[linux-2.6-block.git] / drivers / gpu / drm / vc4 / vc4_dpi.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2016 Broadcom Limited
 */

/**
 * DOC: VC4 DPI module
 *
 * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
 * signals.  On BCM2835, these can be routed out to GPIO0-27 with the
 * ALT2 function.
 */

#include <drm/drm_atomic_helper.h>
#include <drm/drm_bridge.h>
#include <drm/drm_drv.h>
#include <drm/drm_edid.h>
#include <drm/drm_of.h>
#include <drm/drm_panel.h>
#include <drm/drm_probe_helper.h>
#include <drm/drm_simple_kms_helper.h>
#include <linux/clk.h>
#include <linux/component.h>
#include <linux/media-bus-format.h>
#include <linux/mod_devicetable.h>
#include <linux/platform_device.h>
#include "vc4_drv.h"
#include "vc4_regs.h"

#define DPI_C			0x00
# define DPI_OUTPUT_ENABLE_MODE		BIT(16)

/* The order field takes the incoming 24 bit RGB from the pixel valve
 * and shuffles the 3 channels.
 */
# define DPI_ORDER_MASK			VC4_MASK(15, 14)
# define DPI_ORDER_SHIFT		14
# define DPI_ORDER_RGB			0
# define DPI_ORDER_BGR			1
# define DPI_ORDER_GRB			2
# define DPI_ORDER_BRG			3

/* The format field takes the ORDER-shuffled pixel valve data and
 * formats it onto the output lines.
 */
# define DPI_FORMAT_MASK		VC4_MASK(13, 11)
# define DPI_FORMAT_SHIFT		11
/* This define is named in the hardware, but actually just outputs 0. */
# define DPI_FORMAT_9BIT_666_RGB	0
/* Outputs 00000000rrrrrggggggbbbbb */
# define DPI_FORMAT_16BIT_565_RGB_1	1
/* Outputs 000rrrrr00gggggg000bbbbb */
# define DPI_FORMAT_16BIT_565_RGB_2	2
/* Outputs 00rrrrr000gggggg00bbbbb0 */
# define DPI_FORMAT_16BIT_565_RGB_3	3
/* Outputs 000000rrrrrrggggggbbbbbb */
# define DPI_FORMAT_18BIT_666_RGB_1	4
/* Outputs 00rrrrrr00gggggg00bbbbbb */
# define DPI_FORMAT_18BIT_666_RGB_2	5
/* Outputs rrrrrrrrggggggggbbbbbbbb */
# define DPI_FORMAT_24BIT_888_RGB	6

/* Reverses the polarity of the corresponding signal */
# define DPI_PIXEL_CLK_INVERT		BIT(10)
# define DPI_HSYNC_INVERT		BIT(9)
# define DPI_VSYNC_INVERT		BIT(8)
# define DPI_OUTPUT_ENABLE_INVERT	BIT(7)

/* Outputs the signal the falling clock edge instead of rising. */
# define DPI_HSYNC_NEGATE		BIT(6)
# define DPI_VSYNC_NEGATE		BIT(5)
# define DPI_OUTPUT_ENABLE_NEGATE	BIT(4)

/* Disables the signal */
# define DPI_HSYNC_DISABLE		BIT(3)
# define DPI_VSYNC_DISABLE		BIT(2)
# define DPI_OUTPUT_ENABLE_DISABLE	BIT(1)

/* Power gate to the device, full reset at 0 -> 1 transition */
# define DPI_ENABLE			BIT(0)

/* All other registers besides DPI_C return the ID */
#define DPI_ID			0x04
# define DPI_ID_VALUE		0x00647069

/* General DPI hardware state. */
struct vc4_dpi {
	struct vc4_encoder encoder;

	struct platform_device *pdev;

	void __iomem *regs;

	struct clk *pixel_clock;
	struct clk *core_clock;

	struct debugfs_regset32 regset;
};

#define to_vc4_dpi(_encoder)						\
	container_of_const(_encoder, struct vc4_dpi, encoder.base)

#define DPI_READ(offset)								\
	({										\
		kunit_fail_current_test("Accessing a register in a unit test!\n");	\
		readl(dpi->regs + (offset));						\
	})

#define DPI_WRITE(offset, val)								\
	do {										\
		kunit_fail_current_test("Accessing a register in a unit test!\n");	\
		writel(val, dpi->regs + (offset));					\
	} while (0)

static const struct debugfs_reg32 dpi_regs[] = {
	VC4_REG32(DPI_C),
	VC4_REG32(DPI_ID),
};

static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
{
	struct drm_device *dev = encoder->dev;
	struct vc4_dpi *dpi = to_vc4_dpi(encoder);
	int idx;

	if (!drm_dev_enter(dev, &idx))
		return;

	clk_disable_unprepare(dpi->pixel_clock);

	drm_dev_exit(idx);
}

static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
{
	struct drm_device *dev = encoder->dev;
	struct drm_display_mode *mode = &encoder->crtc->mode;
	struct vc4_dpi *dpi = to_vc4_dpi(encoder);
	struct drm_connector_list_iter conn_iter;
	struct drm_connector *connector = NULL, *connector_scan;
	u32 dpi_c = DPI_ENABLE;
	int idx;
	int ret;

	/* Look up the connector attached to DPI so we can get the
	 * bus_format.  Ideally the bridge would tell us the
	 * bus_format we want, but it doesn't yet, so assume that it's
	 * uniform throughout the bridge chain.
	 */
	drm_connector_list_iter_begin(dev, &conn_iter);
	drm_for_each_connector_iter(connector_scan, &conn_iter) {
		if (connector_scan->encoder == encoder) {
			connector = connector_scan;
			break;
		}
	}
	drm_connector_list_iter_end(&conn_iter);

	/* Default to 18bit if no connector or format found. */
	dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, DPI_FORMAT);

	if (connector) {
		if (connector->display_info.num_bus_formats) {
			u32 bus_format = connector->display_info.bus_formats[0];

			dpi_c &= ~DPI_FORMAT_MASK;

			switch (bus_format) {
			case MEDIA_BUS_FMT_RGB888_1X24:
				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
						       DPI_FORMAT);
				break;
			case MEDIA_BUS_FMT_BGR888_1X24:
				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
						       DPI_FORMAT);
				dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
						       DPI_ORDER);
				break;
			case MEDIA_BUS_FMT_BGR666_1X24_CPADHI:
				dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
				fallthrough;
			case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
						       DPI_FORMAT);
				break;
			case MEDIA_BUS_FMT_BGR666_1X18:
				dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
				fallthrough;
			case MEDIA_BUS_FMT_RGB666_1X18:
				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
						       DPI_FORMAT);
				break;
			case MEDIA_BUS_FMT_RGB565_1X16:
				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_1,
						       DPI_FORMAT);
				break;
			case MEDIA_BUS_FMT_RGB565_1X24_CPADHI:
				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_2,
						       DPI_FORMAT);
				break;
			default:
				drm_err(dev, "Unknown media bus format %d\n",
					bus_format);
				break;
			}
		}

		if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
			dpi_c |= DPI_PIXEL_CLK_INVERT;

		if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
			dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
	}

	if (mode->flags & DRM_MODE_FLAG_CSYNC) {
		if (mode->flags & DRM_MODE_FLAG_NCSYNC)
			dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
	} else {
		dpi_c |= DPI_OUTPUT_ENABLE_MODE;

		if (mode->flags & DRM_MODE_FLAG_NHSYNC)
			dpi_c |= DPI_HSYNC_INVERT;
		else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
			dpi_c |= DPI_HSYNC_DISABLE;

		if (mode->flags & DRM_MODE_FLAG_NVSYNC)
			dpi_c |= DPI_VSYNC_INVERT;
		else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
			dpi_c |= DPI_VSYNC_DISABLE;
	}

	if (!drm_dev_enter(dev, &idx))
		return;

	DPI_WRITE(DPI_C, dpi_c);

	ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
	if (ret)
		drm_err(dev, "Failed to set clock rate: %d\n", ret);

	ret = clk_prepare_enable(dpi->pixel_clock);
	if (ret)
		drm_err(dev, "Failed to set clock rate: %d\n", ret);

	drm_dev_exit(idx);
}

static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
						       const struct drm_display_mode *mode)
{
	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
		return MODE_NO_INTERLACE;

	return MODE_OK;
}

static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
	.disable = vc4_dpi_encoder_disable,
	.enable = vc4_dpi_encoder_enable,
	.mode_valid = vc4_dpi_encoder_mode_valid,
};

static int vc4_dpi_late_register(struct drm_encoder *encoder)
{
	struct drm_device *drm = encoder->dev;
	struct vc4_dpi *dpi = to_vc4_dpi(encoder);

	vc4_debugfs_add_regset32(drm, "dpi_regs", &dpi->regset);

	return 0;
}

static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
	.late_register = vc4_dpi_late_register,
};

static const struct of_device_id vc4_dpi_dt_match[] = {
	{ .compatible = "brcm,bcm2835-dpi", .data = NULL },
	{}
};

/* Sets up the next link in the display chain, whether it's a panel or
 * a bridge.
 */
static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
{
	struct drm_device *drm = dpi->encoder.base.dev;
	struct device *dev = &dpi->pdev->dev;
	struct drm_bridge *bridge;

	bridge = drmm_of_get_bridge(drm, dev->of_node, 0, 0);
	if (IS_ERR(bridge)) {
		/* If nothing was connected in the DT, that's not an
		 * error.
		 */
		if (PTR_ERR(bridge) == -ENODEV)
			return 0;
		else
			return PTR_ERR(bridge);
	}

	return drm_bridge_attach(&dpi->encoder.base, bridge, NULL, 0);
}

static void vc4_dpi_disable_clock(void *ptr)
{
	struct vc4_dpi *dpi = ptr;

	clk_disable_unprepare(dpi->core_clock);
}

static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct drm_device *drm = dev_get_drvdata(master);
	struct vc4_dpi *dpi;
	int ret;

	dpi = drmm_kzalloc(drm, sizeof(*dpi), GFP_KERNEL);
	if (!dpi)
		return -ENOMEM;

	dpi->encoder.type = VC4_ENCODER_TYPE_DPI;
	dpi->pdev = pdev;
	dpi->regs = vc4_ioremap_regs(pdev, 0);
	if (IS_ERR(dpi->regs))
		return PTR_ERR(dpi->regs);
	dpi->regset.base = dpi->regs;
	dpi->regset.regs = dpi_regs;
	dpi->regset.nregs = ARRAY_SIZE(dpi_regs);

	if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
		dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
			DPI_READ(DPI_ID), DPI_ID_VALUE);
		return -ENODEV;
	}

	dpi->core_clock = devm_clk_get(dev, "core");
	if (IS_ERR(dpi->core_clock)) {
		ret = PTR_ERR(dpi->core_clock);
		if (ret != -EPROBE_DEFER)
			drm_err(drm, "Failed to get core clock: %d\n", ret);
		return ret;
	}

	dpi->pixel_clock = devm_clk_get(dev, "pixel");
	if (IS_ERR(dpi->pixel_clock)) {
		ret = PTR_ERR(dpi->pixel_clock);
		if (ret != -EPROBE_DEFER)
			drm_err(drm, "Failed to get pixel clock: %d\n", ret);
		return ret;
	}

	ret = clk_prepare_enable(dpi->core_clock);
	if (ret) {
		drm_err(drm, "Failed to turn on core clock: %d\n", ret);
		return ret;
	}

	ret = devm_add_action_or_reset(dev, vc4_dpi_disable_clock, dpi);
	if (ret)
		return ret;

	ret = drmm_encoder_init(drm, &dpi->encoder.base,
				&vc4_dpi_encoder_funcs,
				DRM_MODE_ENCODER_DPI,
				NULL);
	if (ret)
		return ret;

	drm_encoder_helper_add(&dpi->encoder.base, &vc4_dpi_encoder_helper_funcs);

	ret = vc4_dpi_init_bridge(dpi);
	if (ret)
		return ret;

	dev_set_drvdata(dev, dpi);

	return 0;
}

static const struct component_ops vc4_dpi_ops = {
	.bind   = vc4_dpi_bind,
};

static int vc4_dpi_dev_probe(struct platform_device *pdev)
{
	return component_add(&pdev->dev, &vc4_dpi_ops);
}

static void vc4_dpi_dev_remove(struct platform_device *pdev)
{
	component_del(&pdev->dev, &vc4_dpi_ops);
}

struct platform_driver vc4_dpi_driver = {
	.probe = vc4_dpi_dev_probe,
	.remove_new = vc4_dpi_dev_remove,
	.driver = {
		.name = "vc4_dpi",
		.of_match_table = vc4_dpi_dt_match,
	},
};
Commit	Line	Data
caab277b	1	// SPDX-License-Identifier: GPL-2.0-only
08302c35 EA	2	/*
08302c35 EA	3	* Copyright (C) 2016 Broadcom Limited
08302c35 EA	4	*/
	5
	6	/**
	7	* DOC: VC4 DPI module
	8	*
	9	* The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
f6c01530 EA	10	* signals. On BCM2835, these can be routed out to GPIO0-27 with the
f6c01530 EA	11	* ALT2 function.
08302c35 EA	12	*/
08302c35 EA	13
b7e8e25b	14	#include <drm/drm_atomic_helper.h>
7b1298e0	15	#include <drm/drm_bridge.h>
71b1bd4c	16	#include <drm/drm_drv.h>
b7e8e25b	17	#include <drm/drm_edid.h>
7b1298e0	18	#include <drm/drm_of.h>
b7e8e25b	19	#include <drm/drm_panel.h>
fcd70cd3	20	#include <drm/drm_probe_helper.h>
f6ebc1b0	21	#include <drm/drm_simple_kms_helper.h>
b7e8e25b MY	22	#include <linux/clk.h>
b7e8e25b MY	23	#include <linux/component.h>
72bd9ea3	24	#include <linux/media-bus-format.h>
722d4f06 RH	25	#include <linux/mod_devicetable.h>
722d4f06 RH	26	#include <linux/platform_device.h>
08302c35 EA	27	#include "vc4_drv.h"
	28	#include "vc4_regs.h"
	29
	30	#define DPI_C 0x00
	31	# define DPI_OUTPUT_ENABLE_MODE BIT(16)
	32
	33	/* The order field takes the incoming 24 bit RGB from the pixel valve
	34	* and shuffles the 3 channels.
	35	*/
	36	# define DPI_ORDER_MASK VC4_MASK(15, 14)
	37	# define DPI_ORDER_SHIFT 14
	38	# define DPI_ORDER_RGB 0
	39	# define DPI_ORDER_BGR 1
	40	# define DPI_ORDER_GRB 2
	41	# define DPI_ORDER_BRG 3
	42
	43	/* The format field takes the ORDER-shuffled pixel valve data and
	44	* formats it onto the output lines.
	45	*/
	46	# define DPI_FORMAT_MASK VC4_MASK(13, 11)
	47	# define DPI_FORMAT_SHIFT 11
	48	/* This define is named in the hardware, but actually just outputs 0. */
	49	# define DPI_FORMAT_9BIT_666_RGB 0
	50	/* Outputs 00000000rrrrrggggggbbbbb */
	51	# define DPI_FORMAT_16BIT_565_RGB_1 1
	52	/* Outputs 000rrrrr00gggggg000bbbbb */
	53	# define DPI_FORMAT_16BIT_565_RGB_2 2
	54	/* Outputs 00rrrrr000gggggg00bbbbb0 */
	55	# define DPI_FORMAT_16BIT_565_RGB_3 3
	56	/* Outputs 000000rrrrrrggggggbbbbbb */
	57	# define DPI_FORMAT_18BIT_666_RGB_1 4
	58	/* Outputs 00rrrrrr00gggggg00bbbbbb */
	59	# define DPI_FORMAT_18BIT_666_RGB_2 5
	60	/* Outputs rrrrrrrrggggggggbbbbbbbb */
	61	# define DPI_FORMAT_24BIT_888_RGB 6
	62
	63	/* Reverses the polarity of the corresponding signal */
	64	# define DPI_PIXEL_CLK_INVERT BIT(10)
	65	# define DPI_HSYNC_INVERT BIT(9)
	66	# define DPI_VSYNC_INVERT BIT(8)
	67	# define DPI_OUTPUT_ENABLE_INVERT BIT(7)
	68
	69	/* Outputs the signal the falling clock edge instead of rising. */
	70	# define DPI_HSYNC_NEGATE BIT(6)
	71	# define DPI_VSYNC_NEGATE BIT(5)
	72	# define DPI_OUTPUT_ENABLE_NEGATE BIT(4)
	73
	74	/* Disables the signal */
	75	# define DPI_HSYNC_DISABLE BIT(3)
	76	# define DPI_VSYNC_DISABLE BIT(2)
	77	# define DPI_OUTPUT_ENABLE_DISABLE BIT(1)
	78
	79	/* Power gate to the device, full reset at 0 -> 1 transition */
	80	# define DPI_ENABLE BIT(0)
	81
	82	/* All other registers besides DPI_C return the ID */
	83	#define DPI_ID 0x04
	84	# define DPI_ID_VALUE 0x00647069
	85
	86	/* General DPI hardware state. */
	87	struct vc4_dpi {
7c9a4bab	88	struct vc4_encoder encoder;
08302c35	89
7c9a4bab	90	struct platform_device *pdev;
08302c35 EA	91
	92	void __iomem *regs;
	93
	94	struct clk *pixel_clock;
	95	struct clk *core_clock;
3051719a EA	96
3051719a EA	97	struct debugfs_regset32 regset;
08302c35 EA	98	};
08302c35 EA	99
5a46e490 MR	100	#define to_vc4_dpi(_encoder) \
5a46e490 MR	101	container_of_const(_encoder, struct vc4_dpi, encoder.base)
08302c35	102
da43ff04 MR	103	#define DPI_READ(offset) \
	104	({ \
	105	kunit_fail_current_test("Accessing a register in a unit test!\n"); \
	106	readl(dpi->regs + (offset)); \
	107	})
	108
	109	#define DPI_WRITE(offset, val) \
	110	do { \
	111	kunit_fail_current_test("Accessing a register in a unit test!\n"); \
	112	writel(val, dpi->regs + (offset)); \
	113	} while (0)
7c9a4bab	114
3051719a EA	115	static const struct debugfs_reg32 dpi_regs[] = {
	116	VC4_REG32(DPI_C),
	117	VC4_REG32(DPI_ID),
08302c35 EA	118	};
08302c35 EA	119
08302c35 EA	120	static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
08302c35 EA	121	{
71b1bd4c	122	struct drm_device *dev = encoder->dev;
7c9a4bab	123	struct vc4_dpi *dpi = to_vc4_dpi(encoder);
71b1bd4c MR	124	int idx;
	125
	126	if (!drm_dev_enter(dev, &idx))
	127	return;
08302c35	128
08302c35	129	clk_disable_unprepare(dpi->pixel_clock);
71b1bd4c MR	130
71b1bd4c MR	131	drm_dev_exit(idx);
08302c35 EA	132	}
	133
	134	static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
	135	{
164c2416	136	struct drm_device *dev = encoder->dev;
08302c35	137	struct drm_display_mode *mode = &encoder->crtc->mode;
7c9a4bab	138	struct vc4_dpi *dpi = to_vc4_dpi(encoder);
164c2416 EA	139	struct drm_connector_list_iter conn_iter;
164c2416 EA	140	struct drm_connector connector = NULL, connector_scan;
7fea3c23	141	u32 dpi_c = DPI_ENABLE;
71b1bd4c	142	int idx;
08302c35 EA	143	int ret;
08302c35 EA	144
164c2416 EA	145	/* Look up the connector attached to DPI so we can get the
	146	* bus_format. Ideally the bridge would tell us the
	147	* bus_format we want, but it doesn't yet, so assume that it's
	148	* uniform throughout the bridge chain.
	149	*/
	150	drm_connector_list_iter_begin(dev, &conn_iter);
	151	drm_for_each_connector_iter(connector_scan, &conn_iter) {
	152	if (connector_scan->encoder == encoder) {
	153	connector = connector_scan;
	154	break;
	155	}
	156	}
	157	drm_connector_list_iter_end(&conn_iter);
	158
0c9a31b8 DS	159	/* Default to 18bit if no connector or format found. */
0c9a31b8 DS	160	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, DPI_FORMAT);
7a70b0b9	161
3c270763 DS	162	if (connector) {
	163	if (connector->display_info.num_bus_formats) {
	164	u32 bus_format = connector->display_info.bus_formats[0];
	165
7a70b0b9 DS	166	dpi_c &= ~DPI_FORMAT_MASK;
7a70b0b9 DS	167
3c270763 DS	168	switch (bus_format) {
	169	case MEDIA_BUS_FMT_RGB888_1X24:
	170	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
	171	DPI_FORMAT);
	172	break;
	173	case MEDIA_BUS_FMT_BGR888_1X24:
	174	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
	175	DPI_FORMAT);
	176	dpi_c \|= VC4_SET_FIELD(DPI_ORDER_BGR,
	177	DPI_ORDER);
	178	break;
465bf9b7 JQ	179	case MEDIA_BUS_FMT_BGR666_1X24_CPADHI:
	180	dpi_c \|= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
	181	fallthrough;
3c270763 DS	182	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
	183	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
	184	DPI_FORMAT);
	185	break;
465bf9b7 JQ	186	case MEDIA_BUS_FMT_BGR666_1X18:
	187	dpi_c \|= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
	188	fallthrough;
3c270763 DS	189	case MEDIA_BUS_FMT_RGB666_1X18:
	190	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
	191	DPI_FORMAT);
	192	break;
	193	case MEDIA_BUS_FMT_RGB565_1X16:
0870d86e	194	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_1,
3c270763 DS	195	DPI_FORMAT);
3c270763 DS	196	break;
11fb69c7 CM	197	case MEDIA_BUS_FMT_RGB565_1X24_CPADHI:
	198	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_2,
	199	DPI_FORMAT);
	200	break;
3c270763	201	default:
59ac702a SW	202	drm_err(dev, "Unknown media bus format %d\n",
59ac702a SW	203	bus_format);
3c270763 DS	204	break;
3c270763 DS	205	}
08302c35	206	}
3c270763 DS	207
	208	if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
	209	dpi_c \|= DPI_PIXEL_CLK_INVERT;
	210
	211	if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
	212	dpi_c \|= DPI_OUTPUT_ENABLE_INVERT;
08302c35 EA	213	}
08302c35 EA	214
7fea3c23 DS	215	if (mode->flags & DRM_MODE_FLAG_CSYNC) {
	216	if (mode->flags & DRM_MODE_FLAG_NCSYNC)
	217	dpi_c \|= DPI_OUTPUT_ENABLE_INVERT;
	218	} else {
	219	dpi_c \|= DPI_OUTPUT_ENABLE_MODE;
	220
	221	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
	222	dpi_c \|= DPI_HSYNC_INVERT;
	223	else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
	224	dpi_c \|= DPI_HSYNC_DISABLE;
08302c35	225
7fea3c23 DS	226	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
	227	dpi_c \|= DPI_VSYNC_INVERT;
	228	else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
	229	dpi_c \|= DPI_VSYNC_DISABLE;
	230	}
08302c35	231
71b1bd4c MR	232	if (!drm_dev_enter(dev, &idx))
	233	return;
	234
08302c35 EA	235	DPI_WRITE(DPI_C, dpi_c);
	236
	237	ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
	238	if (ret)
59ac702a	239	drm_err(dev, "Failed to set clock rate: %d\n", ret);
08302c35 EA	240
	241	ret = clk_prepare_enable(dpi->pixel_clock);
	242	if (ret)
59ac702a	243	drm_err(dev, "Failed to set clock rate: %d\n", ret);
71b1bd4c MR	244
71b1bd4c MR	245	drm_dev_exit(idx);
08302c35 EA	246	}
08302c35 EA	247
c50a115b JA	248	static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
c50a115b JA	249	const struct drm_display_mode *mode)
e2298350	250	{
c50a115b JA	251	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
c50a115b JA	252	return MODE_NO_INTERLACE;
e2298350	253
c50a115b	254	return MODE_OK;
e2298350 MK	255	}
e2298350 MK	256
08302c35 EA	257	static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
	258	.disable = vc4_dpi_encoder_disable,
	259	.enable = vc4_dpi_encoder_enable,
c50a115b	260	.mode_valid = vc4_dpi_encoder_mode_valid,
08302c35 EA	261	};
08302c35 EA	262
445b287e MR	263	static int vc4_dpi_late_register(struct drm_encoder *encoder)
	264	{
	265	struct drm_device *drm = encoder->dev;
	266	struct vc4_dpi *dpi = to_vc4_dpi(encoder);
445b287e	267
f2ede40e	268	vc4_debugfs_add_regset32(drm, "dpi_regs", &dpi->regset);
445b287e MR	269
	270	return 0;
	271	}
	272
	273	static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
	274	.late_register = vc4_dpi_late_register,
	275	};
	276
08302c35 EA	277	static const struct of_device_id vc4_dpi_dt_match[] = {
	278	{ .compatible = "brcm,bcm2835-dpi", .data = NULL },
	279	{}
	280	};
	281
7b1298e0 EA	282	/* Sets up the next link in the display chain, whether it's a panel or
7b1298e0 EA	283	* a bridge.
08302c35	284	*/
7b1298e0	285	static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
08302c35	286	{
055af023	287	struct drm_device *drm = dpi->encoder.base.dev;
7b1298e0	288	struct device *dev = &dpi->pdev->dev;
8f6b06c1	289	struct drm_bridge *bridge;
08302c35	290
055af023	291	bridge = drmm_of_get_bridge(drm, dev->of_node, 0, 0);
0caddbbf	292	if (IS_ERR(bridge)) {
7b1298e0 EA	293	/* If nothing was connected in the DT, that's not an
	294	* error.
	295	*/
0caddbbf	296	if (PTR_ERR(bridge) == -ENODEV)
7b1298e0 EA	297	return 0;
7b1298e0 EA	298	else
0caddbbf	299	return PTR_ERR(bridge);
7b1298e0	300	}
08302c35	301
7c9a4bab	302	return drm_bridge_attach(&dpi->encoder.base, bridge, NULL, 0);
08302c35 EA	303	}
08302c35 EA	304
77932adf MR	305	static void vc4_dpi_disable_clock(void *ptr)
	306	{
	307	struct vc4_dpi *dpi = ptr;
	308
	309	clk_disable_unprepare(dpi->core_clock);
	310	}
	311
08302c35 EA	312	static int vc4_dpi_bind(struct device dev, struct device master, void *data)
	313	{
	314	struct platform_device *pdev = to_platform_device(dev);
	315	struct drm_device *drm = dev_get_drvdata(master);
08302c35	316	struct vc4_dpi *dpi;
08302c35 EA	317	int ret;
08302c35 EA	318
7f0ba8f9	319	dpi = drmm_kzalloc(drm, sizeof(*dpi), GFP_KERNEL);
08302c35 EA	320	if (!dpi)
08302c35 EA	321	return -ENOMEM;
7f0ba8f9	322
7c9a4bab	323	dpi->encoder.type = VC4_ENCODER_TYPE_DPI;
08302c35 EA	324	dpi->pdev = pdev;
	325	dpi->regs = vc4_ioremap_regs(pdev, 0);
	326	if (IS_ERR(dpi->regs))
	327	return PTR_ERR(dpi->regs);
3051719a EA	328	dpi->regset.base = dpi->regs;
	329	dpi->regset.regs = dpi_regs;
	330	dpi->regset.nregs = ARRAY_SIZE(dpi_regs);
08302c35	331
08302c35 EA	332	if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
	333	dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
	334	DPI_READ(DPI_ID), DPI_ID_VALUE);
	335	return -ENODEV;
	336	}
	337
	338	dpi->core_clock = devm_clk_get(dev, "core");
	339	if (IS_ERR(dpi->core_clock)) {
	340	ret = PTR_ERR(dpi->core_clock);
	341	if (ret != -EPROBE_DEFER)
59ac702a	342	drm_err(drm, "Failed to get core clock: %d\n", ret);
08302c35 EA	343	return ret;
08302c35 EA	344	}
ff5b18ce	345
08302c35 EA	346	dpi->pixel_clock = devm_clk_get(dev, "pixel");
	347	if (IS_ERR(dpi->pixel_clock)) {
	348	ret = PTR_ERR(dpi->pixel_clock);
	349	if (ret != -EPROBE_DEFER)
59ac702a	350	drm_err(drm, "Failed to get pixel clock: %d\n", ret);
08302c35 EA	351	return ret;
	352	}
	353
	354	ret = clk_prepare_enable(dpi->core_clock);
ff5b18ce	355	if (ret) {
59ac702a	356	drm_err(drm, "Failed to turn on core clock: %d\n", ret);
ff5b18ce MR	357	return ret;
ff5b18ce MR	358	}
08302c35	359
77932adf MR	360	ret = devm_add_action_or_reset(dev, vc4_dpi_disable_clock, dpi);
	361	if (ret)
	362	return ret;
	363
e126d318	364	ret = drmm_encoder_init(drm, &dpi->encoder.base,
445b287e	365	&vc4_dpi_encoder_funcs,
e126d318 MR	366	DRM_MODE_ENCODER_DPI,
	367	NULL);
	368	if (ret)
	369	return ret;
	370
7c9a4bab	371	drm_encoder_helper_add(&dpi->encoder.base, &vc4_dpi_encoder_helper_funcs);
08302c35	372
7b1298e0 EA	373	ret = vc4_dpi_init_bridge(dpi);
7b1298e0 EA	374	if (ret)
e126d318	375	return ret;
08302c35 EA	376
	377	dev_set_drvdata(dev, dpi);
	378
08302c35	379	return 0;
08302c35 EA	380	}
	381
	382	static const struct component_ops vc4_dpi_ops = {
	383	.bind = vc4_dpi_bind,
08302c35 EA	384	};
	385
	386	static int vc4_dpi_dev_probe(struct platform_device *pdev)
	387	{
	388	return component_add(&pdev->dev, &vc4_dpi_ops);
	389	}
	390
1ed54a19	391	static void vc4_dpi_dev_remove(struct platform_device *pdev)
08302c35 EA	392	{
08302c35 EA	393	component_del(&pdev->dev, &vc4_dpi_ops);
08302c35 EA	394	}
	395
	396	struct platform_driver vc4_dpi_driver = {
	397	.probe = vc4_dpi_dev_probe,
1ed54a19	398	.remove_new = vc4_dpi_dev_remove,
08302c35 EA	399	.driver = {
	400	.name = "vc4_dpi",
	401	.of_match_table = vc4_dpi_dt_match,
	402	},
	403	};