[linux-2.6-block.git] / drivers / gpu / drm / vc4 / vc4_dpi.c

/*
 * Copyright (C) 2016 Broadcom Limited
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published by
 * the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License along with
 * this program.  If not, see <http://www.gnu.org/licenses/>.
 */

/**
 * DOC: VC4 DPI module
 *
 * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
 * signals.  On BCM2835, these can be routed out to GPIO0-27 with the
 * ALT2 function.
 */

#include <drm/drm_atomic_helper.h>
#include <drm/drm_bridge.h>
#include <drm/drm_crtc_helper.h>
#include <drm/drm_edid.h>
#include <drm/drm_of.h>
#include <drm/drm_panel.h>
#include <linux/clk.h>
#include <linux/component.h>
#include <linux/of_graph.h>
#include <linux/of_platform.h>
#include "vc4_drv.h"
#include "vc4_regs.h"

#define DPI_C			0x00
# define DPI_OUTPUT_ENABLE_MODE		BIT(16)

/* The order field takes the incoming 24 bit RGB from the pixel valve
 * and shuffles the 3 channels.
 */
# define DPI_ORDER_MASK			VC4_MASK(15, 14)
# define DPI_ORDER_SHIFT		14
# define DPI_ORDER_RGB			0
# define DPI_ORDER_BGR			1
# define DPI_ORDER_GRB			2
# define DPI_ORDER_BRG			3

/* The format field takes the ORDER-shuffled pixel valve data and
 * formats it onto the output lines.
 */
# define DPI_FORMAT_MASK		VC4_MASK(13, 11)
# define DPI_FORMAT_SHIFT		11
/* This define is named in the hardware, but actually just outputs 0. */
# define DPI_FORMAT_9BIT_666_RGB	0
/* Outputs 00000000rrrrrggggggbbbbb */
# define DPI_FORMAT_16BIT_565_RGB_1	1
/* Outputs 000rrrrr00gggggg000bbbbb */
# define DPI_FORMAT_16BIT_565_RGB_2	2
/* Outputs 00rrrrr000gggggg00bbbbb0 */
# define DPI_FORMAT_16BIT_565_RGB_3	3
/* Outputs 000000rrrrrrggggggbbbbbb */
# define DPI_FORMAT_18BIT_666_RGB_1	4
/* Outputs 00rrrrrr00gggggg00bbbbbb */
# define DPI_FORMAT_18BIT_666_RGB_2	5
/* Outputs rrrrrrrrggggggggbbbbbbbb */
# define DPI_FORMAT_24BIT_888_RGB	6

/* Reverses the polarity of the corresponding signal */
# define DPI_PIXEL_CLK_INVERT		BIT(10)
# define DPI_HSYNC_INVERT		BIT(9)
# define DPI_VSYNC_INVERT		BIT(8)
# define DPI_OUTPUT_ENABLE_INVERT	BIT(7)

/* Outputs the signal the falling clock edge instead of rising. */
# define DPI_HSYNC_NEGATE		BIT(6)
# define DPI_VSYNC_NEGATE		BIT(5)
# define DPI_OUTPUT_ENABLE_NEGATE	BIT(4)

/* Disables the signal */
# define DPI_HSYNC_DISABLE		BIT(3)
# define DPI_VSYNC_DISABLE		BIT(2)
# define DPI_OUTPUT_ENABLE_DISABLE	BIT(1)

/* Power gate to the device, full reset at 0 -> 1 transition */
# define DPI_ENABLE			BIT(0)

/* All other registers besides DPI_C return the ID */
#define DPI_ID			0x04
# define DPI_ID_VALUE		0x00647069

/* General DPI hardware state. */
struct vc4_dpi {
	struct platform_device *pdev;

	struct drm_encoder *encoder;

	void __iomem *regs;

	struct clk *pixel_clock;
	struct clk *core_clock;
};

#define DPI_READ(offset) readl(dpi->regs + (offset))
#define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))

/* VC4 DPI encoder KMS struct */
struct vc4_dpi_encoder {
	struct vc4_encoder base;
	struct vc4_dpi *dpi;
};

static inline struct vc4_dpi_encoder *
to_vc4_dpi_encoder(struct drm_encoder *encoder)
{
	return container_of(encoder, struct vc4_dpi_encoder, base.base);
}

#define DPI_REG(reg) { reg, #reg }
static const struct {
	u32 reg;
	const char *name;
} dpi_regs[] = {
	DPI_REG(DPI_C),
	DPI_REG(DPI_ID),
};

#ifdef CONFIG_DEBUG_FS
int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused)
{
	struct drm_info_node *node = (struct drm_info_node *)m->private;
	struct drm_device *dev = node->minor->dev;
	struct vc4_dev *vc4 = to_vc4_dev(dev);
	struct vc4_dpi *dpi = vc4->dpi;
	int i;

	if (!dpi)
		return 0;

	for (i = 0; i < ARRAY_SIZE(dpi_regs); i++) {
		seq_printf(m, "%s (0x%04x): 0x%08x\n",
			   dpi_regs[i].name, dpi_regs[i].reg,
			   DPI_READ(dpi_regs[i].reg));
	}

	return 0;
}
#endif

static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
	.destroy = drm_encoder_cleanup,
};

static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
{
	struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
	struct vc4_dpi *dpi = vc4_encoder->dpi;

	clk_disable_unprepare(dpi->pixel_clock);
}

static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
{
	struct drm_device *dev = encoder->dev;
	struct drm_display_mode *mode = &encoder->crtc->mode;
	struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
	struct vc4_dpi *dpi = vc4_encoder->dpi;
	struct drm_connector_list_iter conn_iter;
	struct drm_connector *connector = NULL, *connector_scan;
	u32 dpi_c = DPI_ENABLE | DPI_OUTPUT_ENABLE_MODE;
	int ret;

	/* Look up the connector attached to DPI so we can get the
	 * bus_format.  Ideally the bridge would tell us the
	 * bus_format we want, but it doesn't yet, so assume that it's
	 * uniform throughout the bridge chain.
	 */
	drm_connector_list_iter_begin(dev, &conn_iter);
	drm_for_each_connector_iter(connector_scan, &conn_iter) {
		if (connector_scan->encoder == encoder) {
			connector = connector_scan;
			break;
		}
	}
	drm_connector_list_iter_end(&conn_iter);

	if (connector && connector->display_info.num_bus_formats) {
		u32 bus_format = connector->display_info.bus_formats[0];

		switch (bus_format) {
		case MEDIA_BUS_FMT_RGB888_1X24:
			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
					       DPI_FORMAT);
			break;
		case MEDIA_BUS_FMT_BGR888_1X24:
			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
					       DPI_FORMAT);
			dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
			break;
		case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
					       DPI_FORMAT);
			break;
		case MEDIA_BUS_FMT_RGB666_1X18:
			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
					       DPI_FORMAT);
			break;
		case MEDIA_BUS_FMT_RGB565_1X16:
			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3,
					       DPI_FORMAT);
			break;
		default:
			DRM_ERROR("Unknown media bus format %d\n", bus_format);
			break;
		}
	} else {
		/* Default to 24bit if no connector found. */
		dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, DPI_FORMAT);
	}

	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
		dpi_c |= DPI_HSYNC_INVERT;
	else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
		dpi_c |= DPI_HSYNC_DISABLE;

	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
		dpi_c |= DPI_VSYNC_INVERT;
	else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
		dpi_c |= DPI_VSYNC_DISABLE;

	DPI_WRITE(DPI_C, dpi_c);

	ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
	if (ret)
		DRM_ERROR("Failed to set clock rate: %d\n", ret);

	ret = clk_prepare_enable(dpi->pixel_clock);
	if (ret)
		DRM_ERROR("Failed to set clock rate: %d\n", ret);
}

static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
						       const struct drm_display_mode *mode)
{
	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
		return MODE_NO_INTERLACE;

	return MODE_OK;
}

static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
	.disable = vc4_dpi_encoder_disable,
	.enable = vc4_dpi_encoder_enable,
	.mode_valid = vc4_dpi_encoder_mode_valid,
};

static const struct of_device_id vc4_dpi_dt_match[] = {
	{ .compatible = "brcm,bcm2835-dpi", .data = NULL },
	{}
};

/* Sets up the next link in the display chain, whether it's a panel or
 * a bridge.
 */
static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
{
	struct device *dev = &dpi->pdev->dev;
	struct drm_panel *panel;
	struct drm_bridge *bridge;
	int ret;

	ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
					  &panel, &bridge);
	if (ret) {
		/* If nothing was connected in the DT, that's not an
		 * error.
		 */
		if (ret == -ENODEV)
			return 0;
		else
			return ret;
	}

	if (panel)
		bridge = drm_panel_bridge_add(panel, DRM_MODE_CONNECTOR_DPI);

	return drm_bridge_attach(dpi->encoder, bridge, NULL);
}

static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct drm_device *drm = dev_get_drvdata(master);
	struct vc4_dev *vc4 = to_vc4_dev(drm);
	struct vc4_dpi *dpi;
	struct vc4_dpi_encoder *vc4_dpi_encoder;
	int ret;

	dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
	if (!dpi)
		return -ENOMEM;

	vc4_dpi_encoder = devm_kzalloc(dev, sizeof(*vc4_dpi_encoder),
				       GFP_KERNEL);
	if (!vc4_dpi_encoder)
		return -ENOMEM;
	vc4_dpi_encoder->base.type = VC4_ENCODER_TYPE_DPI;
	vc4_dpi_encoder->dpi = dpi;
	dpi->encoder = &vc4_dpi_encoder->base.base;

	dpi->pdev = pdev;
	dpi->regs = vc4_ioremap_regs(pdev, 0);
	if (IS_ERR(dpi->regs))
		return PTR_ERR(dpi->regs);

	if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
		dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
			DPI_READ(DPI_ID), DPI_ID_VALUE);
		return -ENODEV;
	}

	dpi->core_clock = devm_clk_get(dev, "core");
	if (IS_ERR(dpi->core_clock)) {
		ret = PTR_ERR(dpi->core_clock);
		if (ret != -EPROBE_DEFER)
			DRM_ERROR("Failed to get core clock: %d\n", ret);
		return ret;
	}
	dpi->pixel_clock = devm_clk_get(dev, "pixel");
	if (IS_ERR(dpi->pixel_clock)) {
		ret = PTR_ERR(dpi->pixel_clock);
		if (ret != -EPROBE_DEFER)
			DRM_ERROR("Failed to get pixel clock: %d\n", ret);
		return ret;
	}

	ret = clk_prepare_enable(dpi->core_clock);
	if (ret)
		DRM_ERROR("Failed to turn on core clock: %d\n", ret);

	drm_encoder_init(drm, dpi->encoder, &vc4_dpi_encoder_funcs,
			 DRM_MODE_ENCODER_DPI, NULL);
	drm_encoder_helper_add(dpi->encoder, &vc4_dpi_encoder_helper_funcs);

	ret = vc4_dpi_init_bridge(dpi);
	if (ret)
		goto err_destroy_encoder;

	dev_set_drvdata(dev, dpi);

	vc4->dpi = dpi;

	return 0;

err_destroy_encoder:
	drm_encoder_cleanup(dpi->encoder);
	clk_disable_unprepare(dpi->core_clock);
	return ret;
}

static void vc4_dpi_unbind(struct device *dev, struct device *master,
			   void *data)
{
	struct drm_device *drm = dev_get_drvdata(master);
	struct vc4_dev *vc4 = to_vc4_dev(drm);
	struct vc4_dpi *dpi = dev_get_drvdata(dev);

	drm_of_panel_bridge_remove(dev->of_node, 0, 0);

	drm_encoder_cleanup(dpi->encoder);

	clk_disable_unprepare(dpi->core_clock);

	vc4->dpi = NULL;
}

static const struct component_ops vc4_dpi_ops = {
	.bind   = vc4_dpi_bind,
	.unbind = vc4_dpi_unbind,
};

static int vc4_dpi_dev_probe(struct platform_device *pdev)
{
	return component_add(&pdev->dev, &vc4_dpi_ops);
}

static int vc4_dpi_dev_remove(struct platform_device *pdev)
{
	component_del(&pdev->dev, &vc4_dpi_ops);
	return 0;
}

struct platform_driver vc4_dpi_driver = {
	.probe = vc4_dpi_dev_probe,
	.remove = vc4_dpi_dev_remove,
	.driver = {
		.name = "vc4_dpi",
		.of_match_table = vc4_dpi_dt_match,
	},
};
Commit	Line	Data
08302c35 EA	1	/*
	2	* Copyright (C) 2016 Broadcom Limited
	3	*
	4	* This program is free software; you can redistribute it and/or modify it
	5	* under the terms of the GNU General Public License version 2 as published by
	6	* the Free Software Foundation.
	7	*
	8	* This program is distributed in the hope that it will be useful, but WITHOUT
	9	* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
	10	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
	11	* more details.
	12	*
	13	* You should have received a copy of the GNU General Public License along with
	14	* this program. If not, see <http://www.gnu.org/licenses/>.
	15	*/
	16
	17	/**
	18	* DOC: VC4 DPI module
	19	*
	20	* The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
f6c01530 EA	21	* signals. On BCM2835, these can be routed out to GPIO0-27 with the
f6c01530 EA	22	* ALT2 function.
08302c35 EA	23	*/
08302c35 EA	24
b7e8e25b	25	#include <drm/drm_atomic_helper.h>
7b1298e0	26	#include <drm/drm_bridge.h>
b7e8e25b MY	27	#include <drm/drm_crtc_helper.h>
b7e8e25b MY	28	#include <drm/drm_edid.h>
7b1298e0	29	#include <drm/drm_of.h>
b7e8e25b MY	30	#include <drm/drm_panel.h>
	31	#include <linux/clk.h>
	32	#include <linux/component.h>
	33	#include <linux/of_graph.h>
	34	#include <linux/of_platform.h>
08302c35 EA	35	#include "vc4_drv.h"
	36	#include "vc4_regs.h"
	37
	38	#define DPI_C 0x00
	39	# define DPI_OUTPUT_ENABLE_MODE BIT(16)
	40
	41	/* The order field takes the incoming 24 bit RGB from the pixel valve
	42	* and shuffles the 3 channels.
	43	*/
	44	# define DPI_ORDER_MASK VC4_MASK(15, 14)
	45	# define DPI_ORDER_SHIFT 14
	46	# define DPI_ORDER_RGB 0
	47	# define DPI_ORDER_BGR 1
	48	# define DPI_ORDER_GRB 2
	49	# define DPI_ORDER_BRG 3
	50
	51	/* The format field takes the ORDER-shuffled pixel valve data and
	52	* formats it onto the output lines.
	53	*/
	54	# define DPI_FORMAT_MASK VC4_MASK(13, 11)
	55	# define DPI_FORMAT_SHIFT 11
	56	/* This define is named in the hardware, but actually just outputs 0. */
	57	# define DPI_FORMAT_9BIT_666_RGB 0
	58	/* Outputs 00000000rrrrrggggggbbbbb */
	59	# define DPI_FORMAT_16BIT_565_RGB_1 1
	60	/* Outputs 000rrrrr00gggggg000bbbbb */
	61	# define DPI_FORMAT_16BIT_565_RGB_2 2
	62	/* Outputs 00rrrrr000gggggg00bbbbb0 */
	63	# define DPI_FORMAT_16BIT_565_RGB_3 3
	64	/* Outputs 000000rrrrrrggggggbbbbbb */
	65	# define DPI_FORMAT_18BIT_666_RGB_1 4
	66	/* Outputs 00rrrrrr00gggggg00bbbbbb */
	67	# define DPI_FORMAT_18BIT_666_RGB_2 5
	68	/* Outputs rrrrrrrrggggggggbbbbbbbb */
	69	# define DPI_FORMAT_24BIT_888_RGB 6
	70
	71	/* Reverses the polarity of the corresponding signal */
	72	# define DPI_PIXEL_CLK_INVERT BIT(10)
	73	# define DPI_HSYNC_INVERT BIT(9)
	74	# define DPI_VSYNC_INVERT BIT(8)
	75	# define DPI_OUTPUT_ENABLE_INVERT BIT(7)
	76
	77	/* Outputs the signal the falling clock edge instead of rising. */
	78	# define DPI_HSYNC_NEGATE BIT(6)
	79	# define DPI_VSYNC_NEGATE BIT(5)
	80	# define DPI_OUTPUT_ENABLE_NEGATE BIT(4)
	81
	82	/* Disables the signal */
	83	# define DPI_HSYNC_DISABLE BIT(3)
	84	# define DPI_VSYNC_DISABLE BIT(2)
	85	# define DPI_OUTPUT_ENABLE_DISABLE BIT(1)
	86
	87	/* Power gate to the device, full reset at 0 -> 1 transition */
	88	# define DPI_ENABLE BIT(0)
	89
	90	/* All other registers besides DPI_C return the ID */
	91	#define DPI_ID 0x04
	92	# define DPI_ID_VALUE 0x00647069
	93
	94	/* General DPI hardware state. */
	95	struct vc4_dpi {
	96	struct platform_device *pdev;
	97
	98	struct drm_encoder *encoder;
08302c35 EA	99
	100	void __iomem *regs;
	101
	102	struct clk *pixel_clock;
	103	struct clk *core_clock;
	104	};
	105
	106	#define DPI_READ(offset) readl(dpi->regs + (offset))
	107	#define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))
	108
	109	/* VC4 DPI encoder KMS struct */
	110	struct vc4_dpi_encoder {
	111	struct vc4_encoder base;
	112	struct vc4_dpi *dpi;
	113	};
	114
	115	static inline struct vc4_dpi_encoder *
	116	to_vc4_dpi_encoder(struct drm_encoder *encoder)
	117	{
	118	return container_of(encoder, struct vc4_dpi_encoder, base.base);
	119	}
	120
08302c35 EA	121	#define DPI_REG(reg) { reg, #reg }
	122	static const struct {
	123	u32 reg;
	124	const char *name;
	125	} dpi_regs[] = {
	126	DPI_REG(DPI_C),
	127	DPI_REG(DPI_ID),
	128	};
	129
08302c35 EA	130	#ifdef CONFIG_DEBUG_FS
	131	int vc4_dpi_debugfs_regs(struct seq_file m, void unused)
	132	{
	133	struct drm_info_node node = (struct drm_info_node )m->private;
	134	struct drm_device *dev = node->minor->dev;
	135	struct vc4_dev *vc4 = to_vc4_dev(dev);
	136	struct vc4_dpi *dpi = vc4->dpi;
	137	int i;
	138
	139	if (!dpi)
	140	return 0;
	141
	142	for (i = 0; i < ARRAY_SIZE(dpi_regs); i++) {
	143	seq_printf(m, "%s (0x%04x): 0x%08x\n",
	144	dpi_regs[i].name, dpi_regs[i].reg,
	145	DPI_READ(dpi_regs[i].reg));
	146	}
	147
	148	return 0;
	149	}
	150	#endif
	151
08302c35 EA	152	static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
	153	.destroy = drm_encoder_cleanup,
	154	};
	155
	156	static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
	157	{
	158	struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
	159	struct vc4_dpi *dpi = vc4_encoder->dpi;
	160
08302c35	161	clk_disable_unprepare(dpi->pixel_clock);
08302c35 EA	162	}
	163
	164	static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
	165	{
164c2416	166	struct drm_device *dev = encoder->dev;
08302c35 EA	167	struct drm_display_mode *mode = &encoder->crtc->mode;
	168	struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
	169	struct vc4_dpi *dpi = vc4_encoder->dpi;
164c2416 EA	170	struct drm_connector_list_iter conn_iter;
164c2416 EA	171	struct drm_connector connector = NULL, connector_scan;
08302c35 EA	172	u32 dpi_c = DPI_ENABLE \| DPI_OUTPUT_ENABLE_MODE;
	173	int ret;
	174
164c2416 EA	175	/* Look up the connector attached to DPI so we can get the
	176	* bus_format. Ideally the bridge would tell us the
	177	* bus_format we want, but it doesn't yet, so assume that it's
	178	* uniform throughout the bridge chain.
	179	*/
	180	drm_connector_list_iter_begin(dev, &conn_iter);
	181	drm_for_each_connector_iter(connector_scan, &conn_iter) {
	182	if (connector_scan->encoder == encoder) {
	183	connector = connector_scan;
	184	break;
	185	}
	186	}
	187	drm_connector_list_iter_end(&conn_iter);
	188
	189	if (connector && connector->display_info.num_bus_formats) {
	190	u32 bus_format = connector->display_info.bus_formats[0];
08302c35 EA	191
	192	switch (bus_format) {
	193	case MEDIA_BUS_FMT_RGB888_1X24:
	194	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
	195	DPI_FORMAT);
	196	break;
	197	case MEDIA_BUS_FMT_BGR888_1X24:
	198	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
	199	DPI_FORMAT);
	200	dpi_c \|= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
	201	break;
	202	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
	203	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
	204	DPI_FORMAT);
	205	break;
	206	case MEDIA_BUS_FMT_RGB666_1X18:
	207	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
	208	DPI_FORMAT);
	209	break;
	210	case MEDIA_BUS_FMT_RGB565_1X16:
	211	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3,
	212	DPI_FORMAT);
	213	break;
	214	default:
	215	DRM_ERROR("Unknown media bus format %d\n", bus_format);
	216	break;
	217	}
164c2416 EA	218	} else {
	219	/* Default to 24bit if no connector found. */
	220	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, DPI_FORMAT);
08302c35 EA	221	}
	222
	223	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
	224	dpi_c \|= DPI_HSYNC_INVERT;
	225	else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
	226	dpi_c \|= DPI_HSYNC_DISABLE;
	227
	228	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
	229	dpi_c \|= DPI_VSYNC_INVERT;
	230	else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
	231	dpi_c \|= DPI_VSYNC_DISABLE;
	232
	233	DPI_WRITE(DPI_C, dpi_c);
	234
	235	ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
	236	if (ret)
	237	DRM_ERROR("Failed to set clock rate: %d\n", ret);
	238
	239	ret = clk_prepare_enable(dpi->pixel_clock);
	240	if (ret)
	241	DRM_ERROR("Failed to set clock rate: %d\n", ret);
08302c35 EA	242	}
08302c35 EA	243
c50a115b JA	244	static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
c50a115b JA	245	const struct drm_display_mode *mode)
e2298350	246	{
c50a115b JA	247	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
c50a115b JA	248	return MODE_NO_INTERLACE;
e2298350	249
c50a115b	250	return MODE_OK;
e2298350 MK	251	}
e2298350 MK	252
08302c35 EA	253	static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
	254	.disable = vc4_dpi_encoder_disable,
	255	.enable = vc4_dpi_encoder_enable,
c50a115b	256	.mode_valid = vc4_dpi_encoder_mode_valid,
08302c35 EA	257	};
	258
	259	static const struct of_device_id vc4_dpi_dt_match[] = {
	260	{ .compatible = "brcm,bcm2835-dpi", .data = NULL },
	261	{}
	262	};
	263
7b1298e0 EA	264	/* Sets up the next link in the display chain, whether it's a panel or
7b1298e0 EA	265	* a bridge.
08302c35	266	*/
7b1298e0	267	static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
08302c35	268	{
7b1298e0	269	struct device *dev = &dpi->pdev->dev;
08302c35	270	struct drm_panel *panel;
8f6b06c1	271	struct drm_bridge *bridge;
7b1298e0	272	int ret;
08302c35	273
7b1298e0	274	ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
8f6b06c1	275	&panel, &bridge);
7b1298e0 EA	276	if (ret) {
	277	/* If nothing was connected in the DT, that's not an
	278	* error.
	279	*/
	280	if (ret == -ENODEV)
	281	return 0;
	282	else
	283	return ret;
	284	}
08302c35	285
8f6b06c1	286	if (panel)
8f6b06c1	287	bridge = drm_panel_bridge_add(panel, DRM_MODE_CONNECTOR_DPI);
08302c35	288
8f6b06c1	289	return drm_bridge_attach(dpi->encoder, bridge, NULL);
08302c35 EA	290	}
	291
	292	static int vc4_dpi_bind(struct device dev, struct device master, void *data)
	293	{
	294	struct platform_device *pdev = to_platform_device(dev);
	295	struct drm_device *drm = dev_get_drvdata(master);
	296	struct vc4_dev *vc4 = to_vc4_dev(drm);
	297	struct vc4_dpi *dpi;
	298	struct vc4_dpi_encoder *vc4_dpi_encoder;
	299	int ret;
	300
	301	dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
	302	if (!dpi)
	303	return -ENOMEM;
	304
	305	vc4_dpi_encoder = devm_kzalloc(dev, sizeof(*vc4_dpi_encoder),
	306	GFP_KERNEL);
	307	if (!vc4_dpi_encoder)
	308	return -ENOMEM;
	309	vc4_dpi_encoder->base.type = VC4_ENCODER_TYPE_DPI;
	310	vc4_dpi_encoder->dpi = dpi;
	311	dpi->encoder = &vc4_dpi_encoder->base.base;
	312
	313	dpi->pdev = pdev;
	314	dpi->regs = vc4_ioremap_regs(pdev, 0);
	315	if (IS_ERR(dpi->regs))
	316	return PTR_ERR(dpi->regs);
	317
08302c35 EA	318	if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
	319	dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
	320	DPI_READ(DPI_ID), DPI_ID_VALUE);
	321	return -ENODEV;
	322	}
	323
	324	dpi->core_clock = devm_clk_get(dev, "core");
	325	if (IS_ERR(dpi->core_clock)) {
	326	ret = PTR_ERR(dpi->core_clock);
	327	if (ret != -EPROBE_DEFER)
	328	DRM_ERROR("Failed to get core clock: %d\n", ret);
	329	return ret;
	330	}
	331	dpi->pixel_clock = devm_clk_get(dev, "pixel");
	332	if (IS_ERR(dpi->pixel_clock)) {
	333	ret = PTR_ERR(dpi->pixel_clock);
	334	if (ret != -EPROBE_DEFER)
	335	DRM_ERROR("Failed to get pixel clock: %d\n", ret);
	336	return ret;
	337	}
	338
	339	ret = clk_prepare_enable(dpi->core_clock);
	340	if (ret)
	341	DRM_ERROR("Failed to turn on core clock: %d\n", ret);
	342
08302c35 EA	343	drm_encoder_init(drm, dpi->encoder, &vc4_dpi_encoder_funcs,
	344	DRM_MODE_ENCODER_DPI, NULL);
	345	drm_encoder_helper_add(dpi->encoder, &vc4_dpi_encoder_helper_funcs);
	346
7b1298e0 EA	347	ret = vc4_dpi_init_bridge(dpi);
7b1298e0 EA	348	if (ret)
08302c35	349	goto err_destroy_encoder;
08302c35 EA	350
	351	dev_set_drvdata(dev, dpi);
	352
	353	vc4->dpi = dpi;
	354
	355	return 0;
	356
	357	err_destroy_encoder:
	358	drm_encoder_cleanup(dpi->encoder);
	359	clk_disable_unprepare(dpi->core_clock);
	360	return ret;
	361	}
	362
	363	static void vc4_dpi_unbind(struct device dev, struct device master,
	364	void *data)
	365	{
	366	struct drm_device *drm = dev_get_drvdata(master);
	367	struct vc4_dev *vc4 = to_vc4_dev(drm);
	368	struct vc4_dpi *dpi = dev_get_drvdata(dev);
	369
8f6b06c1	370	drm_of_panel_bridge_remove(dev->of_node, 0, 0);
08302c35	371
08302c35 EA	372	drm_encoder_cleanup(dpi->encoder);
	373
	374	clk_disable_unprepare(dpi->core_clock);
	375
	376	vc4->dpi = NULL;
	377	}
	378
	379	static const struct component_ops vc4_dpi_ops = {
	380	.bind = vc4_dpi_bind,
	381	.unbind = vc4_dpi_unbind,
	382	};
	383
	384	static int vc4_dpi_dev_probe(struct platform_device *pdev)
	385	{
	386	return component_add(&pdev->dev, &vc4_dpi_ops);
	387	}
	388
	389	static int vc4_dpi_dev_remove(struct platform_device *pdev)
	390	{
	391	component_del(&pdev->dev, &vc4_dpi_ops);
	392	return 0;
	393	}
	394
	395	struct platform_driver vc4_dpi_driver = {
	396	.probe = vc4_dpi_dev_probe,
	397	.remove = vc4_dpi_dev_remove,
	398	.driver = {
	399	.name = "vc4_dpi",
	400	.of_match_table = vc4_dpi_dt_match,
	401	},
	402	};