[linux-2.6-block.git] / drivers / gpu / drm / vc4 / vc4_dpi.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2016 Broadcom Limited
 */

/**
 * DOC: VC4 DPI module
 *
 * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
 * signals.  On BCM2835, these can be routed out to GPIO0-27 with the
 * ALT2 function.
 */

#include <drm/drm_atomic_helper.h>
#include <drm/drm_bridge.h>
#include <drm/drm_edid.h>
#include <drm/drm_of.h>
#include <drm/drm_panel.h>
#include <drm/drm_probe_helper.h>
#include <drm/drm_simple_kms_helper.h>
#include <linux/clk.h>
#include <linux/component.h>
#include <linux/of_graph.h>
#include <linux/of_platform.h>
#include "vc4_drv.h"
#include "vc4_regs.h"

#define DPI_C			0x00
# define DPI_OUTPUT_ENABLE_MODE		BIT(16)

/* The order field takes the incoming 24 bit RGB from the pixel valve
 * and shuffles the 3 channels.
 */
# define DPI_ORDER_MASK			VC4_MASK(15, 14)
# define DPI_ORDER_SHIFT		14
# define DPI_ORDER_RGB			0
# define DPI_ORDER_BGR			1
# define DPI_ORDER_GRB			2
# define DPI_ORDER_BRG			3

/* The format field takes the ORDER-shuffled pixel valve data and
 * formats it onto the output lines.
 */
# define DPI_FORMAT_MASK		VC4_MASK(13, 11)
# define DPI_FORMAT_SHIFT		11
/* This define is named in the hardware, but actually just outputs 0. */
# define DPI_FORMAT_9BIT_666_RGB	0
/* Outputs 00000000rrrrrggggggbbbbb */
# define DPI_FORMAT_16BIT_565_RGB_1	1
/* Outputs 000rrrrr00gggggg000bbbbb */
# define DPI_FORMAT_16BIT_565_RGB_2	2
/* Outputs 00rrrrr000gggggg00bbbbb0 */
# define DPI_FORMAT_16BIT_565_RGB_3	3
/* Outputs 000000rrrrrrggggggbbbbbb */
# define DPI_FORMAT_18BIT_666_RGB_1	4
/* Outputs 00rrrrrr00gggggg00bbbbbb */
# define DPI_FORMAT_18BIT_666_RGB_2	5
/* Outputs rrrrrrrrggggggggbbbbbbbb */
# define DPI_FORMAT_24BIT_888_RGB	6

/* Reverses the polarity of the corresponding signal */
# define DPI_PIXEL_CLK_INVERT		BIT(10)
# define DPI_HSYNC_INVERT		BIT(9)
# define DPI_VSYNC_INVERT		BIT(8)
# define DPI_OUTPUT_ENABLE_INVERT	BIT(7)

/* Outputs the signal the falling clock edge instead of rising. */
# define DPI_HSYNC_NEGATE		BIT(6)
# define DPI_VSYNC_NEGATE		BIT(5)
# define DPI_OUTPUT_ENABLE_NEGATE	BIT(4)

/* Disables the signal */
# define DPI_HSYNC_DISABLE		BIT(3)
# define DPI_VSYNC_DISABLE		BIT(2)
# define DPI_OUTPUT_ENABLE_DISABLE	BIT(1)

/* Power gate to the device, full reset at 0 -> 1 transition */
# define DPI_ENABLE			BIT(0)

/* All other registers besides DPI_C return the ID */
#define DPI_ID			0x04
# define DPI_ID_VALUE		0x00647069

/* General DPI hardware state. */
struct vc4_dpi {
	struct platform_device *pdev;

	struct drm_encoder *encoder;

	void __iomem *regs;

	struct clk *pixel_clock;
	struct clk *core_clock;

	struct debugfs_regset32 regset;
};

#define DPI_READ(offset) readl(dpi->regs + (offset))
#define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))

/* VC4 DPI encoder KMS struct */
struct vc4_dpi_encoder {
	struct vc4_encoder base;
	struct vc4_dpi *dpi;
};

static inline struct vc4_dpi_encoder *
to_vc4_dpi_encoder(struct drm_encoder *encoder)
{
	return container_of(encoder, struct vc4_dpi_encoder, base.base);
}

static const struct debugfs_reg32 dpi_regs[] = {
	VC4_REG32(DPI_C),
	VC4_REG32(DPI_ID),
};

static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
{
	struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
	struct vc4_dpi *dpi = vc4_encoder->dpi;

	clk_disable_unprepare(dpi->pixel_clock);
}

static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
{
	struct drm_device *dev = encoder->dev;
	struct drm_display_mode *mode = &encoder->crtc->mode;
	struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
	struct vc4_dpi *dpi = vc4_encoder->dpi;
	struct drm_connector_list_iter conn_iter;
	struct drm_connector *connector = NULL, *connector_scan;
	u32 dpi_c = DPI_ENABLE | DPI_OUTPUT_ENABLE_MODE;
	int ret;

	/* Look up the connector attached to DPI so we can get the
	 * bus_format.  Ideally the bridge would tell us the
	 * bus_format we want, but it doesn't yet, so assume that it's
	 * uniform throughout the bridge chain.
	 */
	drm_connector_list_iter_begin(dev, &conn_iter);
	drm_for_each_connector_iter(connector_scan, &conn_iter) {
		if (connector_scan->encoder == encoder) {
			connector = connector_scan;
			break;
		}
	}
	drm_connector_list_iter_end(&conn_iter);

	if (connector && connector->display_info.num_bus_formats) {
		u32 bus_format = connector->display_info.bus_formats[0];

		switch (bus_format) {
		case MEDIA_BUS_FMT_RGB888_1X24:
			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
					       DPI_FORMAT);
			break;
		case MEDIA_BUS_FMT_BGR888_1X24:
			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
					       DPI_FORMAT);
			dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
			break;
		case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
					       DPI_FORMAT);
			break;
		case MEDIA_BUS_FMT_RGB666_1X18:
			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
					       DPI_FORMAT);
			break;
		case MEDIA_BUS_FMT_RGB565_1X16:
			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3,
					       DPI_FORMAT);
			break;
		default:
			DRM_ERROR("Unknown media bus format %d\n", bus_format);
			break;
		}
	} else {
		/* Default to 24bit if no connector found. */
		dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, DPI_FORMAT);
	}

	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
		dpi_c |= DPI_HSYNC_INVERT;
	else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
		dpi_c |= DPI_HSYNC_DISABLE;

	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
		dpi_c |= DPI_VSYNC_INVERT;
	else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
		dpi_c |= DPI_VSYNC_DISABLE;

	DPI_WRITE(DPI_C, dpi_c);

	ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
	if (ret)
		DRM_ERROR("Failed to set clock rate: %d\n", ret);

	ret = clk_prepare_enable(dpi->pixel_clock);
	if (ret)
		DRM_ERROR("Failed to set clock rate: %d\n", ret);
}

static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
						       const struct drm_display_mode *mode)
{
	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
		return MODE_NO_INTERLACE;

	return MODE_OK;
}

static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
	.disable = vc4_dpi_encoder_disable,
	.enable = vc4_dpi_encoder_enable,
	.mode_valid = vc4_dpi_encoder_mode_valid,
};

static const struct of_device_id vc4_dpi_dt_match[] = {
	{ .compatible = "brcm,bcm2835-dpi", .data = NULL },
	{}
};

/* Sets up the next link in the display chain, whether it's a panel or
 * a bridge.
 */
static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
{
	struct device *dev = &dpi->pdev->dev;
	struct drm_panel *panel;
	struct drm_bridge *bridge;
	int ret;

	ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
					  &panel, &bridge);
	if (ret) {
		/* If nothing was connected in the DT, that's not an
		 * error.
		 */
		if (ret == -ENODEV)
			return 0;
		else
			return ret;
	}

	if (panel)
		bridge = drm_panel_bridge_add_typed(panel,
						    DRM_MODE_CONNECTOR_DPI);

	return drm_bridge_attach(dpi->encoder, bridge, NULL, 0);
}

static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
{
	struct platform_device *pdev = to_platform_device(dev);
	struct drm_device *drm = dev_get_drvdata(master);
	struct vc4_dev *vc4 = to_vc4_dev(drm);
	struct vc4_dpi *dpi;
	struct vc4_dpi_encoder *vc4_dpi_encoder;
	int ret;

	dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
	if (!dpi)
		return -ENOMEM;

	vc4_dpi_encoder = devm_kzalloc(dev, sizeof(*vc4_dpi_encoder),
				       GFP_KERNEL);
	if (!vc4_dpi_encoder)
		return -ENOMEM;
	vc4_dpi_encoder->base.type = VC4_ENCODER_TYPE_DPI;
	vc4_dpi_encoder->dpi = dpi;
	dpi->encoder = &vc4_dpi_encoder->base.base;

	dpi->pdev = pdev;
	dpi->regs = vc4_ioremap_regs(pdev, 0);
	if (IS_ERR(dpi->regs))
		return PTR_ERR(dpi->regs);
	dpi->regset.base = dpi->regs;
	dpi->regset.regs = dpi_regs;
	dpi->regset.nregs = ARRAY_SIZE(dpi_regs);

	if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
		dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
			DPI_READ(DPI_ID), DPI_ID_VALUE);
		return -ENODEV;
	}

	dpi->core_clock = devm_clk_get(dev, "core");
	if (IS_ERR(dpi->core_clock)) {
		ret = PTR_ERR(dpi->core_clock);
		if (ret != -EPROBE_DEFER)
			DRM_ERROR("Failed to get core clock: %d\n", ret);
		return ret;
	}
	dpi->pixel_clock = devm_clk_get(dev, "pixel");
	if (IS_ERR(dpi->pixel_clock)) {
		ret = PTR_ERR(dpi->pixel_clock);
		if (ret != -EPROBE_DEFER)
			DRM_ERROR("Failed to get pixel clock: %d\n", ret);
		return ret;
	}

	ret = clk_prepare_enable(dpi->core_clock);
	if (ret)
		DRM_ERROR("Failed to turn on core clock: %d\n", ret);

	drm_simple_encoder_init(drm, dpi->encoder, DRM_MODE_ENCODER_DPI);
	drm_encoder_helper_add(dpi->encoder, &vc4_dpi_encoder_helper_funcs);

	ret = vc4_dpi_init_bridge(dpi);
	if (ret)
		goto err_destroy_encoder;

	dev_set_drvdata(dev, dpi);

	vc4->dpi = dpi;

	vc4_debugfs_add_regset32(drm, "dpi_regs", &dpi->regset);

	return 0;

err_destroy_encoder:
	drm_encoder_cleanup(dpi->encoder);
	clk_disable_unprepare(dpi->core_clock);
	return ret;
}

static void vc4_dpi_unbind(struct device *dev, struct device *master,
			   void *data)
{
	struct drm_device *drm = dev_get_drvdata(master);
	struct vc4_dev *vc4 = to_vc4_dev(drm);
	struct vc4_dpi *dpi = dev_get_drvdata(dev);

	drm_of_panel_bridge_remove(dev->of_node, 0, 0);

	drm_encoder_cleanup(dpi->encoder);

	clk_disable_unprepare(dpi->core_clock);

	vc4->dpi = NULL;
}

static const struct component_ops vc4_dpi_ops = {
	.bind   = vc4_dpi_bind,
	.unbind = vc4_dpi_unbind,
};

static int vc4_dpi_dev_probe(struct platform_device *pdev)
{
	return component_add(&pdev->dev, &vc4_dpi_ops);
}

static int vc4_dpi_dev_remove(struct platform_device *pdev)
{
	component_del(&pdev->dev, &vc4_dpi_ops);
	return 0;
}

struct platform_driver vc4_dpi_driver = {
	.probe = vc4_dpi_dev_probe,
	.remove = vc4_dpi_dev_remove,
	.driver = {
		.name = "vc4_dpi",
		.of_match_table = vc4_dpi_dt_match,
	},
};
Commit	Line	Data
caab277b	1	// SPDX-License-Identifier: GPL-2.0-only
08302c35 EA	2	/*
08302c35 EA	3	* Copyright (C) 2016 Broadcom Limited
08302c35 EA	4	*/
	5
	6	/**
	7	* DOC: VC4 DPI module
	8	*
	9	* The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
f6c01530 EA	10	* signals. On BCM2835, these can be routed out to GPIO0-27 with the
f6c01530 EA	11	* ALT2 function.
08302c35 EA	12	*/
08302c35 EA	13
b7e8e25b	14	#include <drm/drm_atomic_helper.h>
7b1298e0	15	#include <drm/drm_bridge.h>
b7e8e25b	16	#include <drm/drm_edid.h>
7b1298e0	17	#include <drm/drm_of.h>
b7e8e25b	18	#include <drm/drm_panel.h>
fcd70cd3	19	#include <drm/drm_probe_helper.h>
f6ebc1b0	20	#include <drm/drm_simple_kms_helper.h>
b7e8e25b MY	21	#include <linux/clk.h>
	22	#include <linux/component.h>
	23	#include <linux/of_graph.h>
	24	#include <linux/of_platform.h>
08302c35 EA	25	#include "vc4_drv.h"
	26	#include "vc4_regs.h"
	27
	28	#define DPI_C 0x00
	29	# define DPI_OUTPUT_ENABLE_MODE BIT(16)
	30
	31	/* The order field takes the incoming 24 bit RGB from the pixel valve
	32	* and shuffles the 3 channels.
	33	*/
	34	# define DPI_ORDER_MASK VC4_MASK(15, 14)
	35	# define DPI_ORDER_SHIFT 14
	36	# define DPI_ORDER_RGB 0
	37	# define DPI_ORDER_BGR 1
	38	# define DPI_ORDER_GRB 2
	39	# define DPI_ORDER_BRG 3
	40
	41	/* The format field takes the ORDER-shuffled pixel valve data and
	42	* formats it onto the output lines.
	43	*/
	44	# define DPI_FORMAT_MASK VC4_MASK(13, 11)
	45	# define DPI_FORMAT_SHIFT 11
	46	/* This define is named in the hardware, but actually just outputs 0. */
	47	# define DPI_FORMAT_9BIT_666_RGB 0
	48	/* Outputs 00000000rrrrrggggggbbbbb */
	49	# define DPI_FORMAT_16BIT_565_RGB_1 1
	50	/* Outputs 000rrrrr00gggggg000bbbbb */
	51	# define DPI_FORMAT_16BIT_565_RGB_2 2
	52	/* Outputs 00rrrrr000gggggg00bbbbb0 */
	53	# define DPI_FORMAT_16BIT_565_RGB_3 3
	54	/* Outputs 000000rrrrrrggggggbbbbbb */
	55	# define DPI_FORMAT_18BIT_666_RGB_1 4
	56	/* Outputs 00rrrrrr00gggggg00bbbbbb */
	57	# define DPI_FORMAT_18BIT_666_RGB_2 5
	58	/* Outputs rrrrrrrrggggggggbbbbbbbb */
	59	# define DPI_FORMAT_24BIT_888_RGB 6
	60
	61	/* Reverses the polarity of the corresponding signal */
	62	# define DPI_PIXEL_CLK_INVERT BIT(10)
	63	# define DPI_HSYNC_INVERT BIT(9)
	64	# define DPI_VSYNC_INVERT BIT(8)
	65	# define DPI_OUTPUT_ENABLE_INVERT BIT(7)
	66
	67	/* Outputs the signal the falling clock edge instead of rising. */
	68	# define DPI_HSYNC_NEGATE BIT(6)
	69	# define DPI_VSYNC_NEGATE BIT(5)
	70	# define DPI_OUTPUT_ENABLE_NEGATE BIT(4)
	71
	72	/* Disables the signal */
	73	# define DPI_HSYNC_DISABLE BIT(3)
	74	# define DPI_VSYNC_DISABLE BIT(2)
	75	# define DPI_OUTPUT_ENABLE_DISABLE BIT(1)
	76
	77	/* Power gate to the device, full reset at 0 -> 1 transition */
	78	# define DPI_ENABLE BIT(0)
	79
	80	/* All other registers besides DPI_C return the ID */
	81	#define DPI_ID 0x04
	82	# define DPI_ID_VALUE 0x00647069
	83
	84	/* General DPI hardware state. */
	85	struct vc4_dpi {
	86	struct platform_device *pdev;
	87
	88	struct drm_encoder *encoder;
08302c35 EA	89
	90	void __iomem *regs;
	91
	92	struct clk *pixel_clock;
	93	struct clk *core_clock;
3051719a EA	94
3051719a EA	95	struct debugfs_regset32 regset;
08302c35 EA	96	};
	97
	98	#define DPI_READ(offset) readl(dpi->regs + (offset))
	99	#define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))
	100
	101	/* VC4 DPI encoder KMS struct */
	102	struct vc4_dpi_encoder {
	103	struct vc4_encoder base;
	104	struct vc4_dpi *dpi;
	105	};
	106
	107	static inline struct vc4_dpi_encoder *
	108	to_vc4_dpi_encoder(struct drm_encoder *encoder)
	109	{
	110	return container_of(encoder, struct vc4_dpi_encoder, base.base);
	111	}
	112
3051719a EA	113	static const struct debugfs_reg32 dpi_regs[] = {
	114	VC4_REG32(DPI_C),
	115	VC4_REG32(DPI_ID),
08302c35 EA	116	};
08302c35 EA	117
08302c35 EA	118	static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
	119	{
	120	struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
	121	struct vc4_dpi *dpi = vc4_encoder->dpi;
	122
08302c35	123	clk_disable_unprepare(dpi->pixel_clock);
08302c35 EA	124	}
	125
	126	static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
	127	{
164c2416	128	struct drm_device *dev = encoder->dev;
08302c35 EA	129	struct drm_display_mode *mode = &encoder->crtc->mode;
	130	struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
	131	struct vc4_dpi *dpi = vc4_encoder->dpi;
164c2416 EA	132	struct drm_connector_list_iter conn_iter;
164c2416 EA	133	struct drm_connector connector = NULL, connector_scan;
08302c35 EA	134	u32 dpi_c = DPI_ENABLE \| DPI_OUTPUT_ENABLE_MODE;
	135	int ret;
	136
164c2416 EA	137	/* Look up the connector attached to DPI so we can get the
	138	* bus_format. Ideally the bridge would tell us the
	139	* bus_format we want, but it doesn't yet, so assume that it's
	140	* uniform throughout the bridge chain.
	141	*/
	142	drm_connector_list_iter_begin(dev, &conn_iter);
	143	drm_for_each_connector_iter(connector_scan, &conn_iter) {
	144	if (connector_scan->encoder == encoder) {
	145	connector = connector_scan;
	146	break;
	147	}
	148	}
	149	drm_connector_list_iter_end(&conn_iter);
	150
	151	if (connector && connector->display_info.num_bus_formats) {
	152	u32 bus_format = connector->display_info.bus_formats[0];
08302c35 EA	153
	154	switch (bus_format) {
	155	case MEDIA_BUS_FMT_RGB888_1X24:
	156	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
	157	DPI_FORMAT);
	158	break;
	159	case MEDIA_BUS_FMT_BGR888_1X24:
	160	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
	161	DPI_FORMAT);
	162	dpi_c \|= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
	163	break;
	164	case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
	165	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
	166	DPI_FORMAT);
	167	break;
	168	case MEDIA_BUS_FMT_RGB666_1X18:
	169	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
	170	DPI_FORMAT);
	171	break;
	172	case MEDIA_BUS_FMT_RGB565_1X16:
	173	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3,
	174	DPI_FORMAT);
	175	break;
	176	default:
	177	DRM_ERROR("Unknown media bus format %d\n", bus_format);
	178	break;
	179	}
164c2416 EA	180	} else {
	181	/* Default to 24bit if no connector found. */
	182	dpi_c \|= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, DPI_FORMAT);
08302c35 EA	183	}
	184
	185	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
	186	dpi_c \|= DPI_HSYNC_INVERT;
	187	else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
	188	dpi_c \|= DPI_HSYNC_DISABLE;
	189
	190	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
	191	dpi_c \|= DPI_VSYNC_INVERT;
	192	else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
	193	dpi_c \|= DPI_VSYNC_DISABLE;
	194
	195	DPI_WRITE(DPI_C, dpi_c);
	196
	197	ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
	198	if (ret)
	199	DRM_ERROR("Failed to set clock rate: %d\n", ret);
	200
	201	ret = clk_prepare_enable(dpi->pixel_clock);
	202	if (ret)
	203	DRM_ERROR("Failed to set clock rate: %d\n", ret);
08302c35 EA	204	}
08302c35 EA	205
c50a115b JA	206	static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
c50a115b JA	207	const struct drm_display_mode *mode)
e2298350	208	{
c50a115b JA	209	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
c50a115b JA	210	return MODE_NO_INTERLACE;
e2298350	211
c50a115b	212	return MODE_OK;
e2298350 MK	213	}
e2298350 MK	214
08302c35 EA	215	static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
	216	.disable = vc4_dpi_encoder_disable,
	217	.enable = vc4_dpi_encoder_enable,
c50a115b	218	.mode_valid = vc4_dpi_encoder_mode_valid,
08302c35 EA	219	};
	220
	221	static const struct of_device_id vc4_dpi_dt_match[] = {
	222	{ .compatible = "brcm,bcm2835-dpi", .data = NULL },
	223	{}
	224	};
	225
7b1298e0 EA	226	/* Sets up the next link in the display chain, whether it's a panel or
7b1298e0 EA	227	* a bridge.
08302c35	228	*/
7b1298e0	229	static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
08302c35	230	{
7b1298e0	231	struct device *dev = &dpi->pdev->dev;
08302c35	232	struct drm_panel *panel;
8f6b06c1	233	struct drm_bridge *bridge;
7b1298e0	234	int ret;
08302c35	235
7b1298e0	236	ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
8f6b06c1	237	&panel, &bridge);
7b1298e0 EA	238	if (ret) {
	239	/* If nothing was connected in the DT, that's not an
	240	* error.
	241	*/
	242	if (ret == -ENODEV)
	243	return 0;
	244	else
	245	return ret;
	246	}
08302c35	247
8f6b06c1	248	if (panel)
89958b7c LP	249	bridge = drm_panel_bridge_add_typed(panel,
89958b7c LP	250	DRM_MODE_CONNECTOR_DPI);
08302c35	251
a25b988f	252	return drm_bridge_attach(dpi->encoder, bridge, NULL, 0);
08302c35 EA	253	}
	254
	255	static int vc4_dpi_bind(struct device dev, struct device master, void *data)
	256	{
	257	struct platform_device *pdev = to_platform_device(dev);
	258	struct drm_device *drm = dev_get_drvdata(master);
	259	struct vc4_dev *vc4 = to_vc4_dev(drm);
	260	struct vc4_dpi *dpi;
	261	struct vc4_dpi_encoder *vc4_dpi_encoder;
	262	int ret;
	263
	264	dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
	265	if (!dpi)
	266	return -ENOMEM;
	267
	268	vc4_dpi_encoder = devm_kzalloc(dev, sizeof(*vc4_dpi_encoder),
	269	GFP_KERNEL);
	270	if (!vc4_dpi_encoder)
	271	return -ENOMEM;
	272	vc4_dpi_encoder->base.type = VC4_ENCODER_TYPE_DPI;
	273	vc4_dpi_encoder->dpi = dpi;
	274	dpi->encoder = &vc4_dpi_encoder->base.base;
	275
	276	dpi->pdev = pdev;
	277	dpi->regs = vc4_ioremap_regs(pdev, 0);
	278	if (IS_ERR(dpi->regs))
	279	return PTR_ERR(dpi->regs);
3051719a EA	280	dpi->regset.base = dpi->regs;
	281	dpi->regset.regs = dpi_regs;
	282	dpi->regset.nregs = ARRAY_SIZE(dpi_regs);
08302c35	283
08302c35 EA	284	if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
	285	dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
	286	DPI_READ(DPI_ID), DPI_ID_VALUE);
	287	return -ENODEV;
	288	}
	289
	290	dpi->core_clock = devm_clk_get(dev, "core");
	291	if (IS_ERR(dpi->core_clock)) {
	292	ret = PTR_ERR(dpi->core_clock);
	293	if (ret != -EPROBE_DEFER)
	294	DRM_ERROR("Failed to get core clock: %d\n", ret);
	295	return ret;
	296	}
	297	dpi->pixel_clock = devm_clk_get(dev, "pixel");
	298	if (IS_ERR(dpi->pixel_clock)) {
	299	ret = PTR_ERR(dpi->pixel_clock);
	300	if (ret != -EPROBE_DEFER)
	301	DRM_ERROR("Failed to get pixel clock: %d\n", ret);
	302	return ret;
	303	}
	304
	305	ret = clk_prepare_enable(dpi->core_clock);
	306	if (ret)
	307	DRM_ERROR("Failed to turn on core clock: %d\n", ret);
	308
f6ebc1b0	309	drm_simple_encoder_init(drm, dpi->encoder, DRM_MODE_ENCODER_DPI);
08302c35 EA	310	drm_encoder_helper_add(dpi->encoder, &vc4_dpi_encoder_helper_funcs);
08302c35 EA	311
7b1298e0 EA	312	ret = vc4_dpi_init_bridge(dpi);
7b1298e0 EA	313	if (ret)
08302c35	314	goto err_destroy_encoder;
08302c35 EA	315
	316	dev_set_drvdata(dev, dpi);
	317
	318	vc4->dpi = dpi;
c9be804c EA	319
c9be804c EA	320	vc4_debugfs_add_regset32(drm, "dpi_regs", &dpi->regset);
08302c35 EA	321
	322	return 0;
	323
	324	err_destroy_encoder:
	325	drm_encoder_cleanup(dpi->encoder);
	326	clk_disable_unprepare(dpi->core_clock);
	327	return ret;
	328	}
	329
	330	static void vc4_dpi_unbind(struct device dev, struct device master,
	331	void *data)
	332	{
	333	struct drm_device *drm = dev_get_drvdata(master);
	334	struct vc4_dev *vc4 = to_vc4_dev(drm);
	335	struct vc4_dpi *dpi = dev_get_drvdata(dev);
	336
8f6b06c1	337	drm_of_panel_bridge_remove(dev->of_node, 0, 0);
08302c35	338
08302c35 EA	339	drm_encoder_cleanup(dpi->encoder);
	340
	341	clk_disable_unprepare(dpi->core_clock);
	342
	343	vc4->dpi = NULL;
	344	}
	345
	346	static const struct component_ops vc4_dpi_ops = {
	347	.bind = vc4_dpi_bind,
	348	.unbind = vc4_dpi_unbind,
	349	};
	350
	351	static int vc4_dpi_dev_probe(struct platform_device *pdev)
	352	{
	353	return component_add(&pdev->dev, &vc4_dpi_ops);
	354	}
	355
	356	static int vc4_dpi_dev_remove(struct platform_device *pdev)
	357	{
	358	component_del(&pdev->dev, &vc4_dpi_ops);
	359	return 0;
	360	}
	361
	362	struct platform_driver vc4_dpi_driver = {
	363	.probe = vc4_dpi_dev_probe,
	364	.remove = vc4_dpi_dev_remove,
	365	.driver = {
	366	.name = "vc4_dpi",
	367	.of_match_table = vc4_dpi_dt_match,
	368	},
	369	};