Commit | Line | Data |
---|---|---|
d2912cb1 | 1 | /* SPDX-License-Identifier: GPL-2.0-only */ |
d8f4a9ed TR |
2 | /* |
3 | * Copyright (C) 2012 Avionic Design GmbH | |
d43f81cb | 4 | * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved. |
d8f4a9ed TR |
5 | */ |
6 | ||
4231c6b0 TB |
7 | #ifndef HOST1X_DRM_H |
8 | #define HOST1X_DRM_H 1 | |
d8f4a9ed | 9 | |
e1e90644 | 10 | #include <linux/host1x.h> |
ad926015 | 11 | #include <linux/iova.h> |
ac2caae6 | 12 | #include <linux/gpio/consumer.h> |
e1e90644 | 13 | |
c4755fb9 | 14 | #include <drm/drm_atomic.h> |
f00b9dd5 | 15 | #include <drm/drm_bridge.h> |
d8f4a9ed | 16 | #include <drm/drm_edid.h> |
9338203c | 17 | #include <drm/drm_encoder.h> |
d8f4a9ed | 18 | #include <drm/drm_fixed.h> |
fcd70cd3 | 19 | #include <drm/drm_probe_helper.h> |
eb1df694 | 20 | #include <uapi/drm/tegra_drm.h> |
d8f4a9ed | 21 | |
c134f019 | 22 | #include "gem.h" |
c4755fb9 | 23 | #include "hub.h" |
67e04d1a | 24 | #include "trace.h" |
c134f019 | 25 | |
7b6f8467 | 26 | /* XXX move to include/uapi/drm/drm_fourcc.h? */ |
671cc352 | 27 | #define DRM_FORMAT_MOD_NVIDIA_SECTOR_LAYOUT BIT_ULL(22) |
7b6f8467 | 28 | |
ca48080a SW |
29 | struct reset_control; |
30 | ||
386a2a71 | 31 | struct tegra_drm { |
d8f4a9ed | 32 | struct drm_device *drm; |
d8f4a9ed | 33 | |
df06b759 | 34 | struct iommu_domain *domain; |
fa6661b7 | 35 | bool use_explicit_iommu; |
347ad49d | 36 | struct mutex mm_lock; |
df06b759 TR |
37 | struct drm_mm mm; |
38 | ||
ad926015 MP |
39 | struct { |
40 | struct iova_domain domain; | |
41 | unsigned long shift; | |
42 | unsigned long limit; | |
43 | } carveout; | |
44 | ||
d8f4a9ed TR |
45 | struct mutex clients_lock; |
46 | struct list_head clients; | |
47 | ||
042c0bd7 | 48 | unsigned int hmask, vmask; |
d1f3e1e0 | 49 | unsigned int pitch_align; |
05d1adfe | 50 | unsigned int num_crtcs; |
1503ca47 | 51 | |
c4755fb9 | 52 | struct tegra_display_hub *hub; |
d8f4a9ed TR |
53 | }; |
54 | ||
d7c591bc MP |
55 | static inline struct host1x *tegra_drm_to_host1x(struct tegra_drm *tegra) |
56 | { | |
57 | return dev_get_drvdata(tegra->drm->dev->parent); | |
58 | } | |
59 | ||
53fa7f72 | 60 | struct tegra_drm_client; |
d8f4a9ed | 61 | |
c88c3630 | 62 | struct tegra_drm_context { |
53fa7f72 | 63 | struct tegra_drm_client *client; |
d43f81cb | 64 | struct host1x_channel *channel; |
d7c591bc MP |
65 | |
66 | /* Only used by legacy UAPI. */ | |
bdd2f9cd | 67 | unsigned int id; |
d7c591bc MP |
68 | |
69 | /* Only used by new UAPI. */ | |
70 | struct xarray mappings; | |
e09db978 | 71 | struct host1x_memory_context *memory_context; |
d43f81cb TB |
72 | }; |
73 | ||
53fa7f72 TR |
74 | struct tegra_drm_client_ops { |
75 | int (*open_channel)(struct tegra_drm_client *client, | |
c88c3630 TR |
76 | struct tegra_drm_context *context); |
77 | void (*close_channel)(struct tegra_drm_context *context); | |
c40f0f1a | 78 | int (*is_addr_reg)(struct device *dev, u32 class, u32 offset); |
0f563a4b | 79 | int (*is_valid_class)(u32 class); |
c88c3630 | 80 | int (*submit)(struct tegra_drm_context *context, |
d43f81cb TB |
81 | struct drm_tegra_submit *args, struct drm_device *drm, |
82 | struct drm_file *file); | |
e09db978 MP |
83 | int (*get_streamid_offset)(struct tegra_drm_client *client, u32 *offset); |
84 | int (*can_use_memory_ctx)(struct tegra_drm_client *client, bool *supported); | |
d43f81cb TB |
85 | }; |
86 | ||
c40f0f1a TR |
87 | int tegra_drm_submit(struct tegra_drm_context *context, |
88 | struct drm_tegra_submit *args, struct drm_device *drm, | |
89 | struct drm_file *file); | |
90 | ||
bf0297ac MP |
91 | static inline int |
92 | tegra_drm_get_streamid_offset_thi(struct tegra_drm_client *client, u32 *offset) | |
93 | { | |
94 | *offset = 0x30; | |
95 | ||
96 | return 0; | |
97 | } | |
98 | ||
53fa7f72 TR |
99 | struct tegra_drm_client { |
100 | struct host1x_client base; | |
776dc384 | 101 | struct list_head list; |
8e5d19c6 | 102 | struct tegra_drm *drm; |
e0f2977c | 103 | struct host1x_channel *shared_channel; |
d43f81cb | 104 | |
e0f2977c | 105 | /* Set by driver */ |
f3b3cfcc | 106 | unsigned int version; |
53fa7f72 | 107 | const struct tegra_drm_client_ops *ops; |
d8f4a9ed TR |
108 | }; |
109 | ||
53fa7f72 | 110 | static inline struct tegra_drm_client * |
776dc384 | 111 | host1x_to_drm_client(struct host1x_client *client) |
53fa7f72 TR |
112 | { |
113 | return container_of(client, struct tegra_drm_client, base); | |
114 | } | |
115 | ||
688c59af TR |
116 | int tegra_drm_register_client(struct tegra_drm *tegra, |
117 | struct tegra_drm_client *client); | |
118 | int tegra_drm_unregister_client(struct tegra_drm *tegra, | |
119 | struct tegra_drm_client *client); | |
7edd7961 | 120 | int host1x_client_iommu_attach(struct host1x_client *client); |
aacdf198 | 121 | void host1x_client_iommu_detach(struct host1x_client *client); |
776dc384 | 122 | |
ad926015 MP |
123 | void *tegra_drm_alloc(struct tegra_drm *tegra, size_t size, dma_addr_t *iova); |
124 | void tegra_drm_free(struct tegra_drm *tegra, size_t size, void *virt, | |
125 | dma_addr_t iova); | |
126 | ||
fb83be88 HV |
127 | struct cec_notifier; |
128 | ||
d8f4a9ed TR |
129 | struct tegra_output { |
130 | struct device_node *of_node; | |
131 | struct device *dev; | |
132 | ||
f00b9dd5 | 133 | struct drm_bridge *bridge; |
9be7d864 | 134 | struct drm_panel *panel; |
d8f4a9ed TR |
135 | struct i2c_adapter *ddc; |
136 | const struct edid *edid; | |
f25d0a68 | 137 | struct cec_notifier *cec; |
d8f4a9ed | 138 | unsigned int hpd_irq; |
bbad6407 | 139 | struct gpio_desc *hpd_gpio; |
d8f4a9ed TR |
140 | |
141 | struct drm_encoder encoder; | |
142 | struct drm_connector connector; | |
143 | }; | |
144 | ||
145 | static inline struct tegra_output *encoder_to_output(struct drm_encoder *e) | |
146 | { | |
147 | return container_of(e, struct tegra_output, encoder); | |
148 | } | |
149 | ||
150 | static inline struct tegra_output *connector_to_output(struct drm_connector *c) | |
151 | { | |
152 | return container_of(c, struct tegra_output, connector); | |
153 | } | |
154 | ||
d8f4a9ed | 155 | /* from output.c */ |
688c59af | 156 | int tegra_output_probe(struct tegra_output *output); |
328ec69e | 157 | void tegra_output_remove(struct tegra_output *output); |
688c59af | 158 | int tegra_output_init(struct drm_device *drm, struct tegra_output *output); |
328ec69e | 159 | void tegra_output_exit(struct tegra_output *output); |
c57997bc TR |
160 | void tegra_output_find_possible_crtcs(struct tegra_output *output, |
161 | struct drm_device *drm); | |
fd67e9c6 TR |
162 | int tegra_output_suspend(struct tegra_output *output); |
163 | int tegra_output_resume(struct tegra_output *output); | |
d8f4a9ed | 164 | |
132085d8 | 165 | int tegra_output_connector_get_modes(struct drm_connector *connector); |
132085d8 TR |
166 | enum drm_connector_status |
167 | tegra_output_connector_detect(struct drm_connector *connector, bool force); | |
168 | void tegra_output_connector_destroy(struct drm_connector *connector); | |
169 | ||
6b6b6042 | 170 | /* from dpaux.c */ |
9542c237 TR |
171 | struct drm_dp_aux *drm_dp_aux_find_by_of_node(struct device_node *np); |
172 | enum drm_connector_status drm_dp_aux_detect(struct drm_dp_aux *aux); | |
173 | int drm_dp_aux_attach(struct drm_dp_aux *aux, struct tegra_output *output); | |
174 | int drm_dp_aux_detach(struct drm_dp_aux *aux); | |
175 | int drm_dp_aux_enable(struct drm_dp_aux *aux); | |
176 | int drm_dp_aux_disable(struct drm_dp_aux *aux); | |
6b6b6042 | 177 | |
d8f4a9ed | 178 | /* from fb.c */ |
de2ba664 AM |
179 | struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer, |
180 | unsigned int index); | |
db7fbdfd | 181 | bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer); |
c134f019 TR |
182 | int tegra_fb_get_tiling(struct drm_framebuffer *framebuffer, |
183 | struct tegra_bo_tiling *tiling); | |
1ac45068 TZ |
184 | struct drm_framebuffer *tegra_fb_alloc(struct drm_device *drm, |
185 | const struct drm_mode_fb_cmd2 *mode_cmd, | |
186 | struct tegra_bo **planes, | |
187 | unsigned int num_planes); | |
f9914214 TR |
188 | struct drm_framebuffer *tegra_fb_create(struct drm_device *drm, |
189 | struct drm_file *file, | |
1eb83451 | 190 | const struct drm_mode_fb_cmd2 *cmd); |
1ac45068 TZ |
191 | |
192 | #ifdef CONFIG_DRM_FBDEV_EMULATION | |
71ec16f4 | 193 | void tegra_fbdev_setup(struct drm_device *drm); |
1ac45068 | 194 | #else |
71ec16f4 | 195 | static inline void tegra_fbdev_setup(struct drm_device *drm) |
1ac45068 TZ |
196 | { } |
197 | #endif | |
d8f4a9ed | 198 | |
c4755fb9 | 199 | extern struct platform_driver tegra_display_hub_driver; |
776dc384 TR |
200 | extern struct platform_driver tegra_dc_driver; |
201 | extern struct platform_driver tegra_hdmi_driver; | |
473112e4 | 202 | extern struct platform_driver tegra_dsi_driver; |
6b6b6042 | 203 | extern struct platform_driver tegra_dpaux_driver; |
473112e4 | 204 | extern struct platform_driver tegra_sor_driver; |
776dc384 | 205 | extern struct platform_driver tegra_gr2d_driver; |
5f60ed0d | 206 | extern struct platform_driver tegra_gr3d_driver; |
0ae797a8 | 207 | extern struct platform_driver tegra_vic_driver; |
46f226c9 | 208 | extern struct platform_driver tegra_nvdec_driver; |
d8f4a9ed | 209 | |
4231c6b0 | 210 | #endif /* HOST1X_DRM_H */ |