dt-bindings: display: sun4i-drm: Add H6 display engine compatibles
[linux-block.git] / drivers / gpu / drm / sun4i / sun8i_vi_scaler.h
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1/*
2 * Copyright (C) 2017 Jernej Skrabec <jernej.skrabec@siol.net>
3 *
4 * This file is licensed under the terms of the GNU General Public
5 * License version 2. This program is licensed "as is" without any
6 * warranty of any kind, whether express or implied.
7 */
8
9#ifndef _SUN8I_VI_SCALER_H_
10#define _SUN8I_VI_SCALER_H_
11
1343bd6c 12#include <drm/drm_fourcc.h>
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13#include "sun8i_mixer.h"
14
15/* this two macros assumes 16 fractional bits which is standard in DRM */
16#define SUN8I_VI_SCALER_SCALE_MIN 1
17#define SUN8I_VI_SCALER_SCALE_MAX ((1UL << 20) - 1)
18
19#define SUN8I_VI_SCALER_SCALE_FRAC 20
20#define SUN8I_VI_SCALER_PHASE_FRAC 20
21#define SUN8I_VI_SCALER_COEFF_COUNT 32
22#define SUN8I_VI_SCALER_SIZE(w, h) (((h) - 1) << 16 | ((w) - 1))
23
24#define SUN8I_SCALER_VSU_CTRL(ch) (0x20000 + 0x20000 * (ch) + 0x0)
25#define SUN8I_SCALER_VSU_OUTSIZE(ch) (0x20000 + 0x20000 * (ch) + 0x40)
26#define SUN8I_SCALER_VSU_YINSIZE(ch) (0x20000 + 0x20000 * (ch) + 0x80)
27#define SUN8I_SCALER_VSU_YHSTEP(ch) (0x20000 + 0x20000 * (ch) + 0x88)
28#define SUN8I_SCALER_VSU_YVSTEP(ch) (0x20000 + 0x20000 * (ch) + 0x8c)
29#define SUN8I_SCALER_VSU_YHPHASE(ch) (0x20000 + 0x20000 * (ch) + 0x90)
30#define SUN8I_SCALER_VSU_YVPHASE(ch) (0x20000 + 0x20000 * (ch) + 0x98)
31#define SUN8I_SCALER_VSU_CINSIZE(ch) (0x20000 + 0x20000 * (ch) + 0xc0)
32#define SUN8I_SCALER_VSU_CHSTEP(ch) (0x20000 + 0x20000 * (ch) + 0xc8)
33#define SUN8I_SCALER_VSU_CVSTEP(ch) (0x20000 + 0x20000 * (ch) + 0xcc)
34#define SUN8I_SCALER_VSU_CHPHASE(ch) (0x20000 + 0x20000 * (ch) + 0xd0)
35#define SUN8I_SCALER_VSU_CVPHASE(ch) (0x20000 + 0x20000 * (ch) + 0xd8)
36#define SUN8I_SCALER_VSU_YHCOEFF0(ch, i) \
37 (0x20000 + 0x20000 * (ch) + 0x200 + 0x4 * (i))
38#define SUN8I_SCALER_VSU_YHCOEFF1(ch, i) \
39 (0x20000 + 0x20000 * (ch) + 0x300 + 0x4 * (i))
40#define SUN8I_SCALER_VSU_YVCOEFF(ch, i) \
41 (0x20000 + 0x20000 * (ch) + 0x400 + 0x4 * (i))
42#define SUN8I_SCALER_VSU_CHCOEFF0(ch, i) \
43 (0x20000 + 0x20000 * (ch) + 0x600 + 0x4 * (i))
44#define SUN8I_SCALER_VSU_CHCOEFF1(ch, i) \
45 (0x20000 + 0x20000 * (ch) + 0x700 + 0x4 * (i))
46#define SUN8I_SCALER_VSU_CVCOEFF(ch, i) \
47 (0x20000 + 0x20000 * (ch) + 0x800 + 0x4 * (i))
48
49#define SUN8I_SCALER_VSU_CTRL_EN BIT(0)
50#define SUN8I_SCALER_VSU_CTRL_COEFF_RDY BIT(4)
51
52void sun8i_vi_scaler_enable(struct sun8i_mixer *mixer, int layer, bool enable);
53void sun8i_vi_scaler_setup(struct sun8i_mixer *mixer, int layer,
54 u32 src_w, u32 src_h, u32 dst_w, u32 dst_h,
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55 u32 hscale, u32 vscale, u32 hphase, u32 vphase,
56 const struct drm_format_info *format);
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57
58#endif