[linux-block.git] / drivers / gpu / drm / sti / sti_hdmi.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (C) STMicroelectronics SA 2014
 * Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
 */

#ifndef _STI_HDMI_H_
#define _STI_HDMI_H_

#include <linux/hdmi.h>
#include <linux/platform_device.h>

#include <media/cec-notifier.h>

#include <drm/drm_modes.h>
#include <drm/drm_property.h>

#define HDMI_STA           0x0010
#define HDMI_STA_DLL_LCK   BIT(5)
#define HDMI_STA_HOT_PLUG  BIT(4)

struct sti_hdmi;

struct hdmi_phy_ops {
	bool (*start)(struct sti_hdmi *hdmi);
	void (*stop)(struct sti_hdmi *hdmi);
};

struct hdmi_audio_params {
	bool enabled;
	unsigned int sample_width;
	unsigned int sample_rate;
	struct hdmi_audio_infoframe cea;
};

#define DEFAULT_COLORSPACE_MODE HDMI_COLORSPACE_RGB

/**
 * STI hdmi structure
 *
 * @dev: driver device
 * @drm_dev: pointer to drm device
 * @mode: current display mode selected
 * @regs: hdmi register
 * @syscfg: syscfg register for pll rejection configuration
 * @clk_pix: hdmi pixel clock
 * @clk_tmds: hdmi tmds clock
 * @clk_phy: hdmi phy clock
 * @clk_audio: hdmi audio clock
 * @irq: hdmi interrupt number
 * @irq_status: interrupt status register
 * @phy_ops: phy start/stop operations
 * @enabled: true if hdmi is enabled else false
 * @hpd: hot plug detect status
 * @wait_event: wait event
 * @event_received: wait event status
 * @reset: reset control of the hdmi phy
 * @ddc_adapt: i2c ddc adapter
 * @colorspace: current colorspace selected
 * @hdmi_monitor: true if HDMI monitor detected else DVI monitor assumed
 * @audio_pdev: ASoC hdmi-codec platform device
 * @audio: hdmi audio parameters.
 * @drm_connector: hdmi connector
 * @notifier: hotplug detect notifier
 */
struct sti_hdmi {
	struct device dev;
	struct drm_device *drm_dev;
	struct drm_display_mode mode;
	void __iomem *regs;
	void __iomem *syscfg;
	struct clk *clk_pix;
	struct clk *clk_tmds;
	struct clk *clk_phy;
	struct clk *clk_audio;
	int irq;
	u32 irq_status;
	struct hdmi_phy_ops *phy_ops;
	bool enabled;
	bool hpd;
	wait_queue_head_t wait_event;
	bool event_received;
	struct reset_control *reset;
	struct i2c_adapter *ddc_adapt;
	enum hdmi_colorspace colorspace;
	bool hdmi_monitor;
	struct platform_device *audio_pdev;
	struct hdmi_audio_params audio;
	struct drm_connector *drm_connector;
	struct cec_notifier *notifier;
};

u32 hdmi_read(struct sti_hdmi *hdmi, int offset);
void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset);

/**
 * hdmi phy config structure
 *
 * A pointer to an array of these structures is passed to a TMDS (HDMI) output
 * via the control interface to provide board and SoC specific
 * configurations of the HDMI PHY. Each entry in the array specifies a hardware
 * specific configuration for a given TMDS clock frequency range.
 *
 * @min_tmds_freq: Lower bound of TMDS clock frequency this entry applies to
 * @max_tmds_freq: Upper bound of TMDS clock frequency this entry applies to
 * @config: SoC specific register configuration
 */
struct hdmi_phy_config {
	u32 min_tmds_freq;
	u32 max_tmds_freq;
	u32 config[4];
};

#endif
Commit	Line	Data
e2842570	1	/* SPDX-License-Identifier: GPL-2.0 */
5402626c BG	2	/*
	3	* Copyright (C) STMicroelectronics SA 2014
	4	* Author: Vincent Abriou <vincent.abriou@st.com> for STMicroelectronics.
5402626c BG	5	*/
	6
	7	#ifndef _STI_HDMI_H_
	8	#define _STI_HDMI_H_
	9
5671cefb	10	#include <linux/hdmi.h>
5402626c BG	11	#include <linux/platform_device.h>
5402626c BG	12
bca55958	13	#include <media/cec-notifier.h>
5402626c	14
5e2f97a9 SR	15	#include <drm/drm_modes.h>
	16	#include <drm/drm_property.h>
	17
5402626c BG	18	#define HDMI_STA 0x0010
5402626c BG	19	#define HDMI_STA_DLL_LCK BIT(5)
7ea6e6e4	20	#define HDMI_STA_HOT_PLUG BIT(4)
76569207	21
5402626c BG	22	struct sti_hdmi;
	23
	24	struct hdmi_phy_ops {
	25	bool (start)(struct sti_hdmi hdmi);
	26	void (stop)(struct sti_hdmi hdmi);
	27	};
	28
2c348e50 AP	29	struct hdmi_audio_params {
	30	bool enabled;
	31	unsigned int sample_width;
	32	unsigned int sample_rate;
	33	struct hdmi_audio_infoframe cea;
	34	};
	35
5671cefb VA	36	#define DEFAULT_COLORSPACE_MODE HDMI_COLORSPACE_RGB
5671cefb VA	37
5402626c BG	38	/**
	39	* STI hdmi structure
	40	*
	41	* @dev: driver device
	42	* @drm_dev: pointer to drm device
	43	* @mode: current display mode selected
	44	* @regs: hdmi register
	45	* @syscfg: syscfg register for pll rejection configuration
	46	* @clk_pix: hdmi pixel clock
	47	* @clk_tmds: hdmi tmds clock
	48	* @clk_phy: hdmi phy clock
	49	* @clk_audio: hdmi audio clock
	50	* @irq: hdmi interrupt number
	51	* @irq_status: interrupt status register
	52	* @phy_ops: phy start/stop operations
	53	* @enabled: true if hdmi is enabled else false
5402626c BG	54	* @hpd: hot plug detect status
	55	* @wait_event: wait event
	56	* @event_received: wait event status
	57	* @reset: reset control of the hdmi phy
5671cefb VA	58	* @ddc_adapt: i2c ddc adapter
5671cefb VA	59	* @colorspace: current colorspace selected
97d7c576	60	* @hdmi_monitor: true if HDMI monitor detected else DVI monitor assumed
2c348e50 AP	61	* @audio_pdev: ASoC hdmi-codec platform device
	62	* @audio: hdmi audio parameters.
	63	* @drm_connector: hdmi connector
bca55958	64	* @notifier: hotplug detect notifier
5402626c BG	65	*/
	66	struct sti_hdmi {
	67	struct device dev;
	68	struct drm_device *drm_dev;
	69	struct drm_display_mode mode;
	70	void __iomem *regs;
	71	void __iomem *syscfg;
	72	struct clk *clk_pix;
	73	struct clk *clk_tmds;
	74	struct clk *clk_phy;
	75	struct clk *clk_audio;
	76	int irq;
	77	u32 irq_status;
	78	struct hdmi_phy_ops *phy_ops;
	79	bool enabled;
5402626c BG	80	bool hpd;
	81	wait_queue_head_t wait_event;
	82	bool event_received;
	83	struct reset_control *reset;
41a14623	84	struct i2c_adapter *ddc_adapt;
5671cefb	85	enum hdmi_colorspace colorspace;
97d7c576	86	bool hdmi_monitor;
2c348e50 AP	87	struct platform_device *audio_pdev;
	88	struct hdmi_audio_params audio;
	89	struct drm_connector *drm_connector;
bca55958	90	struct cec_notifier *notifier;
5402626c BG	91	};
	92
	93	u32 hdmi_read(struct sti_hdmi *hdmi, int offset);
	94	void hdmi_write(struct sti_hdmi *hdmi, u32 val, int offset);
	95
	96	/**
	97	* hdmi phy config structure
	98	*
	99	* A pointer to an array of these structures is passed to a TMDS (HDMI) output
	100	* via the control interface to provide board and SoC specific
	101	* configurations of the HDMI PHY. Each entry in the array specifies a hardware
	102	* specific configuration for a given TMDS clock frequency range.
	103	*
	104	* @min_tmds_freq: Lower bound of TMDS clock frequency this entry applies to
	105	* @max_tmds_freq: Upper bound of TMDS clock frequency this entry applies to
	106	* @config: SoC specific register configuration
	107	*/
	108	struct hdmi_phy_config {
	109	u32 min_tmds_freq;
	110	u32 max_tmds_freq;
	111	u32 config[4];
	112	};
	113
	114	#endif