[linux-2.6-block.git] / drivers / gpu / drm / sti / sti_cursor.c

/*
 * Copyright (C) STMicroelectronics SA 2014
 * Authors: Vincent Abriou <vincent.abriou@st.com>
 *          Fabien Dessenne <fabien.dessenne@st.com>
 *          for STMicroelectronics.
 * License terms:  GNU General Public License (GPL), version 2
 */

#include <linux/seq_file.h>

#include <drm/drm_atomic.h>
#include <drm/drm_fb_cma_helper.h>
#include <drm/drm_gem_cma_helper.h>

#include "sti_compositor.h"
#include "sti_cursor.h"
#include "sti_plane.h"
#include "sti_vtg.h"

/* Registers */
#define CUR_CTL             0x00
#define CUR_VPO             0x0C
#define CUR_PML             0x14
#define CUR_PMP             0x18
#define CUR_SIZE            0x1C
#define CUR_CML             0x20
#define CUR_AWS             0x28
#define CUR_AWE             0x2C

#define CUR_CTL_CLUT_UPDATE BIT(1)

#define STI_CURS_MIN_SIZE   1
#define STI_CURS_MAX_SIZE   128

/*
 * pixmap dma buffer structure
 *
 * @paddr:  physical address
 * @size:   buffer size
 * @base:   virtual address
 */
struct dma_pixmap {
	dma_addr_t paddr;
	size_t size;
	void *base;
};

/**
 * STI Cursor structure
 *
 * @sti_plane:    sti_plane structure
 * @dev:          driver device
 * @regs:         cursor registers
 * @width:        cursor width
 * @height:       cursor height
 * @clut:         color look up table
 * @clut_paddr:   color look up table physical address
 * @pixmap:       pixmap dma buffer (clut8-format cursor)
 */
struct sti_cursor {
	struct sti_plane plane;
	struct device *dev;
	void __iomem *regs;
	unsigned int width;
	unsigned int height;
	unsigned short *clut;
	dma_addr_t clut_paddr;
	struct dma_pixmap pixmap;
};

static const uint32_t cursor_supported_formats[] = {
	DRM_FORMAT_ARGB8888,
};

#define to_sti_cursor(x) container_of(x, struct sti_cursor, plane)

#define DBGFS_DUMP(reg) seq_printf(s, "\n  %-25s 0x%08X", #reg, \
				   readl(cursor->regs + reg))

static void cursor_dbg_vpo(struct seq_file *s, u32 val)
{
	seq_printf(s, "\txdo:%4d\tydo:%4d", val & 0x0FFF, (val >> 16) & 0x0FFF);
}

static void cursor_dbg_size(struct seq_file *s, u32 val)
{
	seq_printf(s, "\t%d x %d", val & 0x07FF, (val >> 16) & 0x07FF);
}

static void cursor_dbg_pml(struct seq_file *s,
			   struct sti_cursor *cursor, u32 val)
{
	if (cursor->pixmap.paddr == val)
		seq_printf(s, "\tVirt @: %p", cursor->pixmap.base);
}

static void cursor_dbg_cml(struct seq_file *s,
			   struct sti_cursor *cursor, u32 val)
{
	if (cursor->clut_paddr == val)
		seq_printf(s, "\tVirt @: %p", cursor->clut);
}

static int cursor_dbg_show(struct seq_file *s, void *data)
{
	struct drm_info_node *node = s->private;
	struct sti_cursor *cursor = (struct sti_cursor *)node->info_ent->data;

	seq_printf(s, "%s: (vaddr = 0x%p)",
		   sti_plane_to_str(&cursor->plane), cursor->regs);

	DBGFS_DUMP(CUR_CTL);
	DBGFS_DUMP(CUR_VPO);
	cursor_dbg_vpo(s, readl(cursor->regs + CUR_VPO));
	DBGFS_DUMP(CUR_PML);
	cursor_dbg_pml(s, cursor, readl(cursor->regs + CUR_PML));
	DBGFS_DUMP(CUR_PMP);
	DBGFS_DUMP(CUR_SIZE);
	cursor_dbg_size(s, readl(cursor->regs + CUR_SIZE));
	DBGFS_DUMP(CUR_CML);
	cursor_dbg_cml(s, cursor, readl(cursor->regs + CUR_CML));
	DBGFS_DUMP(CUR_AWS);
	DBGFS_DUMP(CUR_AWE);
	seq_putc(s, '\n');
	return 0;
}

static struct drm_info_list cursor_debugfs_files[] = {
	{ "cursor", cursor_dbg_show, 0, NULL },
};

static int cursor_debugfs_init(struct sti_cursor *cursor,
			       struct drm_minor *minor)
{
	unsigned int i;

	for (i = 0; i < ARRAY_SIZE(cursor_debugfs_files); i++)
		cursor_debugfs_files[i].data = cursor;

	return drm_debugfs_create_files(cursor_debugfs_files,
					ARRAY_SIZE(cursor_debugfs_files),
					minor->debugfs_root, minor);
}

static void sti_cursor_argb8888_to_clut8(struct sti_cursor *cursor, u32 *src)
{
	u8  *dst = cursor->pixmap.base;
	unsigned int i, j;
	u32 a, r, g, b;

	for (i = 0; i < cursor->height; i++) {
		for (j = 0; j < cursor->width; j++) {
			/* Pick the 2 higher bits of each component */
			a = (*src >> 30) & 3;
			r = (*src >> 22) & 3;
			g = (*src >> 14) & 3;
			b = (*src >> 6) & 3;
			*dst = a << 6 | r << 4 | g << 2 | b;
			src++;
			dst++;
		}
	}
}

static void sti_cursor_init(struct sti_cursor *cursor)
{
	unsigned short *base = cursor->clut;
	unsigned int a, r, g, b;

	/* Assign CLUT values, ARGB444 format */
	for (a = 0; a < 4; a++)
		for (r = 0; r < 4; r++)
			for (g = 0; g < 4; g++)
				for (b = 0; b < 4; b++)
					*base++ = (a * 5) << 12 |
						  (r * 5) << 8 |
						  (g * 5) << 4 |
						  (b * 5);
}

static int sti_cursor_atomic_check(struct drm_plane *drm_plane,
				   struct drm_plane_state *state)
{
	struct sti_plane *plane = to_sti_plane(drm_plane);
	struct sti_cursor *cursor = to_sti_cursor(plane);
	struct drm_crtc *crtc = state->crtc;
	struct drm_framebuffer *fb = state->fb;
	struct drm_crtc_state *crtc_state;
	struct drm_display_mode *mode;
	int dst_x, dst_y, dst_w, dst_h;
	int src_w, src_h;

	/* no need for further checks if the plane is being disabled */
	if (!crtc || !fb)
		return 0;

	crtc_state = drm_atomic_get_crtc_state(state->state, crtc);
	mode = &crtc_state->mode;
	dst_x = state->crtc_x;
	dst_y = state->crtc_y;
	dst_w = clamp_val(state->crtc_w, 0, mode->crtc_hdisplay - dst_x);
	dst_h = clamp_val(state->crtc_h, 0, mode->crtc_vdisplay - dst_y);
	/* src_x are in 16.16 format */
	src_w = state->src_w >> 16;
	src_h = state->src_h >> 16;

	if (src_w < STI_CURS_MIN_SIZE ||
	    src_h < STI_CURS_MIN_SIZE ||
	    src_w > STI_CURS_MAX_SIZE ||
	    src_h > STI_CURS_MAX_SIZE) {
		DRM_ERROR("Invalid cursor size (%dx%d)\n",
				src_w, src_h);
		return -EINVAL;
	}

	/* If the cursor size has changed, re-allocated the pixmap */
	if (!cursor->pixmap.base ||
	    (cursor->width != src_w) ||
	    (cursor->height != src_h)) {
		cursor->width = src_w;
		cursor->height = src_h;

		if (cursor->pixmap.base)
			dma_free_wc(cursor->dev, cursor->pixmap.size,
				    cursor->pixmap.base, cursor->pixmap.paddr);

		cursor->pixmap.size = cursor->width * cursor->height;

		cursor->pixmap.base = dma_alloc_wc(cursor->dev,
						   cursor->pixmap.size,
						   &cursor->pixmap.paddr,
						   GFP_KERNEL | GFP_DMA);
		if (!cursor->pixmap.base) {
			DRM_ERROR("Failed to allocate memory for pixmap\n");
			return -EINVAL;
		}
	}

	if (!drm_fb_cma_get_gem_obj(fb, 0)) {
		DRM_ERROR("Can't get CMA GEM object for fb\n");
		return -EINVAL;
	}

	DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n",
		      crtc->base.id, sti_mixer_to_str(to_sti_mixer(crtc)),
		      drm_plane->base.id, sti_plane_to_str(plane));
	DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y);

	return 0;
}

static void sti_cursor_atomic_update(struct drm_plane *drm_plane,
				     struct drm_plane_state *oldstate)
{
	struct drm_plane_state *state = drm_plane->state;
	struct sti_plane *plane = to_sti_plane(drm_plane);
	struct sti_cursor *cursor = to_sti_cursor(plane);
	struct drm_crtc *crtc = state->crtc;
	struct drm_framebuffer *fb = state->fb;
	struct drm_display_mode *mode;
	int dst_x, dst_y;
	struct drm_gem_cma_object *cma_obj;
	u32 y, x;
	u32 val;

	if (!crtc || !fb)
		return;

	mode = &crtc->mode;
	dst_x = state->crtc_x;
	dst_y = state->crtc_y;

	cma_obj = drm_fb_cma_get_gem_obj(fb, 0);

	/* Convert ARGB8888 to CLUT8 */
	sti_cursor_argb8888_to_clut8(cursor, (u32 *)cma_obj->vaddr);

	/* AWS and AWE depend on the mode */
	y = sti_vtg_get_line_number(*mode, 0);
	x = sti_vtg_get_pixel_number(*mode, 0);
	val = y << 16 | x;
	writel(val, cursor->regs + CUR_AWS);
	y = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);
	x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);
	val = y << 16 | x;
	writel(val, cursor->regs + CUR_AWE);

	/* Set memory location, size, and position */
	writel(cursor->pixmap.paddr, cursor->regs + CUR_PML);
	writel(cursor->width, cursor->regs + CUR_PMP);
	writel(cursor->height << 16 | cursor->width, cursor->regs + CUR_SIZE);

	y = sti_vtg_get_line_number(*mode, dst_y);
	x = sti_vtg_get_pixel_number(*mode, dst_x);
	writel((y << 16) | x, cursor->regs + CUR_VPO);

	/* Set and fetch CLUT */
	writel(cursor->clut_paddr, cursor->regs + CUR_CML);
	writel(CUR_CTL_CLUT_UPDATE, cursor->regs + CUR_CTL);

	sti_plane_update_fps(plane, true, false);

	plane->status = STI_PLANE_UPDATED;
}

static void sti_cursor_atomic_disable(struct drm_plane *drm_plane,
				      struct drm_plane_state *oldstate)
{
	struct sti_plane *plane = to_sti_plane(drm_plane);

	if (!oldstate->crtc) {
		DRM_DEBUG_DRIVER("drm plane:%d not enabled\n",
				 drm_plane->base.id);
		return;
	}

	DRM_DEBUG_DRIVER("CRTC:%d (%s) drm plane:%d (%s)\n",
			 oldstate->crtc->base.id,
			 sti_mixer_to_str(to_sti_mixer(oldstate->crtc)),
			 drm_plane->base.id, sti_plane_to_str(plane));

	plane->status = STI_PLANE_DISABLING;
}

static const struct drm_plane_helper_funcs sti_cursor_helpers_funcs = {
	.atomic_check = sti_cursor_atomic_check,
	.atomic_update = sti_cursor_atomic_update,
	.atomic_disable = sti_cursor_atomic_disable,
};

static void sti_cursor_destroy(struct drm_plane *drm_plane)
{
	DRM_DEBUG_DRIVER("\n");

	drm_plane_helper_disable(drm_plane);
	drm_plane_cleanup(drm_plane);
}

static int sti_cursor_late_register(struct drm_plane *drm_plane)
{
	struct sti_plane *plane = to_sti_plane(drm_plane);
	struct sti_cursor *cursor = to_sti_cursor(plane);

	return cursor_debugfs_init(cursor, drm_plane->dev->primary);
}

static const struct drm_plane_funcs sti_cursor_plane_helpers_funcs = {
	.update_plane = drm_atomic_helper_update_plane,
	.disable_plane = drm_atomic_helper_disable_plane,
	.destroy = sti_cursor_destroy,
	.set_property = drm_atomic_helper_plane_set_property,
	.reset = sti_plane_reset,
	.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
	.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
	.late_register = sti_cursor_late_register,
};

struct drm_plane *sti_cursor_create(struct drm_device *drm_dev,
				    struct device *dev, int desc,
				    void __iomem *baseaddr,
				    unsigned int possible_crtcs)
{
	struct sti_cursor *cursor;
	size_t size;
	int res;

	cursor = devm_kzalloc(dev, sizeof(*cursor), GFP_KERNEL);
	if (!cursor) {
		DRM_ERROR("Failed to allocate memory for cursor\n");
		return NULL;
	}

	/* Allocate clut buffer */
	size = 0x100 * sizeof(unsigned short);
	cursor->clut = dma_alloc_wc(dev, size, &cursor->clut_paddr,
				    GFP_KERNEL | GFP_DMA);

	if (!cursor->clut) {
		DRM_ERROR("Failed to allocate memory for cursor clut\n");
		goto err_clut;
	}

	cursor->dev = dev;
	cursor->regs = baseaddr;
	cursor->plane.desc = desc;
	cursor->plane.status = STI_PLANE_DISABLED;

	sti_cursor_init(cursor);

	res = drm_universal_plane_init(drm_dev, &cursor->plane.drm_plane,
				       possible_crtcs,
				       &sti_cursor_plane_helpers_funcs,
				       cursor_supported_formats,
				       ARRAY_SIZE(cursor_supported_formats),
				       NULL, DRM_PLANE_TYPE_CURSOR, NULL);
	if (res) {
		DRM_ERROR("Failed to initialize universal plane\n");
		goto err_plane;
	}

	drm_plane_helper_add(&cursor->plane.drm_plane,
			     &sti_cursor_helpers_funcs);

	sti_plane_init_property(&cursor->plane, DRM_PLANE_TYPE_CURSOR);

	return &cursor->plane.drm_plane;

err_plane:
	dma_free_wc(dev, size, cursor->clut, cursor->clut_paddr);
err_clut:
	devm_kfree(dev, cursor);
	return NULL;
}
Commit	Line	Data
96006a77 BG	1	/*
	2	* Copyright (C) STMicroelectronics SA 2014
	3	* Authors: Vincent Abriou <vincent.abriou@st.com>
	4	* Fabien Dessenne <fabien.dessenne@st.com>
	5	* for STMicroelectronics.
	6	* License terms: GNU General Public License (GPL), version 2
	7	*/
96006a77	8
0f3e1561 AB	9	#include <linux/seq_file.h>
0f3e1561 AB	10
dd86dc2f	11	#include <drm/drm_atomic.h>
29d1dc62 VA	12	#include <drm/drm_fb_cma_helper.h>
29d1dc62 VA	13	#include <drm/drm_gem_cma_helper.h>
29d1dc62 VA	14
29d1dc62 VA	15	#include "sti_compositor.h"
96006a77	16	#include "sti_cursor.h"
9e1f05b2	17	#include "sti_plane.h"
96006a77 BG	18	#include "sti_vtg.h"
	19
	20	/* Registers */
	21	#define CUR_CTL 0x00
	22	#define CUR_VPO 0x0C
	23	#define CUR_PML 0x14
	24	#define CUR_PMP 0x18
	25	#define CUR_SIZE 0x1C
	26	#define CUR_CML 0x20
	27	#define CUR_AWS 0x28
	28	#define CUR_AWE 0x2C
	29
	30	#define CUR_CTL_CLUT_UPDATE BIT(1)
	31
	32	#define STI_CURS_MIN_SIZE 1
	33	#define STI_CURS_MAX_SIZE 128
	34
	35	/*
e1a22f90	36	* pixmap dma buffer structure
96006a77 BG	37	*
	38	* @paddr: physical address
	39	* @size: buffer size
	40	* @base: virtual address
	41	*/
	42	struct dma_pixmap {
	43	dma_addr_t paddr;
	44	size_t size;
	45	void *base;
	46	};
	47
	48	/**
	49	* STI Cursor structure
	50	*
29d1dc62 VA	51	* @sti_plane: sti_plane structure
	52	* @dev: driver device
	53	* @regs: cursor registers
	54	* @width: cursor width
	55	* @height: cursor height
	56	* @clut: color look up table
	57	* @clut_paddr: color look up table physical address
	58	* @pixmap: pixmap dma buffer (clut8-format cursor)
96006a77 BG	59	*/
96006a77 BG	60	struct sti_cursor {
871bcdfe VA	61	struct sti_plane plane;
	62	struct device *dev;
	63	void __iomem *regs;
96006a77 BG	64	unsigned int width;
	65	unsigned int height;
	66	unsigned short *clut;
	67	dma_addr_t clut_paddr;
	68	struct dma_pixmap pixmap;
	69	};
	70
	71	static const uint32_t cursor_supported_formats[] = {
	72	DRM_FORMAT_ARGB8888,
	73	};
	74
871bcdfe	75	#define to_sti_cursor(x) container_of(x, struct sti_cursor, plane)
96006a77	76
f46f3beb VA	77	#define DBGFS_DUMP(reg) seq_printf(s, "\n %-25s 0x%08X", #reg, \
	78	readl(cursor->regs + reg))
	79
	80	static void cursor_dbg_vpo(struct seq_file *s, u32 val)
	81	{
	82	seq_printf(s, "\txdo:%4d\tydo:%4d", val & 0x0FFF, (val >> 16) & 0x0FFF);
	83	}
	84
	85	static void cursor_dbg_size(struct seq_file *s, u32 val)
	86	{
	87	seq_printf(s, "\t%d x %d", val & 0x07FF, (val >> 16) & 0x07FF);
	88	}
	89
	90	static void cursor_dbg_pml(struct seq_file *s,
	91	struct sti_cursor *cursor, u32 val)
	92	{
	93	if (cursor->pixmap.paddr == val)
	94	seq_printf(s, "\tVirt @: %p", cursor->pixmap.base);
	95	}
	96
	97	static void cursor_dbg_cml(struct seq_file *s,
	98	struct sti_cursor *cursor, u32 val)
	99	{
	100	if (cursor->clut_paddr == val)
	101	seq_printf(s, "\tVirt @: %p", cursor->clut);
	102	}
	103
	104	static int cursor_dbg_show(struct seq_file s, void data)
	105	{
	106	struct drm_info_node *node = s->private;
	107	struct sti_cursor cursor = (struct sti_cursor )node->info_ent->data;
f46f3beb VA	108
	109	seq_printf(s, "%s: (vaddr = 0x%p)",
	110	sti_plane_to_str(&cursor->plane), cursor->regs);
	111
	112	DBGFS_DUMP(CUR_CTL);
	113	DBGFS_DUMP(CUR_VPO);
	114	cursor_dbg_vpo(s, readl(cursor->regs + CUR_VPO));
	115	DBGFS_DUMP(CUR_PML);
	116	cursor_dbg_pml(s, cursor, readl(cursor->regs + CUR_PML));
	117	DBGFS_DUMP(CUR_PMP);
	118	DBGFS_DUMP(CUR_SIZE);
	119	cursor_dbg_size(s, readl(cursor->regs + CUR_SIZE));
	120	DBGFS_DUMP(CUR_CML);
	121	cursor_dbg_cml(s, cursor, readl(cursor->regs + CUR_CML));
	122	DBGFS_DUMP(CUR_AWS);
	123	DBGFS_DUMP(CUR_AWE);
e9635133	124	seq_putc(s, '\n');
f46f3beb VA	125	return 0;
	126	}
	127
	128	static struct drm_info_list cursor_debugfs_files[] = {
	129	{ "cursor", cursor_dbg_show, 0, NULL },
	130	};
	131
	132	static int cursor_debugfs_init(struct sti_cursor *cursor,
	133	struct drm_minor *minor)
	134	{
	135	unsigned int i;
	136
	137	for (i = 0; i < ARRAY_SIZE(cursor_debugfs_files); i++)
	138	cursor_debugfs_files[i].data = cursor;
	139
	140	return drm_debugfs_create_files(cursor_debugfs_files,
	141	ARRAY_SIZE(cursor_debugfs_files),
	142	minor->debugfs_root, minor);
	143	}
	144
29d1dc62	145	static void sti_cursor_argb8888_to_clut8(struct sti_cursor cursor, u32 src)
96006a77	146	{
96006a77 BG	147	u8 *dst = cursor->pixmap.base;
	148	unsigned int i, j;
	149	u32 a, r, g, b;
	150
	151	for (i = 0; i < cursor->height; i++) {
	152	for (j = 0; j < cursor->width; j++) {
	153	/* Pick the 2 higher bits of each component */
	154	a = (*src >> 30) & 3;
	155	r = (*src >> 22) & 3;
	156	g = (*src >> 14) & 3;
	157	b = (*src >> 6) & 3;
	158	*dst = a << 6 \| r << 4 \| g << 2 \| b;
	159	src++;
	160	dst++;
	161	}
	162	}
	163	}
	164
29d1dc62 VA	165	static void sti_cursor_init(struct sti_cursor *cursor)
	166	{
	167	unsigned short *base = cursor->clut;
	168	unsigned int a, r, g, b;
	169
	170	/* Assign CLUT values, ARGB444 format */
	171	for (a = 0; a < 4; a++)
	172	for (r = 0; r < 4; r++)
	173	for (g = 0; g < 4; g++)
	174	for (b = 0; b < 4; b++)
	175	base++ = (a 5) << 12 \|
	176	(r * 5) << 8 \|
	177	(g * 5) << 4 \|
	178	(b * 5);
	179	}
	180
dd86dc2f VA	181	static int sti_cursor_atomic_check(struct drm_plane *drm_plane,
dd86dc2f VA	182	struct drm_plane_state *state)
96006a77	183	{
29d1dc62	184	struct sti_plane *plane = to_sti_plane(drm_plane);
871bcdfe	185	struct sti_cursor *cursor = to_sti_cursor(plane);
29d1dc62	186	struct drm_crtc *crtc = state->crtc;
29d1dc62	187	struct drm_framebuffer *fb = state->fb;
dd86dc2f VA	188	struct drm_crtc_state *crtc_state;
	189	struct drm_display_mode *mode;
	190	int dst_x, dst_y, dst_w, dst_h;
	191	int src_w, src_h;
	192
	193	/* no need for further checks if the plane is being disabled */
	194	if (!crtc \|\| !fb)
	195	return 0;
	196
	197	crtc_state = drm_atomic_get_crtc_state(state->state, crtc);
	198	mode = &crtc_state->mode;
	199	dst_x = state->crtc_x;
	200	dst_y = state->crtc_y;
	201	dst_w = clamp_val(state->crtc_w, 0, mode->crtc_hdisplay - dst_x);
	202	dst_h = clamp_val(state->crtc_h, 0, mode->crtc_vdisplay - dst_y);
29d1dc62	203	/* src_x are in 16.16 format */
dd86dc2f VA	204	src_w = state->src_w >> 16;
dd86dc2f VA	205	src_h = state->src_h >> 16;
96006a77	206
29d1dc62 VA	207	if (src_w < STI_CURS_MIN_SIZE \|\|
	208	src_h < STI_CURS_MIN_SIZE \|\|
	209	src_w > STI_CURS_MAX_SIZE \|\|
	210	src_h > STI_CURS_MAX_SIZE) {
96006a77	211	DRM_ERROR("Invalid cursor size (%dx%d)\n",
29d1dc62	212	src_w, src_h);
dd86dc2f	213	return -EINVAL;
96006a77 BG	214	}
	215
	216	/* If the cursor size has changed, re-allocated the pixmap */
	217	if (!cursor->pixmap.base \|\|
29d1dc62 VA	218	(cursor->width != src_w) \|\|
	219	(cursor->height != src_h)) {
	220	cursor->width = src_w;
	221	cursor->height = src_h;
96006a77 BG	222
96006a77 BG	223	if (cursor->pixmap.base)
f6e45661 LR	224	dma_free_wc(cursor->dev, cursor->pixmap.size,
f6e45661 LR	225	cursor->pixmap.base, cursor->pixmap.paddr);
96006a77 BG	226
	227	cursor->pixmap.size = cursor->width * cursor->height;
	228
f6e45661 LR	229	cursor->pixmap.base = dma_alloc_wc(cursor->dev,
	230	cursor->pixmap.size,
	231	&cursor->pixmap.paddr,
	232	GFP_KERNEL \| GFP_DMA);
96006a77 BG	233	if (!cursor->pixmap.base) {
96006a77 BG	234	DRM_ERROR("Failed to allocate memory for pixmap\n");
dd86dc2f	235	return -EINVAL;
96006a77 BG	236	}
	237	}
	238
dd86dc2f	239	if (!drm_fb_cma_get_gem_obj(fb, 0)) {
29d1dc62	240	DRM_ERROR("Can't get CMA GEM object for fb\n");
dd86dc2f	241	return -EINVAL;
29d1dc62 VA	242	}
29d1dc62 VA	243
dd86dc2f VA	244	DRM_DEBUG_KMS("CRTC:%d (%s) drm plane:%d (%s)\n",
	245	crtc->base.id, sti_mixer_to_str(to_sti_mixer(crtc)),
	246	drm_plane->base.id, sti_plane_to_str(plane));
	247	DRM_DEBUG_KMS("(%dx%d)@(%d,%d)\n", dst_w, dst_h, dst_x, dst_y);
	248
	249	return 0;
	250	}
	251
	252	static void sti_cursor_atomic_update(struct drm_plane *drm_plane,
	253	struct drm_plane_state *oldstate)
	254	{
	255	struct drm_plane_state *state = drm_plane->state;
	256	struct sti_plane *plane = to_sti_plane(drm_plane);
	257	struct sti_cursor *cursor = to_sti_cursor(plane);
	258	struct drm_crtc *crtc = state->crtc;
	259	struct drm_framebuffer *fb = state->fb;
	260	struct drm_display_mode *mode;
	261	int dst_x, dst_y;
	262	struct drm_gem_cma_object *cma_obj;
	263	u32 y, x;
	264	u32 val;
	265
	266	if (!crtc \|\| !fb)
	267	return;
	268
	269	mode = &crtc->mode;
	270	dst_x = state->crtc_x;
	271	dst_y = state->crtc_y;
	272
	273	cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
	274
96006a77	275	/* Convert ARGB8888 to CLUT8 */
29d1dc62	276	sti_cursor_argb8888_to_clut8(cursor, (u32 *)cma_obj->vaddr);
96006a77 BG	277
	278	/* AWS and AWE depend on the mode */
	279	y = sti_vtg_get_line_number(*mode, 0);
	280	x = sti_vtg_get_pixel_number(*mode, 0);
	281	val = y << 16 \| x;
871bcdfe	282	writel(val, cursor->regs + CUR_AWS);
96006a77 BG	283	y = sti_vtg_get_line_number(*mode, mode->vdisplay - 1);
	284	x = sti_vtg_get_pixel_number(*mode, mode->hdisplay - 1);
	285	val = y << 16 \| x;
871bcdfe	286	writel(val, cursor->regs + CUR_AWE);
96006a77	287
96006a77	288	/* Set memory location, size, and position */
871bcdfe VA	289	writel(cursor->pixmap.paddr, cursor->regs + CUR_PML);
	290	writel(cursor->width, cursor->regs + CUR_PMP);
	291	writel(cursor->height << 16 \| cursor->width, cursor->regs + CUR_SIZE);
96006a77	292
29d1dc62	293	y = sti_vtg_get_line_number(*mode, dst_y);
b83a8b53	294	x = sti_vtg_get_pixel_number(*mode, dst_x);
29d1dc62	295	writel((y << 16) \| x, cursor->regs + CUR_VPO);
96006a77	296
0b9d0416 FD	297	/* Set and fetch CLUT */
	298	writel(cursor->clut_paddr, cursor->regs + CUR_CML);
	299	writel(CUR_CTL_CLUT_UPDATE, cursor->regs + CUR_CTL);
	300
bf8f9e4a VA	301	sti_plane_update_fps(plane, true, false);
bf8f9e4a VA	302
29d1dc62	303	plane->status = STI_PLANE_UPDATED;
96006a77 BG	304	}
96006a77 BG	305
29d1dc62 VA	306	static void sti_cursor_atomic_disable(struct drm_plane *drm_plane,
29d1dc62 VA	307	struct drm_plane_state *oldstate)
96006a77	308	{
29d1dc62	309	struct sti_plane *plane = to_sti_plane(drm_plane);
96006a77	310
5552aad3	311	if (!oldstate->crtc) {
29d1dc62 VA	312	DRM_DEBUG_DRIVER("drm plane:%d not enabled\n",
	313	drm_plane->base.id);
	314	return;
	315	}
96006a77	316
29d1dc62	317	DRM_DEBUG_DRIVER("CRTC:%d (%s) drm plane:%d (%s)\n",
5552aad3 FD	318	oldstate->crtc->base.id,
5552aad3 FD	319	sti_mixer_to_str(to_sti_mixer(oldstate->crtc)),
29d1dc62 VA	320	drm_plane->base.id, sti_plane_to_str(plane));
	321
	322	plane->status = STI_PLANE_DISABLING;
96006a77 BG	323	}
96006a77 BG	324
29d1dc62	325	static const struct drm_plane_helper_funcs sti_cursor_helpers_funcs = {
dd86dc2f	326	.atomic_check = sti_cursor_atomic_check,
29d1dc62 VA	327	.atomic_update = sti_cursor_atomic_update,
29d1dc62 VA	328	.atomic_disable = sti_cursor_atomic_disable,
96006a77 BG	329	};
96006a77 BG	330
83af0a48 BG	331	static void sti_cursor_destroy(struct drm_plane *drm_plane)
	332	{
	333	DRM_DEBUG_DRIVER("\n");
	334
	335	drm_plane_helper_disable(drm_plane);
	336	drm_plane_cleanup(drm_plane);
	337	}
	338
	339	static int sti_cursor_late_register(struct drm_plane *drm_plane)
	340	{
	341	struct sti_plane *plane = to_sti_plane(drm_plane);
	342	struct sti_cursor *cursor = to_sti_cursor(plane);
	343
	344	return cursor_debugfs_init(cursor, drm_plane->dev->primary);
	345	}
	346
bdfd36ef	347	static const struct drm_plane_funcs sti_cursor_plane_helpers_funcs = {
83af0a48 BG	348	.update_plane = drm_atomic_helper_update_plane,
	349	.disable_plane = drm_atomic_helper_disable_plane,
	350	.destroy = sti_cursor_destroy,
bbd1e3a5 BG	351	.set_property = drm_atomic_helper_plane_set_property,
bbd1e3a5 BG	352	.reset = sti_plane_reset,
83af0a48 BG	353	.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
	354	.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
	355	.late_register = sti_cursor_late_register,
	356	};
	357
29d1dc62 VA	358	struct drm_plane sti_cursor_create(struct drm_device drm_dev,
	359	struct device *dev, int desc,
	360	void __iomem *baseaddr,
	361	unsigned int possible_crtcs)
96006a77 BG	362	{
96006a77 BG	363	struct sti_cursor *cursor;
29d1dc62 VA	364	size_t size;
29d1dc62 VA	365	int res;
96006a77 BG	366
	367	cursor = devm_kzalloc(dev, sizeof(*cursor), GFP_KERNEL);
	368	if (!cursor) {
	369	DRM_ERROR("Failed to allocate memory for cursor\n");
	370	return NULL;
	371	}
	372
	373	/* Allocate clut buffer */
29d1dc62	374	size = 0x100 * sizeof(unsigned short);
f6e45661 LR	375	cursor->clut = dma_alloc_wc(dev, size, &cursor->clut_paddr,
f6e45661 LR	376	GFP_KERNEL \| GFP_DMA);
96006a77 BG	377
	378	if (!cursor->clut) {
	379	DRM_ERROR("Failed to allocate memory for cursor clut\n");
29d1dc62	380	goto err_clut;
96006a77 BG	381	}
96006a77 BG	382
871bcdfe VA	383	cursor->dev = dev;
	384	cursor->regs = baseaddr;
	385	cursor->plane.desc = desc;
29d1dc62	386	cursor->plane.status = STI_PLANE_DISABLED;
96006a77	387
871bcdfe VA	388	sti_cursor_init(cursor);
871bcdfe VA	389
29d1dc62 VA	390	res = drm_universal_plane_init(drm_dev, &cursor->plane.drm_plane,
29d1dc62 VA	391	possible_crtcs,
83af0a48	392	&sti_cursor_plane_helpers_funcs,
29d1dc62 VA	393	cursor_supported_formats,
29d1dc62 VA	394	ARRAY_SIZE(cursor_supported_formats),
e6fc3b68	395	NULL, DRM_PLANE_TYPE_CURSOR, NULL);
29d1dc62 VA	396	if (res) {
	397	DRM_ERROR("Failed to initialize universal plane\n");
	398	goto err_plane;
	399	}
	400
	401	drm_plane_helper_add(&cursor->plane.drm_plane,
	402	&sti_cursor_helpers_funcs);
	403
	404	sti_plane_init_property(&cursor->plane, DRM_PLANE_TYPE_CURSOR);
	405
	406	return &cursor->plane.drm_plane;
	407
	408	err_plane:
f6e45661	409	dma_free_wc(dev, size, cursor->clut, cursor->clut_paddr);
29d1dc62 VA	410	err_clut:
	411	devm_kfree(dev, cursor);
	412	return NULL;
96006a77	413	}