[linux-2.6-block.git] / drivers / gpu / drm / radeon / radeon_prime.c

/*
 * Copyright 2012 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * based on nouveau_prime.c
 *
 * Authors: Alex Deucher
 */

#include <linux/dma-buf.h>

#include <drm/drm_prime.h>
#include <drm/radeon_drm.h>

#include "radeon.h"
#include "radeon_prime.h"

struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj)
{
	struct radeon_bo *bo = gem_to_radeon_bo(obj);

	return drm_prime_pages_to_sg(obj->dev, bo->tbo.ttm->pages,
				     bo->tbo.ttm->num_pages);
}

struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
							struct dma_buf_attachment *attach,
							struct sg_table *sg)
{
	struct dma_resv *resv = attach->dmabuf->resv;
	struct radeon_device *rdev = dev->dev_private;
	struct radeon_bo *bo;
	int ret;

	dma_resv_lock(resv, NULL);
	ret = radeon_bo_create(rdev, attach->dmabuf->size, PAGE_SIZE, false,
			       RADEON_GEM_DOMAIN_GTT, 0, sg, resv, &bo);
	dma_resv_unlock(resv);
	if (ret)
		return ERR_PTR(ret);

	bo->tbo.base.funcs = &radeon_gem_object_funcs;

	mutex_lock(&rdev->gem.mutex);
	list_add_tail(&bo->list, &rdev->gem.objects);
	mutex_unlock(&rdev->gem.mutex);

	bo->prime_shared_count = 1;
	return &bo->tbo.base;
}

int radeon_gem_prime_pin(struct drm_gem_object *obj)
{
	struct radeon_bo *bo = gem_to_radeon_bo(obj);
	int ret = 0;

	ret = radeon_bo_reserve(bo, false);
	if (unlikely(ret != 0))
		return ret;

	/* pin buffer into GTT */
	ret = radeon_bo_pin(bo, RADEON_GEM_DOMAIN_GTT, NULL);
	if (likely(ret == 0))
		bo->prime_shared_count++;

	radeon_bo_unreserve(bo);
	return ret;
}

void radeon_gem_prime_unpin(struct drm_gem_object *obj)
{
	struct radeon_bo *bo = gem_to_radeon_bo(obj);
	int ret = 0;

	ret = radeon_bo_reserve(bo, false);
	if (unlikely(ret != 0))
		return;

	radeon_bo_unpin(bo);
	if (bo->prime_shared_count)
		bo->prime_shared_count--;
	radeon_bo_unreserve(bo);
}


struct dma_buf *radeon_gem_prime_export(struct drm_gem_object *gobj,
					int flags)
{
	struct radeon_bo *bo = gem_to_radeon_bo(gobj);
	if (radeon_ttm_tt_has_userptr(bo->rdev, bo->tbo.ttm))
		return ERR_PTR(-EPERM);
	return drm_gem_prime_export(gobj, flags);
}
Commit	Line	Data
40f5cf99 AD	1	/*
	2	* Copyright 2012 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* based on nouveau_prime.c
	23	*
	24	* Authors: Alex Deucher
	25	*/
40f5cf99	26
b5e9c1a2	27	#include <linux/dma-buf.h>
40f5cf99	28
f9183127 SR	29	#include <drm/drm_prime.h>
	30	#include <drm/radeon_drm.h>
	31
	32	#include "radeon.h"
5acfb44b	33	#include "radeon_prime.h"
f9183127	34
1e6d17a5	35	struct sg_table radeon_gem_prime_get_sg_table(struct drm_gem_object obj)
40f5cf99	36	{
1e6d17a5	37	struct radeon_bo *bo = gem_to_radeon_bo(obj);
40f5cf99	38
e11bfb99 CK	39	return drm_prime_pages_to_sg(obj->dev, bo->tbo.ttm->pages,
e11bfb99 CK	40	bo->tbo.ttm->num_pages);
40f5cf99 AD	41	}
40f5cf99 AD	42
1e6d17a5	43	struct drm_gem_object radeon_gem_prime_import_sg_table(struct drm_device dev,
b5e9c1a2	44	struct dma_buf_attachment *attach,
1e6d17a5	45	struct sg_table *sg)
40f5cf99	46	{
52791eee	47	struct dma_resv *resv = attach->dmabuf->resv;
40f5cf99 AD	48	struct radeon_device *rdev = dev->dev_private;
	49	struct radeon_bo *bo;
	50	int ret;
	51
52791eee	52	dma_resv_lock(resv, NULL);
b5e9c1a2	53	ret = radeon_bo_create(rdev, attach->dmabuf->size, PAGE_SIZE, false,
831b6966	54	RADEON_GEM_DOMAIN_GTT, 0, sg, resv, &bo);
52791eee	55	dma_resv_unlock(resv);
40f5cf99	56	if (ret)
1e6d17a5	57	return ERR_PTR(ret);
40f5cf99	58
a25955ba CK	59	bo->tbo.base.funcs = &radeon_gem_object_funcs;
a25955ba CK	60
40f5cf99 AD	61	mutex_lock(&rdev->gem.mutex);
	62	list_add_tail(&bo->list, &rdev->gem.objects);
	63	mutex_unlock(&rdev->gem.mutex);
	64
0d16d299	65	bo->prime_shared_count = 1;
ce77038f	66	return &bo->tbo.base;
40f5cf99 AD	67	}
40f5cf99 AD	68
1e6d17a5	69	int radeon_gem_prime_pin(struct drm_gem_object *obj)
40f5cf99 AD	70	{
	71	struct radeon_bo *bo = gem_to_radeon_bo(obj);
	72	int ret = 0;
	73
489797d5 DA	74	ret = radeon_bo_reserve(bo, false);
489797d5 DA	75	if (unlikely(ret != 0))
1e6d17a5	76	return ret;
489797d5	77
40f5cf99 AD	78	/* pin buffer into GTT */
40f5cf99 AD	79	ret = radeon_bo_pin(bo, RADEON_GEM_DOMAIN_GTT, NULL);
0d16d299 CJHR	80	if (likely(ret == 0))
	81	bo->prime_shared_count++;
	82
489797d5	83	radeon_bo_unreserve(bo);
280cf211 ML	84	return ret;
	85	}
	86
	87	void radeon_gem_prime_unpin(struct drm_gem_object *obj)
	88	{
	89	struct radeon_bo *bo = gem_to_radeon_bo(obj);
	90	int ret = 0;
40f5cf99	91
280cf211 ML	92	ret = radeon_bo_reserve(bo, false);
	93	if (unlikely(ret != 0))
	94	return;
	95
	96	radeon_bo_unpin(bo);
0d16d299 CJHR	97	if (bo->prime_shared_count)
0d16d299 CJHR	98	bo->prime_shared_count--;
280cf211	99	radeon_bo_unreserve(bo);
40f5cf99	100	}
3aac4502 ML	101
3aac4502 ML	102
e4fa8457	103	struct dma_buf radeon_gem_prime_export(struct drm_gem_object gobj,
f72a113a CK	104	int flags)
	105	{
	106	struct radeon_bo *bo = gem_to_radeon_bo(gobj);
a68bb193	107	if (radeon_ttm_tt_has_userptr(bo->rdev, bo->tbo.ttm))
f72a113a	108	return ERR_PTR(-EPERM);
e4fa8457	109	return drm_gem_prime_export(gobj, flags);
f72a113a	110	}