drm/radeon/dpm/sumo: handle boost states properly when forcing a perf level
[linux-2.6-block.git] / drivers / gpu / drm / radeon / radeon_irq_kms.c
CommitLineData
771fe6b9
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1/*
2 * Copyright 2008 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 * Copyright 2009 Jerome Glisse.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Dave Airlie
25 * Alex Deucher
26 * Jerome Glisse
27 */
760285e7
DH
28#include <drm/drmP.h>
29#include <drm/drm_crtc_helper.h>
30#include <drm/radeon_drm.h>
771fe6b9 31#include "radeon_reg.h"
771fe6b9
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32#include "radeon.h"
33#include "atom.h"
34
fb98257a
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35#define RADEON_WAIT_IDLE_TIMEOUT 200
36
b73ba98d
AD
37/**
38 * radeon_driver_irq_handler_kms - irq handler for KMS
39 *
40 * @DRM_IRQ_ARGS: args
41 *
42 * This is the irq handler for the radeon KMS driver (all asics).
43 * radeon_irq_process is a macro that points to the per-asic
44 * irq handler callback.
45 */
771fe6b9
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46irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS)
47{
48 struct drm_device *dev = (struct drm_device *) arg;
49 struct radeon_device *rdev = dev->dev_private;
50
51 return radeon_irq_process(rdev);
52}
53
d4877cf2
AD
54/*
55 * Handle hotplug events outside the interrupt handler proper.
56 */
b73ba98d
AD
57/**
58 * radeon_hotplug_work_func - display hotplug work handler
59 *
60 * @work: work struct
61 *
62 * This is the hot plug event work handler (all asics).
63 * The work gets scheduled from the irq handler if there
64 * was a hot plug interrupt. It walks the connector table
65 * and calls the hotplug handler for each one, then sends
66 * a drm hotplug event to alert userspace.
67 */
d4877cf2
AD
68static void radeon_hotplug_work_func(struct work_struct *work)
69{
70 struct radeon_device *rdev = container_of(work, struct radeon_device,
71 hotplug_work);
72 struct drm_device *dev = rdev->ddev;
73 struct drm_mode_config *mode_config = &dev->mode_config;
74 struct drm_connector *connector;
75
76 if (mode_config->num_connector) {
77 list_for_each_entry(connector, &mode_config->connector_list, head)
78 radeon_connector_hotplug(connector);
79 }
80 /* Just fire off a uevent and let userspace tell us what to do */
eb1f8e4f 81 drm_helper_hpd_irq_event(dev);
d4877cf2
AD
82}
83
8f61b34c
AD
84/**
85 * radeon_irq_reset_work_func - execute gpu reset
86 *
87 * @work: work struct
88 *
89 * Execute scheduled gpu reset (cayman+).
90 * This function is called when the irq handler
91 * thinks we need a gpu reset.
92 */
93static void radeon_irq_reset_work_func(struct work_struct *work)
94{
95 struct radeon_device *rdev = container_of(work, struct radeon_device,
96 reset_work);
97
98 radeon_gpu_reset(rdev);
99}
100
b73ba98d
AD
101/**
102 * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
103 *
104 * @dev: drm dev pointer
105 *
106 * Gets the hw ready to enable irqs (all asics).
107 * This function disables all interrupt sources on the GPU.
108 */
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109void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
110{
111 struct radeon_device *rdev = dev->dev_private;
fb98257a 112 unsigned long irqflags;
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113 unsigned i;
114
fb98257a 115 spin_lock_irqsave(&rdev->irq.lock, irqflags);
771fe6b9 116 /* Disable *all* interrupts */
1b37078b 117 for (i = 0; i < RADEON_NUM_RINGS; i++)
736fc37f 118 atomic_set(&rdev->irq.ring_int[i], 0);
4a6369e9 119 rdev->irq.dpm_thermal = false;
54bd5206 120 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
9e7b414e 121 rdev->irq.hpd[i] = false;
54bd5206
IH
122 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
123 rdev->irq.crtc_vblank_int[i] = false;
736fc37f 124 atomic_set(&rdev->irq.pflip[i], 0);
f122c610 125 rdev->irq.afmt[i] = false;
6f34be50 126 }
771fe6b9 127 radeon_irq_set(rdev);
fb98257a 128 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
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129 /* Clear bits */
130 radeon_irq_process(rdev);
131}
132
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133/**
134 * radeon_driver_irq_postinstall_kms - drm irq preinstall callback
135 *
136 * @dev: drm dev pointer
137 *
138 * Handles stuff to be done after enabling irqs (all asics).
139 * Returns 0 on success.
140 */
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141int radeon_driver_irq_postinstall_kms(struct drm_device *dev)
142{
771fe6b9 143 dev->max_vblank_count = 0x001fffff;
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144 return 0;
145}
146
b73ba98d
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147/**
148 * radeon_driver_irq_uninstall_kms - drm irq uninstall callback
149 *
150 * @dev: drm dev pointer
151 *
152 * This function disables all interrupt sources on the GPU (all asics).
153 */
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154void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
155{
156 struct radeon_device *rdev = dev->dev_private;
fb98257a 157 unsigned long irqflags;
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158 unsigned i;
159
160 if (rdev == NULL) {
161 return;
162 }
fb98257a 163 spin_lock_irqsave(&rdev->irq.lock, irqflags);
771fe6b9 164 /* Disable *all* interrupts */
1b37078b 165 for (i = 0; i < RADEON_NUM_RINGS; i++)
736fc37f 166 atomic_set(&rdev->irq.ring_int[i], 0);
4a6369e9 167 rdev->irq.dpm_thermal = false;
54bd5206 168 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
003e69f9 169 rdev->irq.hpd[i] = false;
54bd5206
IH
170 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
171 rdev->irq.crtc_vblank_int[i] = false;
736fc37f 172 atomic_set(&rdev->irq.pflip[i], 0);
f122c610 173 rdev->irq.afmt[i] = false;
6f34be50 174 }
771fe6b9 175 radeon_irq_set(rdev);
fb98257a 176 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
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177}
178
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179/**
180 * radeon_msi_ok - asic specific msi checks
181 *
182 * @rdev: radeon device pointer
183 *
184 * Handles asic specific MSI checks to determine if
185 * MSIs should be enabled on a particular chip (all asics).
186 * Returns true if MSIs should be enabled, false if MSIs
187 * should not be enabled.
188 */
8f6c25c5
AD
189static bool radeon_msi_ok(struct radeon_device *rdev)
190{
191 /* RV370/RV380 was first asic with MSI support */
192 if (rdev->family < CHIP_RV380)
193 return false;
194
195 /* MSIs don't work on AGP */
196 if (rdev->flags & RADEON_IS_AGP)
197 return false;
198
a18cee15
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199 /* force MSI on */
200 if (radeon_msi == 1)
201 return true;
202 else if (radeon_msi == 0)
203 return false;
204
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205 /* Quirks */
206 /* HP RS690 only seems to work with MSIs. */
207 if ((rdev->pdev->device == 0x791f) &&
208 (rdev->pdev->subsystem_vendor == 0x103c) &&
209 (rdev->pdev->subsystem_device == 0x30c2))
210 return true;
211
44517c44
AD
212 /* Dell RS690 only seems to work with MSIs. */
213 if ((rdev->pdev->device == 0x791f) &&
214 (rdev->pdev->subsystem_vendor == 0x1028) &&
215 (rdev->pdev->subsystem_device == 0x01fc))
216 return true;
217
01e718ec
AD
218 /* Dell RS690 only seems to work with MSIs. */
219 if ((rdev->pdev->device == 0x791f) &&
220 (rdev->pdev->subsystem_vendor == 0x1028) &&
221 (rdev->pdev->subsystem_device == 0x01fd))
222 return true;
223
3a6d59df
AD
224 /* Gateway RS690 only seems to work with MSIs. */
225 if ((rdev->pdev->device == 0x791f) &&
226 (rdev->pdev->subsystem_vendor == 0x107b) &&
227 (rdev->pdev->subsystem_device == 0x0185))
228 return true;
229
fb6ca6d1
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230 /* try and enable MSIs by default on all RS690s */
231 if (rdev->family == CHIP_RS690)
232 return true;
233
16a5e32b
DA
234 /* RV515 seems to have MSI issues where it loses
235 * MSI rearms occasionally. This leads to lockups and freezes.
236 * disable it by default.
237 */
238 if (rdev->family == CHIP_RV515)
239 return false;
8f6c25c5
AD
240 if (rdev->flags & RADEON_IS_IGP) {
241 /* APUs work fine with MSIs */
242 if (rdev->family >= CHIP_PALM)
243 return true;
244 /* lots of IGPs have problems with MSIs */
245 return false;
246 }
247
248 return true;
249}
250
b73ba98d
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251/**
252 * radeon_irq_kms_init - init driver interrupt info
253 *
254 * @rdev: radeon device pointer
255 *
256 * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics).
257 * Returns 0 for success, error for failure.
258 */
771fe6b9
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259int radeon_irq_kms_init(struct radeon_device *rdev)
260{
261 int r = 0;
262
32c87fca 263 INIT_WORK(&rdev->hotplug_work, radeon_hotplug_work_func);
f122c610 264 INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi);
8f61b34c 265 INIT_WORK(&rdev->reset_work, radeon_irq_reset_work_func);
32c87fca 266
fb98257a 267 spin_lock_init(&rdev->irq.lock);
9e7b414e 268 r = drm_vblank_init(rdev->ddev, rdev->num_crtc);
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269 if (r) {
270 return r;
271 }
3e5cb98d
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272 /* enable msi */
273 rdev->msi_enabled = 0;
8f6c25c5
AD
274
275 if (radeon_msi_ok(rdev)) {
3e5cb98d 276 int ret = pci_enable_msi(rdev->pdev);
d8f60cfc 277 if (!ret) {
3e5cb98d 278 rdev->msi_enabled = 1;
da7be684 279 dev_info(rdev->dev, "radeon: using MSI.\n");
d8f60cfc 280 }
3e5cb98d 281 }
771fe6b9 282 rdev->irq.installed = true;
003e69f9
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283 r = drm_irq_install(rdev->ddev);
284 if (r) {
285 rdev->irq.installed = false;
286 return r;
287 }
771fe6b9
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288 DRM_INFO("radeon: irq initialized.\n");
289 return 0;
290}
291
b73ba98d 292/**
cf2fbdd2 293 * radeon_irq_kms_fini - tear down driver interrupt info
b73ba98d
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294 *
295 * @rdev: radeon device pointer
296 *
297 * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics).
298 */
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299void radeon_irq_kms_fini(struct radeon_device *rdev)
300{
003e69f9 301 drm_vblank_cleanup(rdev->ddev);
771fe6b9 302 if (rdev->irq.installed) {
771fe6b9 303 drm_irq_uninstall(rdev->ddev);
003e69f9 304 rdev->irq.installed = false;
3e5cb98d
AD
305 if (rdev->msi_enabled)
306 pci_disable_msi(rdev->pdev);
771fe6b9 307 }
43829731 308 flush_work(&rdev->hotplug_work);
771fe6b9 309}
1614f8b1 310
b73ba98d
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311/**
312 * radeon_irq_kms_sw_irq_get - enable software interrupt
313 *
314 * @rdev: radeon device pointer
315 * @ring: ring whose interrupt you want to enable
316 *
317 * Enables the software interrupt for a specific ring (all asics).
318 * The software interrupt is generally used to signal a fence on
319 * a particular ring.
320 */
1b37078b 321void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring)
1614f8b1
DA
322{
323 unsigned long irqflags;
324
736fc37f
CK
325 if (!rdev->ddev->irq_enabled)
326 return;
327
328 if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) {
329 spin_lock_irqsave(&rdev->irq.lock, irqflags);
1614f8b1 330 radeon_irq_set(rdev);
736fc37f 331 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
1614f8b1 332 }
1614f8b1
DA
333}
334
b73ba98d
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335/**
336 * radeon_irq_kms_sw_irq_put - disable software interrupt
337 *
338 * @rdev: radeon device pointer
339 * @ring: ring whose interrupt you want to disable
340 *
341 * Disables the software interrupt for a specific ring (all asics).
342 * The software interrupt is generally used to signal a fence on
343 * a particular ring.
344 */
1b37078b 345void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring)
1614f8b1
DA
346{
347 unsigned long irqflags;
348
736fc37f
CK
349 if (!rdev->ddev->irq_enabled)
350 return;
351
352 if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) {
353 spin_lock_irqsave(&rdev->irq.lock, irqflags);
1614f8b1 354 radeon_irq_set(rdev);
736fc37f 355 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
1614f8b1 356 }
1614f8b1
DA
357}
358
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359/**
360 * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt
361 *
362 * @rdev: radeon device pointer
363 * @crtc: crtc whose interrupt you want to enable
364 *
365 * Enables the pageflip interrupt for a specific crtc (all asics).
366 * For pageflips we use the vblank interrupt source.
367 */
6f34be50
AD
368void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc)
369{
370 unsigned long irqflags;
371
372 if (crtc < 0 || crtc >= rdev->num_crtc)
373 return;
374
736fc37f
CK
375 if (!rdev->ddev->irq_enabled)
376 return;
377
378 if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) {
379 spin_lock_irqsave(&rdev->irq.lock, irqflags);
6f34be50 380 radeon_irq_set(rdev);
736fc37f 381 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
6f34be50 382 }
6f34be50
AD
383}
384
b73ba98d
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385/**
386 * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt
387 *
388 * @rdev: radeon device pointer
389 * @crtc: crtc whose interrupt you want to disable
390 *
391 * Disables the pageflip interrupt for a specific crtc (all asics).
392 * For pageflips we use the vblank interrupt source.
393 */
6f34be50
AD
394void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc)
395{
396 unsigned long irqflags;
397
398 if (crtc < 0 || crtc >= rdev->num_crtc)
399 return;
400
736fc37f
CK
401 if (!rdev->ddev->irq_enabled)
402 return;
403
404 if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) {
405 spin_lock_irqsave(&rdev->irq.lock, irqflags);
6f34be50 406 radeon_irq_set(rdev);
736fc37f 407 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
6f34be50 408 }
6f34be50
AD
409}
410
b73ba98d
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411/**
412 * radeon_irq_kms_enable_afmt - enable audio format change interrupt
413 *
414 * @rdev: radeon device pointer
415 * @block: afmt block whose interrupt you want to enable
416 *
417 * Enables the afmt change interrupt for a specific afmt block (all asics).
418 */
fb98257a
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419void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block)
420{
421 unsigned long irqflags;
422
cc9945bf
AD
423 if (!rdev->ddev->irq_enabled)
424 return;
425
fb98257a
CK
426 spin_lock_irqsave(&rdev->irq.lock, irqflags);
427 rdev->irq.afmt[block] = true;
428 radeon_irq_set(rdev);
429 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
430
431}
432
b73ba98d
AD
433/**
434 * radeon_irq_kms_disable_afmt - disable audio format change interrupt
435 *
436 * @rdev: radeon device pointer
437 * @block: afmt block whose interrupt you want to disable
438 *
439 * Disables the afmt change interrupt for a specific afmt block (all asics).
440 */
fb98257a
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441void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block)
442{
443 unsigned long irqflags;
444
cc9945bf
AD
445 if (!rdev->ddev->irq_enabled)
446 return;
447
fb98257a
CK
448 spin_lock_irqsave(&rdev->irq.lock, irqflags);
449 rdev->irq.afmt[block] = false;
450 radeon_irq_set(rdev);
451 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
452}
453
b73ba98d
AD
454/**
455 * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt
456 *
457 * @rdev: radeon device pointer
458 * @hpd_mask: mask of hpd pins you want to enable.
459 *
460 * Enables the hotplug detect interrupt for a specific hpd pin (all asics).
461 */
fb98257a
CK
462void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
463{
464 unsigned long irqflags;
465 int i;
466
cc9945bf
AD
467 if (!rdev->ddev->irq_enabled)
468 return;
469
fb98257a
CK
470 spin_lock_irqsave(&rdev->irq.lock, irqflags);
471 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
472 rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i));
473 radeon_irq_set(rdev);
474 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
475}
476
b73ba98d
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477/**
478 * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt
479 *
480 * @rdev: radeon device pointer
481 * @hpd_mask: mask of hpd pins you want to disable.
482 *
483 * Disables the hotplug detect interrupt for a specific hpd pin (all asics).
484 */
fb98257a
CK
485void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask)
486{
487 unsigned long irqflags;
488 int i;
489
cc9945bf
AD
490 if (!rdev->ddev->irq_enabled)
491 return;
492
fb98257a
CK
493 spin_lock_irqsave(&rdev->irq.lock, irqflags);
494 for (i = 0; i < RADEON_MAX_HPD_PINS; ++i)
495 rdev->irq.hpd[i] &= !(hpd_mask & (1 << i));
496 radeon_irq_set(rdev);
497 spin_unlock_irqrestore(&rdev->irq.lock, irqflags);
498}
499