Commit | Line | Data |
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771fe6b9 JG |
1 | /* |
2 | * Copyright 2008 Advanced Micro Devices, Inc. | |
3 | * Copyright 2008 Red Hat Inc. | |
4 | * Copyright 2009 Jerome Glisse. | |
5 | * | |
6 | * Permission is hereby granted, free of charge, to any person obtaining a | |
7 | * copy of this software and associated documentation files (the "Software"), | |
8 | * to deal in the Software without restriction, including without limitation | |
9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
10 | * and/or sell copies of the Software, and to permit persons to whom the | |
11 | * Software is furnished to do so, subject to the following conditions: | |
12 | * | |
13 | * The above copyright notice and this permission notice shall be included in | |
14 | * all copies or substantial portions of the Software. | |
15 | * | |
16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
19 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
20 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
21 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
22 | * OTHER DEALINGS IN THE SOFTWARE. | |
23 | * | |
24 | * Authors: Dave Airlie | |
25 | * Alex Deucher | |
26 | * Jerome Glisse | |
27 | */ | |
760285e7 DH |
28 | #include <drm/drmP.h> |
29 | #include <drm/drm_crtc_helper.h> | |
30 | #include <drm/radeon_drm.h> | |
771fe6b9 | 31 | #include "radeon_reg.h" |
771fe6b9 JG |
32 | #include "radeon.h" |
33 | #include "atom.h" | |
34 | ||
10ebc0bc DA |
35 | #include <linux/pm_runtime.h> |
36 | ||
fb98257a CK |
37 | #define RADEON_WAIT_IDLE_TIMEOUT 200 |
38 | ||
b73ba98d AD |
39 | /** |
40 | * radeon_driver_irq_handler_kms - irq handler for KMS | |
41 | * | |
e9f0d76f | 42 | * @int irq, void *arg: args |
b73ba98d AD |
43 | * |
44 | * This is the irq handler for the radeon KMS driver (all asics). | |
45 | * radeon_irq_process is a macro that points to the per-asic | |
46 | * irq handler callback. | |
47 | */ | |
e9f0d76f | 48 | irqreturn_t radeon_driver_irq_handler_kms(int irq, void *arg) |
771fe6b9 JG |
49 | { |
50 | struct drm_device *dev = (struct drm_device *) arg; | |
51 | struct radeon_device *rdev = dev->dev_private; | |
10ebc0bc | 52 | irqreturn_t ret; |
771fe6b9 | 53 | |
10ebc0bc DA |
54 | ret = radeon_irq_process(rdev); |
55 | if (ret == IRQ_HANDLED) | |
56 | pm_runtime_mark_last_busy(dev->dev); | |
57 | return ret; | |
771fe6b9 JG |
58 | } |
59 | ||
d4877cf2 AD |
60 | /* |
61 | * Handle hotplug events outside the interrupt handler proper. | |
62 | */ | |
b73ba98d AD |
63 | /** |
64 | * radeon_hotplug_work_func - display hotplug work handler | |
65 | * | |
66 | * @work: work struct | |
67 | * | |
68 | * This is the hot plug event work handler (all asics). | |
69 | * The work gets scheduled from the irq handler if there | |
70 | * was a hot plug interrupt. It walks the connector table | |
71 | * and calls the hotplug handler for each one, then sends | |
72 | * a drm hotplug event to alert userspace. | |
73 | */ | |
d4877cf2 AD |
74 | static void radeon_hotplug_work_func(struct work_struct *work) |
75 | { | |
76 | struct radeon_device *rdev = container_of(work, struct radeon_device, | |
cb5d4166 | 77 | hotplug_work.work); |
d4877cf2 AD |
78 | struct drm_device *dev = rdev->ddev; |
79 | struct drm_mode_config *mode_config = &dev->mode_config; | |
80 | struct drm_connector *connector; | |
81 | ||
7f98ca45 DA |
82 | /* we can race here at startup, some boards seem to trigger |
83 | * hotplug irqs when they shouldn't. */ | |
84 | if (!rdev->mode_info.mode_config_initialized) | |
85 | return; | |
86 | ||
39fa10f7 | 87 | mutex_lock(&mode_config->mutex); |
d4877cf2 AD |
88 | if (mode_config->num_connector) { |
89 | list_for_each_entry(connector, &mode_config->connector_list, head) | |
90 | radeon_connector_hotplug(connector); | |
91 | } | |
39fa10f7 | 92 | mutex_unlock(&mode_config->mutex); |
d4877cf2 | 93 | /* Just fire off a uevent and let userspace tell us what to do */ |
eb1f8e4f | 94 | drm_helper_hpd_irq_event(dev); |
d4877cf2 AD |
95 | } |
96 | ||
de6284aa DA |
97 | static void radeon_dp_work_func(struct work_struct *work) |
98 | { | |
9843ead0 DA |
99 | struct radeon_device *rdev = container_of(work, struct radeon_device, |
100 | dp_work); | |
101 | struct drm_device *dev = rdev->ddev; | |
102 | struct drm_mode_config *mode_config = &dev->mode_config; | |
103 | struct drm_connector *connector; | |
104 | ||
105 | /* this should take a mutex */ | |
106 | if (mode_config->num_connector) { | |
107 | list_for_each_entry(connector, &mode_config->connector_list, head) | |
108 | radeon_connector_hotplug(connector); | |
109 | } | |
de6284aa | 110 | } |
b73ba98d AD |
111 | /** |
112 | * radeon_driver_irq_preinstall_kms - drm irq preinstall callback | |
113 | * | |
114 | * @dev: drm dev pointer | |
115 | * | |
116 | * Gets the hw ready to enable irqs (all asics). | |
117 | * This function disables all interrupt sources on the GPU. | |
118 | */ | |
771fe6b9 JG |
119 | void radeon_driver_irq_preinstall_kms(struct drm_device *dev) |
120 | { | |
121 | struct radeon_device *rdev = dev->dev_private; | |
fb98257a | 122 | unsigned long irqflags; |
771fe6b9 JG |
123 | unsigned i; |
124 | ||
fb98257a | 125 | spin_lock_irqsave(&rdev->irq.lock, irqflags); |
771fe6b9 | 126 | /* Disable *all* interrupts */ |
1b37078b | 127 | for (i = 0; i < RADEON_NUM_RINGS; i++) |
736fc37f | 128 | atomic_set(&rdev->irq.ring_int[i], 0); |
4a6369e9 | 129 | rdev->irq.dpm_thermal = false; |
54bd5206 | 130 | for (i = 0; i < RADEON_MAX_HPD_PINS; i++) |
9e7b414e | 131 | rdev->irq.hpd[i] = false; |
54bd5206 IH |
132 | for (i = 0; i < RADEON_MAX_CRTCS; i++) { |
133 | rdev->irq.crtc_vblank_int[i] = false; | |
736fc37f | 134 | atomic_set(&rdev->irq.pflip[i], 0); |
f122c610 | 135 | rdev->irq.afmt[i] = false; |
6f34be50 | 136 | } |
771fe6b9 | 137 | radeon_irq_set(rdev); |
fb98257a | 138 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); |
771fe6b9 JG |
139 | /* Clear bits */ |
140 | radeon_irq_process(rdev); | |
141 | } | |
142 | ||
b73ba98d AD |
143 | /** |
144 | * radeon_driver_irq_postinstall_kms - drm irq preinstall callback | |
145 | * | |
146 | * @dev: drm dev pointer | |
147 | * | |
148 | * Handles stuff to be done after enabling irqs (all asics). | |
149 | * Returns 0 on success. | |
150 | */ | |
771fe6b9 JG |
151 | int radeon_driver_irq_postinstall_kms(struct drm_device *dev) |
152 | { | |
b0b9bb4d MD |
153 | struct radeon_device *rdev = dev->dev_private; |
154 | ||
155 | if (ASIC_IS_AVIVO(rdev)) | |
156 | dev->max_vblank_count = 0x00ffffff; | |
157 | else | |
158 | dev->max_vblank_count = 0x001fffff; | |
159 | ||
771fe6b9 JG |
160 | return 0; |
161 | } | |
162 | ||
b73ba98d AD |
163 | /** |
164 | * radeon_driver_irq_uninstall_kms - drm irq uninstall callback | |
165 | * | |
166 | * @dev: drm dev pointer | |
167 | * | |
168 | * This function disables all interrupt sources on the GPU (all asics). | |
169 | */ | |
771fe6b9 JG |
170 | void radeon_driver_irq_uninstall_kms(struct drm_device *dev) |
171 | { | |
172 | struct radeon_device *rdev = dev->dev_private; | |
fb98257a | 173 | unsigned long irqflags; |
771fe6b9 JG |
174 | unsigned i; |
175 | ||
176 | if (rdev == NULL) { | |
177 | return; | |
178 | } | |
fb98257a | 179 | spin_lock_irqsave(&rdev->irq.lock, irqflags); |
771fe6b9 | 180 | /* Disable *all* interrupts */ |
1b37078b | 181 | for (i = 0; i < RADEON_NUM_RINGS; i++) |
736fc37f | 182 | atomic_set(&rdev->irq.ring_int[i], 0); |
4a6369e9 | 183 | rdev->irq.dpm_thermal = false; |
54bd5206 | 184 | for (i = 0; i < RADEON_MAX_HPD_PINS; i++) |
003e69f9 | 185 | rdev->irq.hpd[i] = false; |
54bd5206 IH |
186 | for (i = 0; i < RADEON_MAX_CRTCS; i++) { |
187 | rdev->irq.crtc_vblank_int[i] = false; | |
736fc37f | 188 | atomic_set(&rdev->irq.pflip[i], 0); |
f122c610 | 189 | rdev->irq.afmt[i] = false; |
6f34be50 | 190 | } |
771fe6b9 | 191 | radeon_irq_set(rdev); |
fb98257a | 192 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); |
771fe6b9 JG |
193 | } |
194 | ||
b73ba98d AD |
195 | /** |
196 | * radeon_msi_ok - asic specific msi checks | |
197 | * | |
198 | * @rdev: radeon device pointer | |
199 | * | |
200 | * Handles asic specific MSI checks to determine if | |
201 | * MSIs should be enabled on a particular chip (all asics). | |
202 | * Returns true if MSIs should be enabled, false if MSIs | |
203 | * should not be enabled. | |
204 | */ | |
8f6c25c5 AD |
205 | static bool radeon_msi_ok(struct radeon_device *rdev) |
206 | { | |
207 | /* RV370/RV380 was first asic with MSI support */ | |
208 | if (rdev->family < CHIP_RV380) | |
209 | return false; | |
210 | ||
211 | /* MSIs don't work on AGP */ | |
212 | if (rdev->flags & RADEON_IS_AGP) | |
213 | return false; | |
214 | ||
91ed6fd2 BH |
215 | /* |
216 | * Older chips have a HW limitation, they can only generate 40 bits | |
217 | * of address for "64-bit" MSIs which breaks on some platforms, notably | |
218 | * IBM POWER servers, so we limit them | |
219 | */ | |
220 | if (rdev->family < CHIP_BONAIRE) { | |
221 | dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n"); | |
222 | rdev->pdev->no_64bit_msi = 1; | |
223 | } | |
224 | ||
a18cee15 AD |
225 | /* force MSI on */ |
226 | if (radeon_msi == 1) | |
227 | return true; | |
228 | else if (radeon_msi == 0) | |
229 | return false; | |
230 | ||
b362105f AD |
231 | /* Quirks */ |
232 | /* HP RS690 only seems to work with MSIs. */ | |
233 | if ((rdev->pdev->device == 0x791f) && | |
234 | (rdev->pdev->subsystem_vendor == 0x103c) && | |
235 | (rdev->pdev->subsystem_device == 0x30c2)) | |
236 | return true; | |
237 | ||
44517c44 AD |
238 | /* Dell RS690 only seems to work with MSIs. */ |
239 | if ((rdev->pdev->device == 0x791f) && | |
240 | (rdev->pdev->subsystem_vendor == 0x1028) && | |
241 | (rdev->pdev->subsystem_device == 0x01fc)) | |
242 | return true; | |
243 | ||
01e718ec AD |
244 | /* Dell RS690 only seems to work with MSIs. */ |
245 | if ((rdev->pdev->device == 0x791f) && | |
246 | (rdev->pdev->subsystem_vendor == 0x1028) && | |
247 | (rdev->pdev->subsystem_device == 0x01fd)) | |
248 | return true; | |
249 | ||
3a6d59df AD |
250 | /* Gateway RS690 only seems to work with MSIs. */ |
251 | if ((rdev->pdev->device == 0x791f) && | |
252 | (rdev->pdev->subsystem_vendor == 0x107b) && | |
253 | (rdev->pdev->subsystem_device == 0x0185)) | |
254 | return true; | |
255 | ||
fb6ca6d1 AD |
256 | /* try and enable MSIs by default on all RS690s */ |
257 | if (rdev->family == CHIP_RS690) | |
258 | return true; | |
259 | ||
16a5e32b DA |
260 | /* RV515 seems to have MSI issues where it loses |
261 | * MSI rearms occasionally. This leads to lockups and freezes. | |
262 | * disable it by default. | |
263 | */ | |
264 | if (rdev->family == CHIP_RV515) | |
265 | return false; | |
8f6c25c5 AD |
266 | if (rdev->flags & RADEON_IS_IGP) { |
267 | /* APUs work fine with MSIs */ | |
268 | if (rdev->family >= CHIP_PALM) | |
269 | return true; | |
270 | /* lots of IGPs have problems with MSIs */ | |
271 | return false; | |
272 | } | |
273 | ||
274 | return true; | |
275 | } | |
276 | ||
b73ba98d AD |
277 | /** |
278 | * radeon_irq_kms_init - init driver interrupt info | |
279 | * | |
280 | * @rdev: radeon device pointer | |
281 | * | |
282 | * Sets up the work irq handlers, vblank init, MSIs, etc. (all asics). | |
283 | * Returns 0 for success, error for failure. | |
284 | */ | |
771fe6b9 JG |
285 | int radeon_irq_kms_init(struct radeon_device *rdev) |
286 | { | |
287 | int r = 0; | |
288 | ||
fb98257a | 289 | spin_lock_init(&rdev->irq.lock); |
9e7b414e | 290 | r = drm_vblank_init(rdev->ddev, rdev->num_crtc); |
771fe6b9 JG |
291 | if (r) { |
292 | return r; | |
293 | } | |
978ccad6 | 294 | |
3e5cb98d AD |
295 | /* enable msi */ |
296 | rdev->msi_enabled = 0; | |
8f6c25c5 AD |
297 | |
298 | if (radeon_msi_ok(rdev)) { | |
3e5cb98d | 299 | int ret = pci_enable_msi(rdev->pdev); |
d8f60cfc | 300 | if (!ret) { |
3e5cb98d | 301 | rdev->msi_enabled = 1; |
da7be684 | 302 | dev_info(rdev->dev, "radeon: using MSI.\n"); |
d8f60cfc | 303 | } |
3e5cb98d | 304 | } |
27c505ca | 305 | |
cb5d4166 | 306 | INIT_DELAYED_WORK(&rdev->hotplug_work, radeon_hotplug_work_func); |
de6284aa | 307 | INIT_WORK(&rdev->dp_work, radeon_dp_work_func); |
27c505ca | 308 | INIT_WORK(&rdev->audio_work, r600_audio_update_hdmi); |
27c505ca | 309 | |
771fe6b9 | 310 | rdev->irq.installed = true; |
bb0f1b5c | 311 | r = drm_irq_install(rdev->ddev, rdev->ddev->pdev->irq); |
003e69f9 JG |
312 | if (r) { |
313 | rdev->irq.installed = false; | |
cb5d4166 | 314 | flush_delayed_work(&rdev->hotplug_work); |
003e69f9 JG |
315 | return r; |
316 | } | |
a01c34f7 | 317 | |
771fe6b9 JG |
318 | DRM_INFO("radeon: irq initialized.\n"); |
319 | return 0; | |
320 | } | |
321 | ||
b73ba98d | 322 | /** |
cf2fbdd2 | 323 | * radeon_irq_kms_fini - tear down driver interrupt info |
b73ba98d AD |
324 | * |
325 | * @rdev: radeon device pointer | |
326 | * | |
327 | * Tears down the work irq handlers, vblank handlers, MSIs, etc. (all asics). | |
328 | */ | |
771fe6b9 JG |
329 | void radeon_irq_kms_fini(struct radeon_device *rdev) |
330 | { | |
003e69f9 | 331 | drm_vblank_cleanup(rdev->ddev); |
771fe6b9 | 332 | if (rdev->irq.installed) { |
771fe6b9 | 333 | drm_irq_uninstall(rdev->ddev); |
003e69f9 | 334 | rdev->irq.installed = false; |
3e5cb98d AD |
335 | if (rdev->msi_enabled) |
336 | pci_disable_msi(rdev->pdev); | |
cb5d4166 | 337 | flush_delayed_work(&rdev->hotplug_work); |
771fe6b9 JG |
338 | } |
339 | } | |
1614f8b1 | 340 | |
b73ba98d AD |
341 | /** |
342 | * radeon_irq_kms_sw_irq_get - enable software interrupt | |
343 | * | |
344 | * @rdev: radeon device pointer | |
345 | * @ring: ring whose interrupt you want to enable | |
346 | * | |
347 | * Enables the software interrupt for a specific ring (all asics). | |
348 | * The software interrupt is generally used to signal a fence on | |
349 | * a particular ring. | |
350 | */ | |
1b37078b | 351 | void radeon_irq_kms_sw_irq_get(struct radeon_device *rdev, int ring) |
1614f8b1 DA |
352 | { |
353 | unsigned long irqflags; | |
354 | ||
736fc37f CK |
355 | if (!rdev->ddev->irq_enabled) |
356 | return; | |
357 | ||
358 | if (atomic_inc_return(&rdev->irq.ring_int[ring]) == 1) { | |
359 | spin_lock_irqsave(&rdev->irq.lock, irqflags); | |
1614f8b1 | 360 | radeon_irq_set(rdev); |
736fc37f | 361 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); |
1614f8b1 | 362 | } |
1614f8b1 DA |
363 | } |
364 | ||
954605ca ML |
365 | /** |
366 | * radeon_irq_kms_sw_irq_get_delayed - enable software interrupt | |
367 | * | |
368 | * @rdev: radeon device pointer | |
369 | * @ring: ring whose interrupt you want to enable | |
370 | * | |
371 | * Enables the software interrupt for a specific ring (all asics). | |
372 | * The software interrupt is generally used to signal a fence on | |
373 | * a particular ring. | |
374 | */ | |
375 | bool radeon_irq_kms_sw_irq_get_delayed(struct radeon_device *rdev, int ring) | |
376 | { | |
377 | return atomic_inc_return(&rdev->irq.ring_int[ring]) == 1; | |
378 | } | |
379 | ||
b73ba98d AD |
380 | /** |
381 | * radeon_irq_kms_sw_irq_put - disable software interrupt | |
382 | * | |
383 | * @rdev: radeon device pointer | |
384 | * @ring: ring whose interrupt you want to disable | |
385 | * | |
386 | * Disables the software interrupt for a specific ring (all asics). | |
387 | * The software interrupt is generally used to signal a fence on | |
388 | * a particular ring. | |
389 | */ | |
1b37078b | 390 | void radeon_irq_kms_sw_irq_put(struct radeon_device *rdev, int ring) |
1614f8b1 DA |
391 | { |
392 | unsigned long irqflags; | |
393 | ||
736fc37f CK |
394 | if (!rdev->ddev->irq_enabled) |
395 | return; | |
396 | ||
397 | if (atomic_dec_and_test(&rdev->irq.ring_int[ring])) { | |
398 | spin_lock_irqsave(&rdev->irq.lock, irqflags); | |
1614f8b1 | 399 | radeon_irq_set(rdev); |
736fc37f | 400 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); |
1614f8b1 | 401 | } |
1614f8b1 DA |
402 | } |
403 | ||
b73ba98d AD |
404 | /** |
405 | * radeon_irq_kms_pflip_irq_get - enable pageflip interrupt | |
406 | * | |
407 | * @rdev: radeon device pointer | |
408 | * @crtc: crtc whose interrupt you want to enable | |
409 | * | |
410 | * Enables the pageflip interrupt for a specific crtc (all asics). | |
411 | * For pageflips we use the vblank interrupt source. | |
412 | */ | |
6f34be50 AD |
413 | void radeon_irq_kms_pflip_irq_get(struct radeon_device *rdev, int crtc) |
414 | { | |
415 | unsigned long irqflags; | |
416 | ||
417 | if (crtc < 0 || crtc >= rdev->num_crtc) | |
418 | return; | |
419 | ||
736fc37f CK |
420 | if (!rdev->ddev->irq_enabled) |
421 | return; | |
422 | ||
423 | if (atomic_inc_return(&rdev->irq.pflip[crtc]) == 1) { | |
424 | spin_lock_irqsave(&rdev->irq.lock, irqflags); | |
6f34be50 | 425 | radeon_irq_set(rdev); |
736fc37f | 426 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); |
6f34be50 | 427 | } |
6f34be50 AD |
428 | } |
429 | ||
b73ba98d AD |
430 | /** |
431 | * radeon_irq_kms_pflip_irq_put - disable pageflip interrupt | |
432 | * | |
433 | * @rdev: radeon device pointer | |
434 | * @crtc: crtc whose interrupt you want to disable | |
435 | * | |
436 | * Disables the pageflip interrupt for a specific crtc (all asics). | |
437 | * For pageflips we use the vblank interrupt source. | |
438 | */ | |
6f34be50 AD |
439 | void radeon_irq_kms_pflip_irq_put(struct radeon_device *rdev, int crtc) |
440 | { | |
441 | unsigned long irqflags; | |
442 | ||
443 | if (crtc < 0 || crtc >= rdev->num_crtc) | |
444 | return; | |
445 | ||
736fc37f CK |
446 | if (!rdev->ddev->irq_enabled) |
447 | return; | |
448 | ||
449 | if (atomic_dec_and_test(&rdev->irq.pflip[crtc])) { | |
450 | spin_lock_irqsave(&rdev->irq.lock, irqflags); | |
6f34be50 | 451 | radeon_irq_set(rdev); |
736fc37f | 452 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); |
6f34be50 | 453 | } |
6f34be50 AD |
454 | } |
455 | ||
b73ba98d AD |
456 | /** |
457 | * radeon_irq_kms_enable_afmt - enable audio format change interrupt | |
458 | * | |
459 | * @rdev: radeon device pointer | |
460 | * @block: afmt block whose interrupt you want to enable | |
461 | * | |
462 | * Enables the afmt change interrupt for a specific afmt block (all asics). | |
463 | */ | |
fb98257a CK |
464 | void radeon_irq_kms_enable_afmt(struct radeon_device *rdev, int block) |
465 | { | |
466 | unsigned long irqflags; | |
467 | ||
cc9945bf AD |
468 | if (!rdev->ddev->irq_enabled) |
469 | return; | |
470 | ||
fb98257a CK |
471 | spin_lock_irqsave(&rdev->irq.lock, irqflags); |
472 | rdev->irq.afmt[block] = true; | |
473 | radeon_irq_set(rdev); | |
474 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); | |
475 | ||
476 | } | |
477 | ||
b73ba98d AD |
478 | /** |
479 | * radeon_irq_kms_disable_afmt - disable audio format change interrupt | |
480 | * | |
481 | * @rdev: radeon device pointer | |
482 | * @block: afmt block whose interrupt you want to disable | |
483 | * | |
484 | * Disables the afmt change interrupt for a specific afmt block (all asics). | |
485 | */ | |
fb98257a CK |
486 | void radeon_irq_kms_disable_afmt(struct radeon_device *rdev, int block) |
487 | { | |
488 | unsigned long irqflags; | |
489 | ||
cc9945bf AD |
490 | if (!rdev->ddev->irq_enabled) |
491 | return; | |
492 | ||
fb98257a CK |
493 | spin_lock_irqsave(&rdev->irq.lock, irqflags); |
494 | rdev->irq.afmt[block] = false; | |
495 | radeon_irq_set(rdev); | |
496 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); | |
497 | } | |
498 | ||
b73ba98d AD |
499 | /** |
500 | * radeon_irq_kms_enable_hpd - enable hotplug detect interrupt | |
501 | * | |
502 | * @rdev: radeon device pointer | |
503 | * @hpd_mask: mask of hpd pins you want to enable. | |
504 | * | |
505 | * Enables the hotplug detect interrupt for a specific hpd pin (all asics). | |
506 | */ | |
fb98257a CK |
507 | void radeon_irq_kms_enable_hpd(struct radeon_device *rdev, unsigned hpd_mask) |
508 | { | |
509 | unsigned long irqflags; | |
510 | int i; | |
511 | ||
cc9945bf AD |
512 | if (!rdev->ddev->irq_enabled) |
513 | return; | |
514 | ||
fb98257a CK |
515 | spin_lock_irqsave(&rdev->irq.lock, irqflags); |
516 | for (i = 0; i < RADEON_MAX_HPD_PINS; ++i) | |
517 | rdev->irq.hpd[i] |= !!(hpd_mask & (1 << i)); | |
518 | radeon_irq_set(rdev); | |
519 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); | |
520 | } | |
521 | ||
b73ba98d AD |
522 | /** |
523 | * radeon_irq_kms_disable_hpd - disable hotplug detect interrupt | |
524 | * | |
525 | * @rdev: radeon device pointer | |
526 | * @hpd_mask: mask of hpd pins you want to disable. | |
527 | * | |
528 | * Disables the hotplug detect interrupt for a specific hpd pin (all asics). | |
529 | */ | |
fb98257a CK |
530 | void radeon_irq_kms_disable_hpd(struct radeon_device *rdev, unsigned hpd_mask) |
531 | { | |
532 | unsigned long irqflags; | |
533 | int i; | |
534 | ||
cc9945bf AD |
535 | if (!rdev->ddev->irq_enabled) |
536 | return; | |
537 | ||
fb98257a CK |
538 | spin_lock_irqsave(&rdev->irq.lock, irqflags); |
539 | for (i = 0; i < RADEON_MAX_HPD_PINS; ++i) | |
540 | rdev->irq.hpd[i] &= !(hpd_mask & (1 << i)); | |
541 | radeon_irq_set(rdev); | |
542 | spin_unlock_irqrestore(&rdev->irq.lock, irqflags); | |
543 | } | |
544 |