drm/radeon: move bl encoder assignment into bl init
[linux-2.6-block.git] / drivers / gpu / drm / radeon / radeon_encoders.c
CommitLineData
771fe6b9
JG
1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
760285e7
DH
26#include <drm/drmP.h>
27#include <drm/drm_crtc_helper.h>
28#include <drm/radeon_drm.h>
771fe6b9
JG
29#include "radeon.h"
30#include "atom.h"
31
f3728734
AD
32extern void
33radeon_legacy_backlight_init(struct radeon_encoder *radeon_encoder,
34 struct drm_connector *drm_connector);
35extern void
36radeon_atom_backlight_init(struct radeon_encoder *radeon_encoder,
37 struct drm_connector *drm_connector);
38
39
1f3b6a45
DA
40static uint32_t radeon_encoder_clones(struct drm_encoder *encoder)
41{
42 struct drm_device *dev = encoder->dev;
43 struct radeon_device *rdev = dev->dev_private;
44 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
45 struct drm_encoder *clone_encoder;
46 uint32_t index_mask = 0;
47 int count;
48
49 /* DIG routing gets problematic */
50 if (rdev->family >= CHIP_R600)
51 return index_mask;
52 /* LVDS/TV are too wacky */
53 if (radeon_encoder->devices & ATOM_DEVICE_LCD_SUPPORT)
54 return index_mask;
55 /* DVO requires 2x ppll clocks depending on tmds chip */
56 if (radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT)
57 return index_mask;
bcc1c2a1 58
1f3b6a45
DA
59 count = -1;
60 list_for_each_entry(clone_encoder, &dev->mode_config.encoder_list, head) {
61 struct radeon_encoder *radeon_clone = to_radeon_encoder(clone_encoder);
62 count++;
63
64 if (clone_encoder == encoder)
65 continue;
66 if (radeon_clone->devices & (ATOM_DEVICE_LCD_SUPPORT))
67 continue;
68 if (radeon_clone->devices & ATOM_DEVICE_DFP2_SUPPORT)
69 continue;
70 else
71 index_mask |= (1 << count);
72 }
73 return index_mask;
74}
75
76void radeon_setup_encoder_clones(struct drm_device *dev)
77{
78 struct drm_encoder *encoder;
79
80 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
81 encoder->possible_clones = radeon_encoder_clones(encoder);
82 }
83}
84
771fe6b9 85uint32_t
5137ee94 86radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8_t dac)
771fe6b9
JG
87{
88 struct radeon_device *rdev = dev->dev_private;
89 uint32_t ret = 0;
90
91 switch (supported_device) {
92 case ATOM_DEVICE_CRT1_SUPPORT:
93 case ATOM_DEVICE_TV1_SUPPORT:
94 case ATOM_DEVICE_TV2_SUPPORT:
95 case ATOM_DEVICE_CRT2_SUPPORT:
96 case ATOM_DEVICE_CV_SUPPORT:
97 switch (dac) {
98 case 1: /* dac a */
99 if ((rdev->family == CHIP_RS300) ||
100 (rdev->family == CHIP_RS400) ||
101 (rdev->family == CHIP_RS480))
5137ee94 102 ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
771fe6b9 103 else if (ASIC_IS_AVIVO(rdev))
5137ee94 104 ret = ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1;
771fe6b9 105 else
5137ee94 106 ret = ENCODER_INTERNAL_DAC1_ENUM_ID1;
771fe6b9
JG
107 break;
108 case 2: /* dac b */
109 if (ASIC_IS_AVIVO(rdev))
5137ee94 110 ret = ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1;
771fe6b9
JG
111 else {
112 /*if (rdev->family == CHIP_R200)
5137ee94 113 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
771fe6b9 114 else*/
5137ee94 115 ret = ENCODER_INTERNAL_DAC2_ENUM_ID1;
771fe6b9
JG
116 }
117 break;
118 case 3: /* external dac */
119 if (ASIC_IS_AVIVO(rdev))
5137ee94 120 ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
771fe6b9 121 else
5137ee94 122 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
771fe6b9
JG
123 break;
124 }
125 break;
126 case ATOM_DEVICE_LCD1_SUPPORT:
127 if (ASIC_IS_AVIVO(rdev))
5137ee94 128 ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
771fe6b9 129 else
5137ee94 130 ret = ENCODER_INTERNAL_LVDS_ENUM_ID1;
771fe6b9
JG
131 break;
132 case ATOM_DEVICE_DFP1_SUPPORT:
133 if ((rdev->family == CHIP_RS300) ||
134 (rdev->family == CHIP_RS400) ||
135 (rdev->family == CHIP_RS480))
5137ee94 136 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
771fe6b9 137 else if (ASIC_IS_AVIVO(rdev))
5137ee94 138 ret = ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1;
771fe6b9 139 else
5137ee94 140 ret = ENCODER_INTERNAL_TMDS1_ENUM_ID1;
771fe6b9
JG
141 break;
142 case ATOM_DEVICE_LCD2_SUPPORT:
143 case ATOM_DEVICE_DFP2_SUPPORT:
144 if ((rdev->family == CHIP_RS600) ||
145 (rdev->family == CHIP_RS690) ||
146 (rdev->family == CHIP_RS740))
5137ee94 147 ret = ENCODER_INTERNAL_DDI_ENUM_ID1;
771fe6b9 148 else if (ASIC_IS_AVIVO(rdev))
5137ee94 149 ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1;
771fe6b9 150 else
5137ee94 151 ret = ENCODER_INTERNAL_DVO1_ENUM_ID1;
771fe6b9
JG
152 break;
153 case ATOM_DEVICE_DFP3_SUPPORT:
5137ee94 154 ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1;
771fe6b9
JG
155 break;
156 }
157
158 return ret;
159}
160
bc13018b
AD
161static void radeon_encoder_add_backlight(struct radeon_encoder *radeon_encoder,
162 struct drm_connector *connector)
163{
164 struct drm_device *dev = radeon_encoder->base.dev;
165 struct radeon_device *rdev = dev->dev_private;
166 bool use_bl = false;
167
168 if (!(radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)))
169 return;
170
171 if (radeon_backlight == 0) {
172 return;
173 } else if (radeon_backlight == 1) {
174 use_bl = true;
175 } else if (radeon_backlight == -1) {
8aff6ad5
AD
176 /* Quirks */
177 /* Amilo Xi 2550 only works with acpi bl */
178 if ((rdev->pdev->device == 0x9583) &&
179 (rdev->pdev->subsystem_vendor == 0x1734) &&
180 (rdev->pdev->subsystem_device == 0x1107))
181 use_bl = false;
7a26f9ad
NH
182/* Older PPC macs use on-GPU backlight controller */
183#ifndef CONFIG_PPC_PMAC
b7bc596e
AD
184 /* disable native backlight control on older asics */
185 else if (rdev->family < CHIP_R600)
186 use_bl = false;
7a26f9ad 187#endif
8aff6ad5
AD
188 else
189 use_bl = true;
bc13018b
AD
190 }
191
192 if (use_bl) {
193 if (rdev->is_atom_bios)
194 radeon_atom_backlight_init(radeon_encoder, connector);
195 else
196 radeon_legacy_backlight_init(radeon_encoder, connector);
bc13018b
AD
197 }
198}
199
771fe6b9
JG
200void
201radeon_link_encoder_connector(struct drm_device *dev)
202{
203 struct drm_connector *connector;
204 struct radeon_connector *radeon_connector;
205 struct drm_encoder *encoder;
206 struct radeon_encoder *radeon_encoder;
207
208 /* walk the list and link encoders to connectors */
209 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
210 radeon_connector = to_radeon_connector(connector);
211 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
212 radeon_encoder = to_radeon_encoder(encoder);
f3728734 213 if (radeon_encoder->devices & radeon_connector->devices) {
771fe6b9 214 drm_mode_connector_attach_encoder(connector, encoder);
bc13018b
AD
215 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT))
216 radeon_encoder_add_backlight(radeon_encoder, connector);
f3728734 217 }
771fe6b9
JG
218 }
219 }
220}
221
4ce001ab
DA
222void radeon_encoder_set_active_device(struct drm_encoder *encoder)
223{
224 struct drm_device *dev = encoder->dev;
225 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
226 struct drm_connector *connector;
227
228 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
229 if (connector->encoder == encoder) {
230 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
231 radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices;
d9fdaafb 232 DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
f641e51e
DA
233 radeon_encoder->active_device, radeon_encoder->devices,
234 radeon_connector->devices, encoder->encoder_type);
4ce001ab
DA
235 }
236 }
237}
238
5b1714d3 239struct drm_connector *
771fe6b9
JG
240radeon_get_connector_for_encoder(struct drm_encoder *encoder)
241{
242 struct drm_device *dev = encoder->dev;
243 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
244 struct drm_connector *connector;
245 struct radeon_connector *radeon_connector;
246
247 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
248 radeon_connector = to_radeon_connector(connector);
9843ead0
DA
249 if (radeon_encoder->is_mst_encoder) {
250 struct radeon_encoder_mst *mst_enc;
251
252 if (!radeon_connector->is_mst_connector)
253 continue;
254
255 mst_enc = radeon_encoder->enc_priv;
256 if (mst_enc->connector == radeon_connector->mst_port)
257 return connector;
258 } else if (radeon_encoder->active_device & radeon_connector->devices)
771fe6b9
JG
259 return connector;
260 }
261 return NULL;
262}
263
9aa59993
AD
264struct drm_connector *
265radeon_get_connector_for_encoder_init(struct drm_encoder *encoder)
266{
267 struct drm_device *dev = encoder->dev;
268 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
269 struct drm_connector *connector;
270 struct radeon_connector *radeon_connector;
271
272 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
273 radeon_connector = to_radeon_connector(connector);
274 if (radeon_encoder->devices & radeon_connector->devices)
275 return connector;
276 }
277 return NULL;
278}
279
3f03ced8 280struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder)
3e4b9982
AD
281{
282 struct drm_device *dev = encoder->dev;
283 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
284 struct drm_encoder *other_encoder;
285 struct radeon_encoder *other_radeon_encoder;
286
287 if (radeon_encoder->is_ext_encoder)
288 return NULL;
289
290 list_for_each_entry(other_encoder, &dev->mode_config.encoder_list, head) {
291 if (other_encoder == encoder)
292 continue;
293 other_radeon_encoder = to_radeon_encoder(other_encoder);
294 if (other_radeon_encoder->is_ext_encoder &&
295 (radeon_encoder->devices & other_radeon_encoder->devices))
296 return other_encoder;
297 }
298 return NULL;
299}
300
1d33e1fc 301u16 radeon_encoder_get_dp_bridge_encoder_id(struct drm_encoder *encoder)
d7fa8bb3 302{
3f03ced8 303 struct drm_encoder *other_encoder = radeon_get_external_encoder(encoder);
d7fa8bb3
AD
304
305 if (other_encoder) {
306 struct radeon_encoder *radeon_encoder = to_radeon_encoder(other_encoder);
307
308 switch (radeon_encoder->encoder_id) {
309 case ENCODER_OBJECT_ID_TRAVIS:
310 case ENCODER_OBJECT_ID_NUTMEG:
dc87cd5c 311 return radeon_encoder->encoder_id;
d7fa8bb3 312 default:
dc87cd5c 313 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD
314 }
315 }
dc87cd5c 316 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD
317}
318
3515387b
AD
319void radeon_panel_mode_fixup(struct drm_encoder *encoder,
320 struct drm_display_mode *adjusted_mode)
321{
322 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
323 struct drm_device *dev = encoder->dev;
324 struct radeon_device *rdev = dev->dev_private;
325 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
326 unsigned hblank = native_mode->htotal - native_mode->hdisplay;
327 unsigned vblank = native_mode->vtotal - native_mode->vdisplay;
328 unsigned hover = native_mode->hsync_start - native_mode->hdisplay;
329 unsigned vover = native_mode->vsync_start - native_mode->vdisplay;
330 unsigned hsync_width = native_mode->hsync_end - native_mode->hsync_start;
331 unsigned vsync_width = native_mode->vsync_end - native_mode->vsync_start;
332
333 adjusted_mode->clock = native_mode->clock;
334 adjusted_mode->flags = native_mode->flags;
335
336 if (ASIC_IS_AVIVO(rdev)) {
337 adjusted_mode->hdisplay = native_mode->hdisplay;
338 adjusted_mode->vdisplay = native_mode->vdisplay;
339 }
340
341 adjusted_mode->htotal = native_mode->hdisplay + hblank;
342 adjusted_mode->hsync_start = native_mode->hdisplay + hover;
343 adjusted_mode->hsync_end = adjusted_mode->hsync_start + hsync_width;
344
345 adjusted_mode->vtotal = native_mode->vdisplay + vblank;
346 adjusted_mode->vsync_start = native_mode->vdisplay + vover;
347 adjusted_mode->vsync_end = adjusted_mode->vsync_start + vsync_width;
348
349 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
350
351 if (ASIC_IS_AVIVO(rdev)) {
352 adjusted_mode->crtc_hdisplay = native_mode->hdisplay;
353 adjusted_mode->crtc_vdisplay = native_mode->vdisplay;
354 }
355
356 adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + hblank;
357 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + hover;
358 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + hsync_width;
359
360 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + vblank;
361 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + vover;
362 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + vsync_width;
363
364}
365
9aa59993
AD
366bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
367 u32 pixel_clock)
368{
1b2681ba
AD
369 struct drm_device *dev = encoder->dev;
370 struct radeon_device *rdev = dev->dev_private;
9aa59993
AD
371 struct drm_connector *connector;
372 struct radeon_connector *radeon_connector;
373 struct radeon_connector_atom_dig *dig_connector;
374
375 connector = radeon_get_connector_for_encoder(encoder);
376 /* if we don't have an active device yet, just use one of
377 * the connectors tied to the encoder.
378 */
379 if (!connector)
380 connector = radeon_get_connector_for_encoder_init(encoder);
381 radeon_connector = to_radeon_connector(connector);
382
383 switch (connector->connector_type) {
384 case DRM_MODE_CONNECTOR_DVII:
385 case DRM_MODE_CONNECTOR_HDMIB:
386 if (radeon_connector->use_digital) {
387 /* HDMI 1.3 supports up to 340 Mhz over single link */
377bd8a9 388 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
9aa59993
AD
389 if (pixel_clock > 340000)
390 return true;
391 else
392 return false;
393 } else {
394 if (pixel_clock > 165000)
395 return true;
396 else
397 return false;
398 }
399 } else
400 return false;
401 case DRM_MODE_CONNECTOR_DVID:
402 case DRM_MODE_CONNECTOR_HDMIA:
403 case DRM_MODE_CONNECTOR_DisplayPort:
9843ead0
DA
404 if (radeon_connector->is_mst_connector)
405 return false;
406
9aa59993
AD
407 dig_connector = radeon_connector->con_priv;
408 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
409 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
410 return false;
411 else {
412 /* HDMI 1.3 supports up to 340 Mhz over single link */
377bd8a9 413 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
9aa59993
AD
414 if (pixel_clock > 340000)
415 return true;
416 else
417 return false;
418 } else {
419 if (pixel_clock > 165000)
420 return true;
421 else
422 return false;
423 }
424 }
425 default:
426 return false;
427 }
428}
429
d740a933
AD
430bool radeon_encoder_is_digital(struct drm_encoder *encoder)
431{
432 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
433 switch (radeon_encoder->encoder_id) {
434 case ENCODER_OBJECT_ID_INTERNAL_LVDS:
435 case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
436 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
437 case ENCODER_OBJECT_ID_INTERNAL_LVTM1:
438 case ENCODER_OBJECT_ID_INTERNAL_DVO1:
439 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1:
440 case ENCODER_OBJECT_ID_INTERNAL_DDI:
441 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
442 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
443 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
444 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
445 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3:
446 return true;
447 default:
448 return false;
449 }
450}