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drm: Push latency sensitive bits of vblank scanoutpos timestamping into kms drivers.
[linux-2.6-block.git] / drivers / gpu / drm / radeon / radeon_drv.c
CommitLineData
1da177e4
LT		 1/**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
760285e7
DH		 32#include <drm/drmP.h>
33#include <drm/radeon_drm.h>
1da177e4
LT		 34#include "radeon_drv.h"
35
760285e7 36#include <drm/drm_pciids.h>
771fe6b9 37#include <linux/console.h>
e0cd3608 38#include <linux/module.h>
10ebc0bc
DA		 39#include <linux/pm_runtime.h>
40#include <linux/vga_switcheroo.h>
41#include "drm_crtc_helper.h"
771fe6b9
JG		 42/*
43 * KMS wrapper.
0de1a57b
DA		 44 * - 2.0.0 - initial interface
45 * - 2.1.0 - add square tiling interface
fdb43528 46 * - 2.2.0 - add r6xx/r7xx const buffer support
cae94b0a 47 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
bc35afdb 48 * - 2.4.0 - add crtc id query
148a03bc 49 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
ab9e1f59 50 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
71901cc4 51 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
58bbf018 52 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
486af189 53 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
b8709894
AD		 54 * 2.10.0 - fusion 2D tiling
55 * 2.11.0 - backend map, initial compute support for the CS checker
e70f224c 56 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
dd220a00 57 * 2.13.0 - virtual memory support, streamout
285484e2 58 * 2.14.0 - add evergreen tiling informations
609c1e15 59 * 2.15.0 - add max_pipes query
d2609875 60 * 2.16.0 - fix evergreen 2D tiled surface calculation
7c77bf2a 61 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
0f457e48 62 * 2.18.0 - r600-eg: allow "invalid" DB formats
b51ad12a 63 * 2.19.0 - r600-eg: MSAA textures
6759a0a7 64 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
c116cc94 65 * 2.21.0 - r600-r700: FMASK and CMASK
523885de 66 * 2.22.0 - r600 only: RESOLVE_BOX allowed
46fc8781 67 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
61051afd 68 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
71bfe916 69 * 2.25.0 - eg+: new info request for num SE and num SH
4ac0533a 70 * 2.26.0 - r600-eg: fix htile size computation
8696e33f 71 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
4613ca14 72 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
c18b1170 73 * 2.29.0 - R500 FP16 color clear registers
774c389f 74 * 2.30.0 - fix for FMASK texturing
a0a53aa8 75 * 2.31.0 - Add fastfb support for rs690
902aaef6 76 * 2.32.0 - new info request for rings working
64d7b8be 77 * 2.33.0 - Add SI tiling mode array query
39aee490 78 * 2.34.0 - Add CIK tiling mode array query
771fe6b9
JG		 79 */
80#define KMS_DRIVER_MAJOR 2
39aee490 81#define KMS_DRIVER_MINOR 34
771fe6b9
JG		 82#define KMS_DRIVER_PATCHLEVEL 0
83int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
84int radeon_driver_unload_kms(struct drm_device *dev);
771fe6b9
JG		 85void radeon_driver_lastclose_kms(struct drm_device *dev);
86int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
87void radeon_driver_postclose_kms(struct drm_device *dev,
88 struct drm_file *file_priv);
89void radeon_driver_preclose_kms(struct drm_device *dev,
90 struct drm_file *file_priv);
10ebc0bc
DA		 91int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon);
92int radeon_resume_kms(struct drm_device *dev, bool resume, bool fbcon);
771fe6b9
JG		 93u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
94int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
95void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
f5a80209
MK		 96int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
97 int *max_error,
98 struct timeval *vblank_time,
99 unsigned flags);
771fe6b9
JG		 100void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
101int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
102void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
103irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
771fe6b9 104void radeon_gem_object_free(struct drm_gem_object *obj);
721604a1
JG		 105int radeon_gem_object_open(struct drm_gem_object *obj,
106 struct drm_file *file_priv);
107void radeon_gem_object_close(struct drm_gem_object *obj,
108 struct drm_file *file_priv);
f5a80209
MK		 109extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
110 int *vpos, int *hpos);
baa70943 111extern const struct drm_ioctl_desc radeon_ioctls_kms[];
771fe6b9
JG		 112extern int radeon_max_kms_ioctl;
113int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
ff72145b
DA		 114int radeon_mode_dumb_mmap(struct drm_file *filp,
115 struct drm_device *dev,
116 uint32_t handle, uint64_t *offset_p);
117int radeon_mode_dumb_create(struct drm_file *file_priv,
118 struct drm_device *dev,
119 struct drm_mode_create_dumb *args);
1e6d17a5
AP		 120struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
121struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
122 size_t size,
123 struct sg_table *sg);
124int radeon_gem_prime_pin(struct drm_gem_object *obj);
280cf211 125void radeon_gem_prime_unpin(struct drm_gem_object *obj);
1e6d17a5
AP		 126void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
127void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
14adc892
CK		 128extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
129 unsigned long arg);
ff72145b 130
771fe6b9
JG		 131#if defined(CONFIG_DEBUG_FS)
132int radeon_debugfs_init(struct drm_minor *minor);
133void radeon_debugfs_cleanup(struct drm_minor *minor);
134#endif
771fe6b9 135
14adc892
CK		 136/* atpx handler */
137#if defined(CONFIG_VGA_SWITCHEROO)
138void radeon_register_atpx_handler(void);
139void radeon_unregister_atpx_handler(void);
10ebc0bc 140bool radeon_is_px(void);
14adc892
CK		 141#else
142static inline void radeon_register_atpx_handler(void) {}
143static inline void radeon_unregister_atpx_handler(void) {}
10ebc0bc 144static inline bool radeon_is_px(void) { return false; }
14adc892 145#endif
1da177e4 146
689b9d74 147int radeon_no_wb;
e9ced8e0 148int radeon_modeset = -1;
771fe6b9
JG		 149int radeon_dynclks = -1;
150int radeon_r4xx_atom = 0;
151int radeon_agpmode = 0;
152int radeon_vram_limit = 0;
edcd26e8 153int radeon_gart_size = -1; /* auto */
771fe6b9 154int radeon_benchmarking = 0;
ecc0b326 155int radeon_testing = 0;
771fe6b9 156int radeon_connector_table = 0;
4ce001ab 157int radeon_tv = 1;
8666c076 158int radeon_audio = 1;
f46c0120 159int radeon_disp_priority = 0;
e2b0a8e1 160int radeon_hw_i2c = 0;
197bbb3d 161int radeon_pcie_gen2 = -1;
a18cee15 162int radeon_msi = -1;
3368ff0c 163int radeon_lockup_timeout = 10000;
a0a53aa8 164int radeon_fastfb = 0;
da321c8a 165int radeon_dpm = -1;
1294d4a3 166int radeon_aspm = -1;
10ebc0bc 167int radeon_runtime_pm = -1;
689b9d74 168
61a2d07d 169MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
689b9d74
DA		 170module_param_named(no_wb, radeon_no_wb, int, 0444);
171
771fe6b9
JG		 172MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
173module_param_named(modeset, radeon_modeset, int, 0400);
174
175MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
176module_param_named(dynclks, radeon_dynclks, int, 0444);
177
178MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
179module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
180
181MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
182module_param_named(vramlimit, radeon_vram_limit, int, 0600);
183
184MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
185module_param_named(agpmode, radeon_agpmode, int, 0444);
186
edcd26e8 187MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
771fe6b9
JG		 188module_param_named(gartsize, radeon_gart_size, int, 0600);
189
190MODULE_PARM_DESC(benchmark, "Run benchmark");
191module_param_named(benchmark, radeon_benchmarking, int, 0444);
192
ecc0b326
MD		 193MODULE_PARM_DESC(test, "Run tests");
194module_param_named(test, radeon_testing, int, 0444);
195
771fe6b9
JG		 196MODULE_PARM_DESC(connector_table, "Force connector table");
197module_param_named(connector_table, radeon_connector_table, int, 0444);
4ce001ab
DA		 198
199MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
200module_param_named(tv, radeon_tv, int, 0444);
771fe6b9 201
805c2216 202MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
dafc3bd5
CK		 203module_param_named(audio, radeon_audio, int, 0444);
204
f46c0120
AD		 205MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
206module_param_named(disp_priority, radeon_disp_priority, int, 0444);
207
e2b0a8e1
AD		 208MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
209module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
210
197bbb3d 211MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
d42dd579
AD		 212module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
213
a18cee15
AD		 214MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
215module_param_named(msi, radeon_msi, int, 0444);
216
3368ff0c
CK		 217MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
218module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
219
a0a53aa8
SL		 220MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
221module_param_named(fastfb, radeon_fastfb, int, 0444);
222
da321c8a
AD		 223MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
224module_param_named(dpm, radeon_dpm, int, 0444);
225
1294d4a3
AD		 226MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
227module_param_named(aspm, radeon_aspm, int, 0444);
228
10ebc0bc
DA		 229MODULE_PARM_DESC(runpm, "PX runtime pm (1 = force enable, 0 = disable, -1 = PX only default)");
230module_param_named(runpm, radeon_runtime_pm, int, 0444);
231
14adc892
CK		 232static struct pci_device_id pciidlist[] = {
233 radeon_PCI_IDS
234};
235
236MODULE_DEVICE_TABLE(pci, pciidlist);
237
238#ifdef CONFIG_DRM_RADEON_UMS
239
0a3e67a4
JB		 240static int radeon_suspend(struct drm_device *dev, pm_message_t state)
241{
242 drm_radeon_private_t *dev_priv = dev->dev_private;
243
03efb885
DA		 244 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
245 return 0;
246
0a3e67a4 247 /* Disable *all* interrupts */
800b6995 248 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4
JB		 249 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
250 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
251 return 0;
252}
253
254static int radeon_resume(struct drm_device *dev)
255{
256 drm_radeon_private_t *dev_priv = dev->dev_private;
257
03efb885
DA		 258 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
259 return 0;
260
0a3e67a4 261 /* Restore interrupt registers */
800b6995 262 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4
JB		 263 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
264 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
265 return 0;
266}
267
10ebc0bc 268
e08e96de
AV		 269static const struct file_operations radeon_driver_old_fops = {
270 .owner = THIS_MODULE,
271 .open = drm_open,
272 .release = drm_release,
273 .unlocked_ioctl = drm_ioctl,
274 .mmap = drm_mmap,
275 .poll = drm_poll,
e08e96de
AV		 276 .read = drm_read,
277#ifdef CONFIG_COMPAT
278 .compat_ioctl = radeon_compat_ioctl,
279#endif
280 .llseek = noop_llseek,
281};
282
771fe6b9 283static struct drm_driver driver_old = {
b5e89ed5 284 .driver_features =
28185647 285 DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
0a3e67a4 286 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
1da177e4 287 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
22eae947
DA		 288 .load = radeon_driver_load,
289 .firstopen = radeon_driver_firstopen,
290 .open = radeon_driver_open,
291 .preclose = radeon_driver_preclose,
292 .postclose = radeon_driver_postclose,
293 .lastclose = radeon_driver_lastclose,
294 .unload = radeon_driver_unload,
0a3e67a4
JB		 295 .suspend = radeon_suspend,
296 .resume = radeon_resume,
297 .get_vblank_counter = radeon_get_vblank_counter,
298 .enable_vblank = radeon_enable_vblank,
299 .disable_vblank = radeon_disable_vblank,
60f2ee0b
DA		 300 .master_create = radeon_master_create,
301 .master_destroy = radeon_master_destroy,
1da177e4
LT		 302 .irq_preinstall = radeon_driver_irq_preinstall,
303 .irq_postinstall = radeon_driver_irq_postinstall,
304 .irq_uninstall = radeon_driver_irq_uninstall,
305 .irq_handler = radeon_driver_irq_handler,
1da177e4
LT		 306 .ioctls = radeon_ioctls,
307 .dma_ioctl = radeon_cp_buffers,
e08e96de 308 .fops = &radeon_driver_old_fops,
22eae947
DA		 309 .name = DRIVER_NAME,
310 .desc = DRIVER_DESC,
311 .date = DRIVER_DATE,
312 .major = DRIVER_MAJOR,
313 .minor = DRIVER_MINOR,
314 .patchlevel = DRIVER_PATCHLEVEL,
1da177e4
LT		 315};
316
14adc892
CK		 317#endif
318
771fe6b9
JG		 319static struct drm_driver kms_driver;
320
30238151 321static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
a56f7428
BH		 322{
323 struct apertures_struct *ap;
324 bool primary = false;
325
326 ap = alloc_apertures(1);
30238151
TR		 327 if (!ap)
328 return -ENOMEM;
329
a56f7428
BH		 330 ap->ranges[0].base = pci_resource_start(pdev, 0);
331 ap->ranges[0].size = pci_resource_len(pdev, 0);
332
333#ifdef CONFIG_X86
334 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
335#endif
336 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
337 kfree(ap);
30238151
TR		 338
339 return 0;
a56f7428
BH		 340}
341
56550d94
GKH		 342static int radeon_pci_probe(struct pci_dev *pdev,
343 const struct pci_device_id *ent)
771fe6b9 344{
30238151
TR		 345 int ret;
346
a56f7428 347 /* Get rid of things like offb */
30238151
TR		 348 ret = radeon_kick_out_firmware_fb(pdev);
349 if (ret)
350 return ret;
a56f7428 351
dcdb1674 352 return drm_get_pci_dev(pdev, ent, &kms_driver);
771fe6b9
JG		 353}
354
355static void
356radeon_pci_remove(struct pci_dev *pdev)
357{
358 struct drm_device *dev = pci_get_drvdata(pdev);
359
360 drm_put_dev(dev);
361}
362
7473e830 363static int radeon_pmops_suspend(struct device *dev)
771fe6b9 364{
7473e830
DA		 365 struct pci_dev *pdev = to_pci_dev(dev);
366 struct drm_device *drm_dev = pci_get_drvdata(pdev);
10ebc0bc 367 return radeon_suspend_kms(drm_dev, true, true);
771fe6b9
JG		 368}
369
7473e830 370static int radeon_pmops_resume(struct device *dev)
771fe6b9 371{
7473e830
DA		 372 struct pci_dev *pdev = to_pci_dev(dev);
373 struct drm_device *drm_dev = pci_get_drvdata(pdev);
10ebc0bc 374 return radeon_resume_kms(drm_dev, true, true);
7473e830
DA		 375}
376
377static int radeon_pmops_freeze(struct device *dev)
378{
379 struct pci_dev *pdev = to_pci_dev(dev);
380 struct drm_device *drm_dev = pci_get_drvdata(pdev);
10ebc0bc 381 return radeon_suspend_kms(drm_dev, false, true);
771fe6b9
JG		 382}
383
7473e830
DA		 384static int radeon_pmops_thaw(struct device *dev)
385{
386 struct pci_dev *pdev = to_pci_dev(dev);
387 struct drm_device *drm_dev = pci_get_drvdata(pdev);
10ebc0bc
DA		 388 return radeon_resume_kms(drm_dev, false, true);
389}
390
391static int radeon_pmops_runtime_suspend(struct device *dev)
392{
393 struct pci_dev *pdev = to_pci_dev(dev);
394 struct drm_device *drm_dev = pci_get_drvdata(pdev);
395 int ret;
396
397 if (radeon_runtime_pm == 0)
398 return -EINVAL;
399
400 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
401 drm_kms_helper_poll_disable(drm_dev);
402 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
403
404 ret = radeon_suspend_kms(drm_dev, false, false);
405 pci_save_state(pdev);
406 pci_disable_device(pdev);
407 pci_set_power_state(pdev, PCI_D3cold);
408 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
409
410 return 0;
411}
412
413static int radeon_pmops_runtime_resume(struct device *dev)
414{
415 struct pci_dev *pdev = to_pci_dev(dev);
416 struct drm_device *drm_dev = pci_get_drvdata(pdev);
417 int ret;
418
419 if (radeon_runtime_pm == 0)
420 return -EINVAL;
421
422 drm_dev->switch_power_state = DRM_SWITCH_POWER_CHANGING;
423
424 pci_set_power_state(pdev, PCI_D0);
425 pci_restore_state(pdev);
426 ret = pci_enable_device(pdev);
427 if (ret)
428 return ret;
429 pci_set_master(pdev);
430
431 ret = radeon_resume_kms(drm_dev, false, false);
432 drm_kms_helper_poll_enable(drm_dev);
433 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
434 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
435 return 0;
436}
437
438static int radeon_pmops_runtime_idle(struct device *dev)
439{
440 struct pci_dev *pdev = to_pci_dev(dev);
441 struct drm_device *drm_dev = pci_get_drvdata(pdev);
442 struct drm_crtc *crtc;
443
444 if (radeon_runtime_pm == 0)
445 return -EBUSY;
446
447 /* are we PX enabled? */
448 if (radeon_runtime_pm == -1 && !radeon_is_px()) {
449 DRM_DEBUG_DRIVER("failing to power off - not px\n");
450 return -EBUSY;
451 }
452
453 list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
454 if (crtc->enabled) {
455 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
456 return -EBUSY;
457 }
458 }
459
460 pm_runtime_mark_last_busy(dev);
461 pm_runtime_autosuspend(dev);
462 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
463 return 1;
464}
465
466long radeon_drm_ioctl(struct file *filp,
467 unsigned int cmd, unsigned long arg)
468{
469 struct drm_file *file_priv = filp->private_data;
470 struct drm_device *dev;
471 long ret;
472 dev = file_priv->minor->dev;
473 ret = pm_runtime_get_sync(dev->dev);
474 if (ret < 0)
475 return ret;
476
477 ret = drm_ioctl(filp, cmd, arg);
478
479 pm_runtime_mark_last_busy(dev->dev);
480 pm_runtime_put_autosuspend(dev->dev);
481 return ret;
7473e830
DA		 482}
483
484static const struct dev_pm_ops radeon_pm_ops = {
485 .suspend = radeon_pmops_suspend,
486 .resume = radeon_pmops_resume,
487 .freeze = radeon_pmops_freeze,
488 .thaw = radeon_pmops_thaw,
489 .poweroff = radeon_pmops_freeze,
490 .restore = radeon_pmops_resume,
10ebc0bc
DA		 491 .runtime_suspend = radeon_pmops_runtime_suspend,
492 .runtime_resume = radeon_pmops_runtime_resume,
493 .runtime_idle = radeon_pmops_runtime_idle,
7473e830
DA		 494};
495
e08e96de
AV		 496static const struct file_operations radeon_driver_kms_fops = {
497 .owner = THIS_MODULE,
498 .open = drm_open,
499 .release = drm_release,
10ebc0bc 500 .unlocked_ioctl = radeon_drm_ioctl,
e08e96de
AV		 501 .mmap = radeon_mmap,
502 .poll = drm_poll,
e08e96de
AV		 503 .read = drm_read,
504#ifdef CONFIG_COMPAT
505 .compat_ioctl = radeon_kms_compat_ioctl,
506#endif
507};
508
846ae41a
MT		 509
510static void
511radeon_pci_shutdown(struct pci_dev *pdev)
512{
513 struct drm_device *dev = pci_get_drvdata(pdev);
514
515 radeon_driver_unload_kms(dev);
516}
517
771fe6b9
JG		 518static struct drm_driver kms_driver = {
519 .driver_features =
28185647 520 DRIVER_USE_AGP |
81e95697 521 DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
f33bcab9 522 DRIVER_PRIME | DRIVER_RENDER,
771fe6b9
JG		 523 .dev_priv_size = 0,
524 .load = radeon_driver_load_kms,
771fe6b9
JG		 525 .open = radeon_driver_open_kms,
526 .preclose = radeon_driver_preclose_kms,
527 .postclose = radeon_driver_postclose_kms,
528 .lastclose = radeon_driver_lastclose_kms,
529 .unload = radeon_driver_unload_kms,
771fe6b9
JG		 530 .get_vblank_counter = radeon_get_vblank_counter_kms,
531 .enable_vblank = radeon_enable_vblank_kms,
532 .disable_vblank = radeon_disable_vblank_kms,
f5a80209
MK		 533 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
534 .get_scanout_position = radeon_get_crtc_scanoutpos,
771fe6b9
JG		 535#if defined(CONFIG_DEBUG_FS)
536 .debugfs_init = radeon_debugfs_init,
537 .debugfs_cleanup = radeon_debugfs_cleanup,
538#endif
539 .irq_preinstall = radeon_driver_irq_preinstall_kms,
540 .irq_postinstall = radeon_driver_irq_postinstall_kms,
541 .irq_uninstall = radeon_driver_irq_uninstall_kms,
542 .irq_handler = radeon_driver_irq_handler_kms,
771fe6b9 543 .ioctls = radeon_ioctls_kms,
771fe6b9 544 .gem_free_object = radeon_gem_object_free,
721604a1
JG		 545 .gem_open_object = radeon_gem_object_open,
546 .gem_close_object = radeon_gem_object_close,
ff72145b
DA		 547 .dumb_create = radeon_mode_dumb_create,
548 .dumb_map_offset = radeon_mode_dumb_mmap,
43387b37 549 .dumb_destroy = drm_gem_dumb_destroy,
e08e96de 550 .fops = &radeon_driver_kms_fops,
40f5cf99
AD		 551
552 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
553 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1e6d17a5
AP		 554 .gem_prime_export = drm_gem_prime_export,
555 .gem_prime_import = drm_gem_prime_import,
556 .gem_prime_pin = radeon_gem_prime_pin,
280cf211 557 .gem_prime_unpin = radeon_gem_prime_unpin,
1e6d17a5
AP		 558 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
559 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
560 .gem_prime_vmap = radeon_gem_prime_vmap,
561 .gem_prime_vunmap = radeon_gem_prime_vunmap,
40f5cf99 562
771fe6b9
JG		 563 .name = DRIVER_NAME,
564 .desc = DRIVER_DESC,
565 .date = DRIVER_DATE,
566 .major = KMS_DRIVER_MAJOR,
567 .minor = KMS_DRIVER_MINOR,
568 .patchlevel = KMS_DRIVER_PATCHLEVEL,
569};
771fe6b9
JG		 570
571static struct drm_driver *driver;
8410ea3b
DA		 572static struct pci_driver *pdriver;
573
14adc892 574#ifdef CONFIG_DRM_RADEON_UMS
8410ea3b
DA		 575static struct pci_driver radeon_pci_driver = {
576 .name = DRIVER_NAME,
577 .id_table = pciidlist,
578};
14adc892 579#endif
8410ea3b
DA		 580
581static struct pci_driver radeon_kms_pci_driver = {
582 .name = DRIVER_NAME,
583 .id_table = pciidlist,
584 .probe = radeon_pci_probe,
585 .remove = radeon_pci_remove,
7473e830 586 .driver.pm = &radeon_pm_ops,
846ae41a 587 .shutdown = radeon_pci_shutdown,
8410ea3b 588};
771fe6b9 589
1da177e4
LT		 590static int __init radeon_init(void)
591{
e9ced8e0
DA		 592#ifdef CONFIG_VGA_CONSOLE
593 if (vgacon_text_force() && radeon_modeset == -1) {
594 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
595 radeon_modeset = 0;
596 }
597#endif
598 /* set to modesetting by default if not nomodeset */
599 if (radeon_modeset == -1)
600 radeon_modeset = 1;
601
771fe6b9
JG		 602 if (radeon_modeset == 1) {
603 DRM_INFO("radeon kernel modesetting enabled.\n");
604 driver = &kms_driver;
8410ea3b 605 pdriver = &radeon_kms_pci_driver;
771fe6b9
JG		 606 driver->driver_features |= DRIVER_MODESET;
607 driver->num_ioctls = radeon_max_kms_ioctl;
6a9ee8af 608 radeon_register_atpx_handler();
14adc892
CK		 609
610 } else {
611#ifdef CONFIG_DRM_RADEON_UMS
612 DRM_INFO("radeon userspace modesetting enabled.\n");
613 driver = &driver_old;
614 pdriver = &radeon_pci_driver;
615 driver->driver_features &= ~DRIVER_MODESET;
616 driver->num_ioctls = radeon_max_ioctl;
617#else
618 DRM_ERROR("No UMS support in radeon module!\n");
619 return -EINVAL;
620#endif
771fe6b9 621 }
14adc892
CK		 622
623 /* let modprobe override vga console setting */
8410ea3b 624 return drm_pci_init(driver, pdriver);
1da177e4
LT		 625}
626
627static void __exit radeon_exit(void)
628{
8410ea3b 629 drm_pci_exit(driver, pdriver);
6a9ee8af 630 radeon_unregister_atpx_handler();
1da177e4
LT		 631}
632
176f613e 633module_init(radeon_init);
1da177e4
LT		 634module_exit(radeon_exit);
635
b5e89ed5
DA		 636MODULE_AUTHOR(DRIVER_AUTHOR);
637MODULE_DESCRIPTION(DRIVER_DESC);
1da177e4 638MODULE_LICENSE("GPL and additional rights");
Linux 6.x block layer and io_uring tree(s)