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drm/radeon: add a module parameter to disable aspm
[linux-2.6-block.git] / drivers / gpu / drm / radeon / radeon_drv.c
CommitLineData
1da177e4
LT		 1/**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
760285e7
DH		 32#include <drm/drmP.h>
33#include <drm/radeon_drm.h>
1da177e4
LT		 34#include "radeon_drv.h"
35
760285e7 36#include <drm/drm_pciids.h>
771fe6b9 37#include <linux/console.h>
e0cd3608 38#include <linux/module.h>
771fe6b9
JG		 39
40
771fe6b9
JG		 41/*
42 * KMS wrapper.
0de1a57b
DA		 43 * - 2.0.0 - initial interface
44 * - 2.1.0 - add square tiling interface
fdb43528 45 * - 2.2.0 - add r6xx/r7xx const buffer support
cae94b0a 46 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
bc35afdb 47 * - 2.4.0 - add crtc id query
148a03bc 48 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
ab9e1f59 49 * - 2.6.0 - add tiling config query (r6xx+), add initial HiZ support (r300->r500)
71901cc4 50 * 2.7.0 - fixups for r600 2D tiling support. (no external ABI change), add eg dyn gpr regs
58bbf018 51 * 2.8.0 - pageflip support, r500 US_FORMAT regs. r500 ARGB2101010 colorbuf, r300->r500 CMASK, clock crystal query
486af189 52 * 2.9.0 - r600 tiling (s3tc,rgtc) working, SET_PREDICATION packet 3 on r600 + eg, backend query
b8709894
AD		 53 * 2.10.0 - fusion 2D tiling
54 * 2.11.0 - backend map, initial compute support for the CS checker
e70f224c 55 * 2.12.0 - RADEON_CS_KEEP_TILING_FLAGS
dd220a00 56 * 2.13.0 - virtual memory support, streamout
285484e2 57 * 2.14.0 - add evergreen tiling informations
609c1e15 58 * 2.15.0 - add max_pipes query
d2609875 59 * 2.16.0 - fix evergreen 2D tiled surface calculation
7c77bf2a 60 * 2.17.0 - add STRMOUT_BASE_UPDATE for r7xx
0f457e48 61 * 2.18.0 - r600-eg: allow "invalid" DB formats
b51ad12a 62 * 2.19.0 - r600-eg: MSAA textures
6759a0a7 63 * 2.20.0 - r600-si: RADEON_INFO_TIMESTAMP query
c116cc94 64 * 2.21.0 - r600-r700: FMASK and CMASK
523885de 65 * 2.22.0 - r600 only: RESOLVE_BOX allowed
46fc8781 66 * 2.23.0 - allow STRMOUT_BASE_UPDATE on RS780 and RS880
61051afd 67 * 2.24.0 - eg only: allow MIP_ADDRESS=0 for MSAA textures
71bfe916 68 * 2.25.0 - eg+: new info request for num SE and num SH
4ac0533a 69 * 2.26.0 - r600-eg: fix htile size computation
8696e33f 70 * 2.27.0 - r600-SI: Add CS ioctl support for async DMA
4613ca14 71 * 2.28.0 - r600-eg: Add MEM_WRITE packet support
c18b1170 72 * 2.29.0 - R500 FP16 color clear registers
774c389f 73 * 2.30.0 - fix for FMASK texturing
a0a53aa8 74 * 2.31.0 - Add fastfb support for rs690
902aaef6 75 * 2.32.0 - new info request for rings working
64d7b8be 76 * 2.33.0 - Add SI tiling mode array query
39aee490 77 * 2.34.0 - Add CIK tiling mode array query
771fe6b9
JG		 78 */
79#define KMS_DRIVER_MAJOR 2
39aee490 80#define KMS_DRIVER_MINOR 34
771fe6b9
JG		 81#define KMS_DRIVER_PATCHLEVEL 0
82int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
83int radeon_driver_unload_kms(struct drm_device *dev);
84int radeon_driver_firstopen_kms(struct drm_device *dev);
85void radeon_driver_lastclose_kms(struct drm_device *dev);
86int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
87void radeon_driver_postclose_kms(struct drm_device *dev,
88 struct drm_file *file_priv);
89void radeon_driver_preclose_kms(struct drm_device *dev,
90 struct drm_file *file_priv);
91int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
92int radeon_resume_kms(struct drm_device *dev);
93u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
94int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
95void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
f5a80209
MK		 96int radeon_get_vblank_timestamp_kms(struct drm_device *dev, int crtc,
97 int *max_error,
98 struct timeval *vblank_time,
99 unsigned flags);
771fe6b9
JG		 100void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
101int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
102void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
103irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
771fe6b9
JG		 104int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
105 struct drm_file *file_priv);
106int radeon_gem_object_init(struct drm_gem_object *obj);
107void radeon_gem_object_free(struct drm_gem_object *obj);
721604a1
JG		 108int radeon_gem_object_open(struct drm_gem_object *obj,
109 struct drm_file *file_priv);
110void radeon_gem_object_close(struct drm_gem_object *obj,
111 struct drm_file *file_priv);
f5a80209
MK		 112extern int radeon_get_crtc_scanoutpos(struct drm_device *dev, int crtc,
113 int *vpos, int *hpos);
771fe6b9
JG		 114extern struct drm_ioctl_desc radeon_ioctls_kms[];
115extern int radeon_max_kms_ioctl;
116int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
ff72145b
DA		 117int radeon_mode_dumb_mmap(struct drm_file *filp,
118 struct drm_device *dev,
119 uint32_t handle, uint64_t *offset_p);
120int radeon_mode_dumb_create(struct drm_file *file_priv,
121 struct drm_device *dev,
122 struct drm_mode_create_dumb *args);
123int radeon_mode_dumb_destroy(struct drm_file *file_priv,
124 struct drm_device *dev,
125 uint32_t handle);
1e6d17a5
AP		 126struct sg_table *radeon_gem_prime_get_sg_table(struct drm_gem_object *obj);
127struct drm_gem_object *radeon_gem_prime_import_sg_table(struct drm_device *dev,
128 size_t size,
129 struct sg_table *sg);
130int radeon_gem_prime_pin(struct drm_gem_object *obj);
280cf211 131void radeon_gem_prime_unpin(struct drm_gem_object *obj);
1e6d17a5
AP		 132void *radeon_gem_prime_vmap(struct drm_gem_object *obj);
133void radeon_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
14adc892
CK		 134extern long radeon_kms_compat_ioctl(struct file *filp, unsigned int cmd,
135 unsigned long arg);
ff72145b 136
771fe6b9
JG		 137#if defined(CONFIG_DEBUG_FS)
138int radeon_debugfs_init(struct drm_minor *minor);
139void radeon_debugfs_cleanup(struct drm_minor *minor);
140#endif
771fe6b9 141
14adc892
CK		 142/* atpx handler */
143#if defined(CONFIG_VGA_SWITCHEROO)
144void radeon_register_atpx_handler(void);
145void radeon_unregister_atpx_handler(void);
146#else
147static inline void radeon_register_atpx_handler(void) {}
148static inline void radeon_unregister_atpx_handler(void) {}
149#endif
1da177e4 150
689b9d74 151int radeon_no_wb;
e9ced8e0 152int radeon_modeset = -1;
771fe6b9
JG		 153int radeon_dynclks = -1;
154int radeon_r4xx_atom = 0;
155int radeon_agpmode = 0;
156int radeon_vram_limit = 0;
157int radeon_gart_size = 512; /* default gart size */
158int radeon_benchmarking = 0;
ecc0b326 159int radeon_testing = 0;
771fe6b9 160int radeon_connector_table = 0;
4ce001ab 161int radeon_tv = 1;
805c2216 162int radeon_audio = 0;
f46c0120 163int radeon_disp_priority = 0;
e2b0a8e1 164int radeon_hw_i2c = 0;
197bbb3d 165int radeon_pcie_gen2 = -1;
a18cee15 166int radeon_msi = -1;
3368ff0c 167int radeon_lockup_timeout = 10000;
a0a53aa8 168int radeon_fastfb = 0;
da321c8a 169int radeon_dpm = -1;
1294d4a3 170int radeon_aspm = -1;
689b9d74 171
61a2d07d 172MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
689b9d74
DA		 173module_param_named(no_wb, radeon_no_wb, int, 0444);
174
771fe6b9
JG		 175MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
176module_param_named(modeset, radeon_modeset, int, 0400);
177
178MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
179module_param_named(dynclks, radeon_dynclks, int, 0444);
180
181MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
182module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
183
184MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
185module_param_named(vramlimit, radeon_vram_limit, int, 0600);
186
187MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
188module_param_named(agpmode, radeon_agpmode, int, 0444);
189
27d4d052 190MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc)");
771fe6b9
JG		 191module_param_named(gartsize, radeon_gart_size, int, 0600);
192
193MODULE_PARM_DESC(benchmark, "Run benchmark");
194module_param_named(benchmark, radeon_benchmarking, int, 0444);
195
ecc0b326
MD		 196MODULE_PARM_DESC(test, "Run tests");
197module_param_named(test, radeon_testing, int, 0444);
198
771fe6b9
JG		 199MODULE_PARM_DESC(connector_table, "Force connector table");
200module_param_named(connector_table, radeon_connector_table, int, 0444);
4ce001ab
DA		 201
202MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
203module_param_named(tv, radeon_tv, int, 0444);
771fe6b9 204
805c2216 205MODULE_PARM_DESC(audio, "Audio enable (1 = enable)");
dafc3bd5
CK		 206module_param_named(audio, radeon_audio, int, 0444);
207
f46c0120
AD		 208MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
209module_param_named(disp_priority, radeon_disp_priority, int, 0444);
210
e2b0a8e1
AD		 211MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
212module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
213
197bbb3d 214MODULE_PARM_DESC(pcie_gen2, "PCIE Gen2 mode (-1 = auto, 0 = disable, 1 = enable)");
d42dd579
AD		 215module_param_named(pcie_gen2, radeon_pcie_gen2, int, 0444);
216
a18cee15
AD		 217MODULE_PARM_DESC(msi, "MSI support (1 = enable, 0 = disable, -1 = auto)");
218module_param_named(msi, radeon_msi, int, 0444);
219
3368ff0c
CK		 220MODULE_PARM_DESC(lockup_timeout, "GPU lockup timeout in ms (defaul 10000 = 10 seconds, 0 = disable)");
221module_param_named(lockup_timeout, radeon_lockup_timeout, int, 0444);
222
a0a53aa8
SL		 223MODULE_PARM_DESC(fastfb, "Direct FB access for IGP chips (0 = disable, 1 = enable)");
224module_param_named(fastfb, radeon_fastfb, int, 0444);
225
da321c8a
AD		 226MODULE_PARM_DESC(dpm, "DPM support (1 = enable, 0 = disable, -1 = auto)");
227module_param_named(dpm, radeon_dpm, int, 0444);
228
1294d4a3
AD		 229MODULE_PARM_DESC(aspm, "ASPM support (1 = enable, 0 = disable, -1 = auto)");
230module_param_named(aspm, radeon_aspm, int, 0444);
231
14adc892
CK		 232static struct pci_device_id pciidlist[] = {
233 radeon_PCI_IDS
234};
235
236MODULE_DEVICE_TABLE(pci, pciidlist);
237
238#ifdef CONFIG_DRM_RADEON_UMS
239
0a3e67a4
JB		 240static int radeon_suspend(struct drm_device *dev, pm_message_t state)
241{
242 drm_radeon_private_t *dev_priv = dev->dev_private;
243
03efb885
DA		 244 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
245 return 0;
246
0a3e67a4 247 /* Disable *all* interrupts */
800b6995 248 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4
JB		 249 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
250 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
251 return 0;
252}
253
254static int radeon_resume(struct drm_device *dev)
255{
256 drm_radeon_private_t *dev_priv = dev->dev_private;
257
03efb885
DA		 258 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
259 return 0;
260
0a3e67a4 261 /* Restore interrupt registers */
800b6995 262 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4
JB		 263 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
264 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
265 return 0;
266}
267
e08e96de
AV		 268static const struct file_operations radeon_driver_old_fops = {
269 .owner = THIS_MODULE,
270 .open = drm_open,
271 .release = drm_release,
272 .unlocked_ioctl = drm_ioctl,
273 .mmap = drm_mmap,
274 .poll = drm_poll,
275 .fasync = drm_fasync,
276 .read = drm_read,
277#ifdef CONFIG_COMPAT
278 .compat_ioctl = radeon_compat_ioctl,
279#endif
280 .llseek = noop_llseek,
281};
282
771fe6b9 283static struct drm_driver driver_old = {
b5e89ed5
DA		 284 .driver_features =
285 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
0a3e67a4 286 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
1da177e4 287 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
22eae947
DA		 288 .load = radeon_driver_load,
289 .firstopen = radeon_driver_firstopen,
290 .open = radeon_driver_open,
291 .preclose = radeon_driver_preclose,
292 .postclose = radeon_driver_postclose,
293 .lastclose = radeon_driver_lastclose,
294 .unload = radeon_driver_unload,
0a3e67a4
JB		 295 .suspend = radeon_suspend,
296 .resume = radeon_resume,
297 .get_vblank_counter = radeon_get_vblank_counter,
298 .enable_vblank = radeon_enable_vblank,
299 .disable_vblank = radeon_disable_vblank,
60f2ee0b
DA		 300 .master_create = radeon_master_create,
301 .master_destroy = radeon_master_destroy,
1da177e4
LT		 302 .irq_preinstall = radeon_driver_irq_preinstall,
303 .irq_postinstall = radeon_driver_irq_postinstall,
304 .irq_uninstall = radeon_driver_irq_uninstall,
305 .irq_handler = radeon_driver_irq_handler,
1da177e4
LT		 306 .ioctls = radeon_ioctls,
307 .dma_ioctl = radeon_cp_buffers,
e08e96de 308 .fops = &radeon_driver_old_fops,
22eae947
DA		 309 .name = DRIVER_NAME,
310 .desc = DRIVER_DESC,
311 .date = DRIVER_DATE,
312 .major = DRIVER_MAJOR,
313 .minor = DRIVER_MINOR,
314 .patchlevel = DRIVER_PATCHLEVEL,
1da177e4
LT		 315};
316
14adc892
CK		 317#endif
318
771fe6b9
JG		 319static struct drm_driver kms_driver;
320
30238151 321static int radeon_kick_out_firmware_fb(struct pci_dev *pdev)
a56f7428
BH		 322{
323 struct apertures_struct *ap;
324 bool primary = false;
325
326 ap = alloc_apertures(1);
30238151
TR		 327 if (!ap)
328 return -ENOMEM;
329
a56f7428
BH		 330 ap->ranges[0].base = pci_resource_start(pdev, 0);
331 ap->ranges[0].size = pci_resource_len(pdev, 0);
332
333#ifdef CONFIG_X86
334 primary = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
335#endif
336 remove_conflicting_framebuffers(ap, "radeondrmfb", primary);
337 kfree(ap);
30238151
TR		 338
339 return 0;
a56f7428
BH		 340}
341
56550d94
GKH		 342static int radeon_pci_probe(struct pci_dev *pdev,
343 const struct pci_device_id *ent)
771fe6b9 344{
30238151
TR		 345 int ret;
346
a56f7428 347 /* Get rid of things like offb */
30238151
TR		 348 ret = radeon_kick_out_firmware_fb(pdev);
349 if (ret)
350 return ret;
a56f7428 351
dcdb1674 352 return drm_get_pci_dev(pdev, ent, &kms_driver);
771fe6b9
JG		 353}
354
355static void
356radeon_pci_remove(struct pci_dev *pdev)
357{
358 struct drm_device *dev = pci_get_drvdata(pdev);
359
360 drm_put_dev(dev);
361}
362
363static int
364radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
365{
366 struct drm_device *dev = pci_get_drvdata(pdev);
367 return radeon_suspend_kms(dev, state);
368}
369
370static int
371radeon_pci_resume(struct pci_dev *pdev)
372{
373 struct drm_device *dev = pci_get_drvdata(pdev);
374 return radeon_resume_kms(dev);
375}
376
e08e96de
AV		 377static const struct file_operations radeon_driver_kms_fops = {
378 .owner = THIS_MODULE,
379 .open = drm_open,
380 .release = drm_release,
381 .unlocked_ioctl = drm_ioctl,
382 .mmap = radeon_mmap,
383 .poll = drm_poll,
384 .fasync = drm_fasync,
385 .read = drm_read,
386#ifdef CONFIG_COMPAT
387 .compat_ioctl = radeon_kms_compat_ioctl,
388#endif
389};
390
771fe6b9
JG		 391static struct drm_driver kms_driver = {
392 .driver_features =
393 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
40f5cf99
AD		 394 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM |
395 DRIVER_PRIME,
771fe6b9
JG		 396 .dev_priv_size = 0,
397 .load = radeon_driver_load_kms,
398 .firstopen = radeon_driver_firstopen_kms,
399 .open = radeon_driver_open_kms,
400 .preclose = radeon_driver_preclose_kms,
401 .postclose = radeon_driver_postclose_kms,
402 .lastclose = radeon_driver_lastclose_kms,
403 .unload = radeon_driver_unload_kms,
404 .suspend = radeon_suspend_kms,
405 .resume = radeon_resume_kms,
406 .get_vblank_counter = radeon_get_vblank_counter_kms,
407 .enable_vblank = radeon_enable_vblank_kms,
408 .disable_vblank = radeon_disable_vblank_kms,
f5a80209
MK		 409 .get_vblank_timestamp = radeon_get_vblank_timestamp_kms,
410 .get_scanout_position = radeon_get_crtc_scanoutpos,
771fe6b9
JG		 411#if defined(CONFIG_DEBUG_FS)
412 .debugfs_init = radeon_debugfs_init,
413 .debugfs_cleanup = radeon_debugfs_cleanup,
414#endif
415 .irq_preinstall = radeon_driver_irq_preinstall_kms,
416 .irq_postinstall = radeon_driver_irq_postinstall_kms,
417 .irq_uninstall = radeon_driver_irq_uninstall_kms,
418 .irq_handler = radeon_driver_irq_handler_kms,
771fe6b9
JG		 419 .ioctls = radeon_ioctls_kms,
420 .gem_init_object = radeon_gem_object_init,
421 .gem_free_object = radeon_gem_object_free,
721604a1
JG		 422 .gem_open_object = radeon_gem_object_open,
423 .gem_close_object = radeon_gem_object_close,
771fe6b9 424 .dma_ioctl = radeon_dma_ioctl_kms,
ff72145b
DA		 425 .dumb_create = radeon_mode_dumb_create,
426 .dumb_map_offset = radeon_mode_dumb_mmap,
427 .dumb_destroy = radeon_mode_dumb_destroy,
e08e96de 428 .fops = &radeon_driver_kms_fops,
40f5cf99
AD		 429
430 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
431 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
1e6d17a5
AP		 432 .gem_prime_export = drm_gem_prime_export,
433 .gem_prime_import = drm_gem_prime_import,
434 .gem_prime_pin = radeon_gem_prime_pin,
280cf211 435 .gem_prime_unpin = radeon_gem_prime_unpin,
1e6d17a5
AP		 436 .gem_prime_get_sg_table = radeon_gem_prime_get_sg_table,
437 .gem_prime_import_sg_table = radeon_gem_prime_import_sg_table,
438 .gem_prime_vmap = radeon_gem_prime_vmap,
439 .gem_prime_vunmap = radeon_gem_prime_vunmap,
40f5cf99 440
771fe6b9
JG		 441 .name = DRIVER_NAME,
442 .desc = DRIVER_DESC,
443 .date = DRIVER_DATE,
444 .major = KMS_DRIVER_MAJOR,
445 .minor = KMS_DRIVER_MINOR,
446 .patchlevel = KMS_DRIVER_PATCHLEVEL,
447};
771fe6b9
JG		 448
449static struct drm_driver *driver;
8410ea3b
DA		 450static struct pci_driver *pdriver;
451
14adc892 452#ifdef CONFIG_DRM_RADEON_UMS
8410ea3b
DA		 453static struct pci_driver radeon_pci_driver = {
454 .name = DRIVER_NAME,
455 .id_table = pciidlist,
456};
14adc892 457#endif
8410ea3b
DA		 458
459static struct pci_driver radeon_kms_pci_driver = {
460 .name = DRIVER_NAME,
461 .id_table = pciidlist,
462 .probe = radeon_pci_probe,
463 .remove = radeon_pci_remove,
464 .suspend = radeon_pci_suspend,
465 .resume = radeon_pci_resume,
466};
771fe6b9 467
1da177e4
LT		 468static int __init radeon_init(void)
469{
e9ced8e0
DA		 470#ifdef CONFIG_VGA_CONSOLE
471 if (vgacon_text_force() && radeon_modeset == -1) {
472 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
473 radeon_modeset = 0;
474 }
475#endif
476 /* set to modesetting by default if not nomodeset */
477 if (radeon_modeset == -1)
478 radeon_modeset = 1;
479
771fe6b9
JG		 480 if (radeon_modeset == 1) {
481 DRM_INFO("radeon kernel modesetting enabled.\n");
482 driver = &kms_driver;
8410ea3b 483 pdriver = &radeon_kms_pci_driver;
771fe6b9
JG		 484 driver->driver_features |= DRIVER_MODESET;
485 driver->num_ioctls = radeon_max_kms_ioctl;
6a9ee8af 486 radeon_register_atpx_handler();
14adc892
CK		 487
488 } else {
489#ifdef CONFIG_DRM_RADEON_UMS
490 DRM_INFO("radeon userspace modesetting enabled.\n");
491 driver = &driver_old;
492 pdriver = &radeon_pci_driver;
493 driver->driver_features &= ~DRIVER_MODESET;
494 driver->num_ioctls = radeon_max_ioctl;
495#else
496 DRM_ERROR("No UMS support in radeon module!\n");
497 return -EINVAL;
498#endif
771fe6b9 499 }
14adc892
CK		 500
501 /* let modprobe override vga console setting */
8410ea3b 502 return drm_pci_init(driver, pdriver);
1da177e4
LT		 503}
504
505static void __exit radeon_exit(void)
506{
8410ea3b 507 drm_pci_exit(driver, pdriver);
6a9ee8af 508 radeon_unregister_atpx_handler();
1da177e4
LT		 509}
510
176f613e 511module_init(radeon_init);
1da177e4
LT		 512module_exit(radeon_exit);
513
b5e89ed5
DA		 514MODULE_AUTHOR(DRIVER_AUTHOR);
515MODULE_DESCRIPTION(DRIVER_DESC);
1da177e4 516MODULE_LICENSE("GPL and additional rights");
Linux 6.x block layer and io_uring tree(s)