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drm/doc: polish for sturct drm_connector
[linux-2.6-block.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
JG		 1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
760285e7
DH		 26#include <drm/drmP.h>
27#include <drm/drm_edid.h>
28#include <drm/drm_crtc_helper.h>
29#include <drm/drm_fb_helper.h>
9843ead0 30#include <drm/drm_dp_mst_helper.h>
760285e7 31#include <drm/radeon_drm.h>
771fe6b9 32#include "radeon.h"
1a626b68 33#include "radeon_audio.h"
923f6848 34#include "atom.h"
771fe6b9 35
10ebc0bc 36#include <linux/pm_runtime.h>
47eb8f73 37#include <linux/vga_switcheroo.h>
10ebc0bc 38
9843ead0
DA		 39static int radeon_dp_handle_hpd(struct drm_connector *connector)
40{
41 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
42 int ret;
43
44 ret = radeon_dp_mst_check_status(radeon_connector);
45 if (ret == -EINVAL)
46 return 1;
47 return 0;
48}
d4877cf2
AD		 49void radeon_connector_hotplug(struct drm_connector *connector)
50{
51 struct drm_device *dev = connector->dev;
52 struct radeon_device *rdev = dev->dev_private;
53 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
54
9843ead0
DA		 55 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
56 struct radeon_connector_atom_dig *dig_connector =
57 radeon_connector->con_priv;
58
59 if (radeon_connector->is_mst_connector)
60 return;
61 if (dig_connector->is_mst) {
62 radeon_dp_handle_hpd(connector);
63 return;
64 }
65 }
cbac9543
AD		 66 /* bail if the connector does not have hpd pin, e.g.,
67 * VGA, TV, etc.
68 */
69 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
70 return;
71
1e85e1d0 72 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 73
73104b5c 74 /* if the connector is already off, don't turn it back on */
6e9f798d 75 /* FIXME: This access isn't protected by any locks. */
73104b5c
AD		 76 if (connector->dpms != DRM_MODE_DPMS_ON)
77 return;
78
d5811e87
AD		 79 /* just deal with DP (not eDP) here. */
80 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
266dcba5
JG		 81 struct radeon_connector_atom_dig *dig_connector =
82 radeon_connector->con_priv;
7c3ed0fd 83
266dcba5
JG		 84 /* if existing sink type was not DP no need to retrain */
85 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
86 return;
87
88 /* first get sink type as it may be reset after (un)plug */
89 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
90 /* don't do anything if sink is not display port, i.e.,
91 * passive dp->(dvi|hdmi) adaptor
92 */
2681bc79
MD		 93 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT &&
94 radeon_hpd_sense(rdev, radeon_connector->hpd.hpd) &&
95 radeon_dp_needs_link_train(radeon_connector)) {
96 /* Don't start link training before we have the DPCD */
97 if (!radeon_dp_getdpcd(radeon_connector))
98 return;
924f92bf 99
2681bc79
MD		 100 /* Turn the connector off and back on immediately, which
101 * will trigger link training
102 */
103 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
104 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
266dcba5 105 }
d4877cf2 106 }
d4877cf2
AD		 107}
108
445282db
DA		 109static void radeon_property_change_mode(struct drm_encoder *encoder)
110{
111 struct drm_crtc *crtc = encoder->crtc;
112
113 if (crtc && crtc->enabled) {
114 drm_crtc_helper_set_mode(crtc, &crtc->mode,
f4510a27 115 crtc->x, crtc->y, crtc->primary->fb);
445282db
DA		 116 }
117}
eccea792
AD		 118
119int radeon_get_monitor_bpc(struct drm_connector *connector)
120{
121 struct drm_device *dev = connector->dev;
122 struct radeon_device *rdev = dev->dev_private;
123 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
124 struct radeon_connector_atom_dig *dig_connector;
125 int bpc = 8;
ea292861 126 int mode_clock, max_tmds_clock;
eccea792
AD		 127
128 switch (connector->connector_type) {
129 case DRM_MODE_CONNECTOR_DVII:
130 case DRM_MODE_CONNECTOR_HDMIB:
131 if (radeon_connector->use_digital) {
377bd8a9 132 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 133 if (connector->display_info.bpc)
134 bpc = connector->display_info.bpc;
135 }
136 }
137 break;
138 case DRM_MODE_CONNECTOR_DVID:
139 case DRM_MODE_CONNECTOR_HDMIA:
377bd8a9 140 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 141 if (connector->display_info.bpc)
142 bpc = connector->display_info.bpc;
143 }
144 break;
145 case DRM_MODE_CONNECTOR_DisplayPort:
146 dig_connector = radeon_connector->con_priv;
147 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
148 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
377bd8a9 149 drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 150 if (connector->display_info.bpc)
151 bpc = connector->display_info.bpc;
152 }
153 break;
154 case DRM_MODE_CONNECTOR_eDP:
155 case DRM_MODE_CONNECTOR_LVDS:
156 if (connector->display_info.bpc)
157 bpc = connector->display_info.bpc;
158 else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {
319d1e14 159 const struct drm_connector_helper_funcs *connector_funcs =
eccea792
AD		 160 connector->helper_private;
161 struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
162 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
163 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
164
165 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
166 bpc = 6;
167 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
168 bpc = 8;
169 }
170 break;
171 }
89b92339 172
377bd8a9 173 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
89b92339
MK		 174 /* hdmi deep color only implemented on DCE4+ */
175 if ((bpc > 8) && !ASIC_IS_DCE4(rdev)) {
176 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n",
72082093 177 connector->name, bpc);
89b92339
MK		 178 bpc = 8;
179 }
180
181 /*
182 * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make
183 * much sense without support for > 12 bpc framebuffers. RGB 4:4:4 at
184 * 12 bpc is always supported on hdmi deep color sinks, as this is
185 * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum.
186 */
187 if (bpc > 12) {
188 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
72082093 189 connector->name, bpc);
89b92339
MK		 190 bpc = 12;
191 }
ea292861
MK		 192
193 /* Any defined maximum tmds clock limit we must not exceed? */
2a272ca9 194 if (connector->display_info.max_tmds_clock > 0) {
ea292861
MK		 195 /* mode_clock is clock in kHz for mode to be modeset on this connector */
196 mode_clock = radeon_connector->pixelclock_for_modeset;
197
198 /* Maximum allowable input clock in kHz */
2a272ca9 199 max_tmds_clock = connector->display_info.max_tmds_clock;
ea292861
MK		 200
201 DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
202 connector->name, mode_clock, max_tmds_clock);
203
204 /* Check if bpc is within clock limit. Try to degrade gracefully otherwise */
205 if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
206 if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) &&
207 (mode_clock * 5/4 <= max_tmds_clock))
208 bpc = 10;
209 else
210 bpc = 8;
211
212 DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",
213 connector->name, bpc);
214 }
215
216 if ((bpc == 10) && (mode_clock * 5/4 > max_tmds_clock)) {
217 bpc = 8;
218 DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",
219 connector->name, bpc);
220 }
221 }
9f51e2e0
MK		 222 else if (bpc > 8) {
223 /* max_tmds_clock missing, but hdmi spec mandates it for deep color. */
224 DRM_DEBUG("%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n",
225 connector->name);
226 bpc = 8;
227 }
89b92339
MK		 228 }
229
9f51e2e0
MK		 230 if ((radeon_deep_color == 0) && (bpc > 8)) {
231 DRM_DEBUG("%s: Deep color disabled. Set radeon module param deep_color=1 to enable.\n",
232 connector->name);
a624f429 233 bpc = 8;
9f51e2e0 234 }
a624f429 235
89b92339 236 DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
72082093 237 connector->name, connector->display_info.bpc, bpc);
89b92339 238
eccea792
AD		 239 return bpc;
240}
241
771fe6b9
JG		 242static void
243radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
244{
245 struct drm_device *dev = connector->dev;
246 struct radeon_device *rdev = dev->dev_private;
7b71ca24
VS		 247 struct drm_encoder *best_encoder;
248 struct drm_encoder *encoder;
319d1e14 249 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
771fe6b9
JG		 250 bool connected;
251 int i;
252
253 best_encoder = connector_funcs->best_encoder(connector);
254
7b71ca24 255 drm_connector_for_each_possible_encoder(connector, encoder, i) {
771fe6b9
JG		 256 if ((encoder == best_encoder) && (status == connector_status_connected))
257 connected = true;
258 else
259 connected = false;
260
261 if (rdev->is_atom_bios)
262 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
263 else
264 radeon_combios_connected_scratch_regs(connector, encoder, connected);
771fe6b9
JG		 265 }
266}
267
1109ca09 268static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
445282db 269{
445282db
DA		 270 struct drm_encoder *encoder;
271 int i;
272
7b71ca24 273 drm_connector_for_each_possible_encoder(connector, encoder, i) {
445282db
DA		 274 if (encoder->encoder_type == encoder_type)
275 return encoder;
276 }
7b71ca24 277
445282db
DA		 278 return NULL;
279}
280
377bd8a9
AD		 281struct edid *radeon_connector_edid(struct drm_connector *connector)
282{
283 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
284 struct drm_property_blob *edid_blob = connector->edid_blob_ptr;
285
286 if (radeon_connector->edid) {
287 return radeon_connector->edid;
288 } else if (edid_blob) {
289 struct edid *edid = kmemdup(edid_blob->data, edid_blob->length, GFP_KERNEL);
290 if (edid)
291 radeon_connector->edid = edid;
292 }
293 return radeon_connector->edid;
294}
295
72a5c970
AD		 296static void radeon_connector_get_edid(struct drm_connector *connector)
297{
298 struct drm_device *dev = connector->dev;
299 struct radeon_device *rdev = dev->dev_private;
300 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
301
302 if (radeon_connector->edid)
303 return;
304
305 /* on hw with routers, select right port */
306 if (radeon_connector->router.ddc_valid)
307 radeon_router_select_ddc_port(radeon_connector);
308
309 if ((radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
310 ENCODER_OBJECT_ID_NONE) &&
311 radeon_connector->ddc_bus->has_aux) {
312 radeon_connector->edid = drm_get_edid(connector,
313 &radeon_connector->ddc_bus->aux.ddc);
314 } else if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
315 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
316 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
317
318 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
319 dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) &&
320 radeon_connector->ddc_bus->has_aux)
321 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
322 &radeon_connector->ddc_bus->aux.ddc);
323 else if (radeon_connector->ddc_bus)
324 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
325 &radeon_connector->ddc_bus->adapter);
47eb8f73
LW		 326 } else if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC &&
327 connector->connector_type == DRM_MODE_CONNECTOR_LVDS &&
328 radeon_connector->ddc_bus) {
329 radeon_connector->edid = drm_get_edid_switcheroo(&radeon_connector->base,
330 &radeon_connector->ddc_bus->adapter);
72a5c970
AD		 331 } else if (radeon_connector->ddc_bus) {
332 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
333 &radeon_connector->ddc_bus->adapter);
334 }
335
336 if (!radeon_connector->edid) {
13485794
AD		 337 /* don't fetch the edid from the vbios if ddc fails and runpm is
338 * enabled so we report disconnected.
339 */
340 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
341 return;
342
72a5c970
AD		 343 if (rdev->is_atom_bios) {
344 /* some laptops provide a hardcoded edid in rom for LCDs */
345 if (((connector->connector_type == DRM_MODE_CONNECTOR_LVDS) ||
346 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)))
347 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
348 } else {
349 /* some servers provide a hardcoded edid in rom for KVMs */
350 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
351 }
352 }
353}
354
355static void radeon_connector_free_edid(struct drm_connector *connector)
356{
357 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
358
359 if (radeon_connector->edid) {
360 kfree(radeon_connector->edid);
361 radeon_connector->edid = NULL;
362 }
363}
364
365static int radeon_ddc_get_modes(struct drm_connector *connector)
366{
367 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
368 int ret;
369
370 if (radeon_connector->edid) {
371 drm_mode_connector_update_edid_property(connector, radeon_connector->edid);
372 ret = drm_add_edid_modes(connector, radeon_connector->edid);
72a5c970
AD		 373 return ret;
374 }
375 drm_mode_connector_update_edid_property(connector, NULL);
376 return 0;
377}
378
1109ca09 379static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
771fe6b9 380{
7b71ca24
VS		 381 struct drm_encoder *encoder;
382 int i;
383
384 /* pick the first one */
385 drm_connector_for_each_possible_encoder(connector, encoder, i)
386 return encoder;
387
771fe6b9
JG		 388 return NULL;
389}
390
da997620
AD		 391static void radeon_get_native_mode(struct drm_connector *connector)
392{
393 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
394 struct radeon_encoder *radeon_encoder;
395
396 if (encoder == NULL)
397 return;
398
399 radeon_encoder = to_radeon_encoder(encoder);
400
401 if (!list_empty(&connector->probed_modes)) {
402 struct drm_display_mode *preferred_mode =
403 list_first_entry(&connector->probed_modes,
404 struct drm_display_mode, head);
405
406 radeon_encoder->native_mode = *preferred_mode;
407 } else {
408 radeon_encoder->native_mode.clock = 0;
409 }
410}
411
4ce001ab
DA		 412/*
413 * radeon_connector_analog_encoder_conflict_solve
414 * - search for other connectors sharing this encoder
415 * if priority is true, then set them disconnected if this is connected
416 * if priority is false, set us disconnected if they are connected
417 */
418static enum drm_connector_status
419radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
420 struct drm_encoder *encoder,
421 enum drm_connector_status current_status,
422 bool priority)
423{
424 struct drm_device *dev = connector->dev;
425 struct drm_connector *conflict;
08d07511 426 struct radeon_connector *radeon_conflict;
4ce001ab
DA		 427
428 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
7b71ca24
VS		 429 struct drm_encoder *enc;
430 int i;
431
4ce001ab
DA		 432 if (conflict == connector)
433 continue;
434
08d07511 435 radeon_conflict = to_radeon_connector(conflict);
4ce001ab 436
7b71ca24 437 drm_connector_for_each_possible_encoder(conflict, enc, i) {
4ce001ab 438 /* if the IDs match */
7b71ca24 439 if (enc == encoder) {
4ce001ab
DA		 440 if (conflict->status != connector_status_connected)
441 continue;
08d07511
AD		 442
443 if (radeon_conflict->use_digital)
444 continue;
4ce001ab
DA		 445
446 if (priority == true) {
72082093
JN		 447 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n",
448 conflict->name);
449 DRM_DEBUG_KMS("in favor of %s\n",
450 connector->name);
4ce001ab
DA		 451 conflict->status = connector_status_disconnected;
452 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
453 } else {
72082093
JN		 454 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n",
455 connector->name);
456 DRM_DEBUG_KMS("in favor of %s\n",
457 conflict->name);
4ce001ab
DA		 458 current_status = connector_status_disconnected;
459 }
460 break;
461 }
462 }
463 }
464 return current_status;
465
466}
467
771fe6b9
JG		 468static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
469{
470 struct drm_device *dev = encoder->dev;
471 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
472 struct drm_display_mode *mode = NULL;
de2103e4 473 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 474
de2103e4
AD		 475 if (native_mode->hdisplay != 0 &&
476 native_mode->vdisplay != 0 &&
477 native_mode->clock != 0) {
fb06ca8f 478 mode = drm_mode_duplicate(dev, native_mode);
771fe6b9
JG		 479 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
480 drm_mode_set_name(mode);
481
d9fdaafb 482 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD		 483 } else if (native_mode->hdisplay != 0 &&
484 native_mode->vdisplay != 0) {
485 /* mac laptops without an edid */
486 /* Note that this is not necessarily the exact panel mode,
487 * but an approximation based on the cvt formula. For these
488 * systems we should ideally read the mode info out of the
489 * registers or add a mode table, but this works and is much
490 * simpler.
491 */
492 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
493 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 494 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
771fe6b9
JG		 495 }
496 return mode;
497}
498
923f6848
AD		 499static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
500{
501 struct drm_device *dev = encoder->dev;
502 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
503 struct drm_display_mode *mode = NULL;
de2103e4 504 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
923f6848
AD		 505 int i;
506 struct mode_size {
507 int w;
508 int h;
509 } common_modes[17] = {
510 { 640, 480},
511 { 720, 480},
512 { 800, 600},
513 { 848, 480},
514 {1024, 768},
515 {1152, 768},
516 {1280, 720},
517 {1280, 800},
518 {1280, 854},
519 {1280, 960},
520 {1280, 1024},
521 {1440, 900},
522 {1400, 1050},
523 {1680, 1050},
524 {1600, 1200},
525 {1920, 1080},
526 {1920, 1200}
527 };
528
529 for (i = 0; i < 17; i++) {
dfdd6467
AD		 530 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
531 if (common_modes[i].w > 1024 ||
532 common_modes[i].h > 768)
533 continue;
534 }
923f6848 535 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
de2103e4
AD		 536 if (common_modes[i].w > native_mode->hdisplay ||
537 common_modes[i].h > native_mode->vdisplay ||
538 (common_modes[i].w == native_mode->hdisplay &&
539 common_modes[i].h == native_mode->vdisplay))
923f6848
AD		 540 continue;
541 }
542 if (common_modes[i].w < 320 || common_modes[i].h < 200)
543 continue;
544
d50ba256 545 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
923f6848
AD		 546 drm_mode_probed_add(connector, mode);
547 }
548}
549
1109ca09 550static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
771fe6b9
JG		 551 uint64_t val)
552{
445282db
DA		 553 struct drm_device *dev = connector->dev;
554 struct radeon_device *rdev = dev->dev_private;
555 struct drm_encoder *encoder;
556 struct radeon_encoder *radeon_encoder;
557
558 if (property == rdev->mode_info.coherent_mode_property) {
559 struct radeon_encoder_atom_dig *dig;
ce227c41 560 bool new_coherent_mode;
445282db
DA		 561
562 /* need to find digital encoder on connector */
563 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
564 if (!encoder)
565 return 0;
566
567 radeon_encoder = to_radeon_encoder(encoder);
568
569 if (!radeon_encoder->enc_priv)
570 return 0;
571
572 dig = radeon_encoder->enc_priv;
ce227c41
DA		 573 new_coherent_mode = val ? true : false;
574 if (dig->coherent_mode != new_coherent_mode) {
575 dig->coherent_mode = new_coherent_mode;
576 radeon_property_change_mode(&radeon_encoder->base);
577 }
445282db
DA		 578 }
579
8666c076
AD		 580 if (property == rdev->mode_info.audio_property) {
581 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
582 /* need to find digital encoder on connector */
583 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
584 if (!encoder)
585 return 0;
586
587 radeon_encoder = to_radeon_encoder(encoder);
588
589 if (radeon_connector->audio != val) {
590 radeon_connector->audio = val;
591 radeon_property_change_mode(&radeon_encoder->base);
592 }
593 }
594
6214bb74
AD		 595 if (property == rdev->mode_info.dither_property) {
596 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
597 /* need to find digital encoder on connector */
598 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
599 if (!encoder)
600 return 0;
601
602 radeon_encoder = to_radeon_encoder(encoder);
603
604 if (radeon_connector->dither != val) {
605 radeon_connector->dither = val;
606 radeon_property_change_mode(&radeon_encoder->base);
607 }
608 }
609
5b1714d3
AD		 610 if (property == rdev->mode_info.underscan_property) {
611 /* need to find digital encoder on connector */
612 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
613 if (!encoder)
614 return 0;
615
616 radeon_encoder = to_radeon_encoder(encoder);
617
618 if (radeon_encoder->underscan_type != val) {
619 radeon_encoder->underscan_type = val;
620 radeon_property_change_mode(&radeon_encoder->base);
621 }
622 }
623
5bccf5e3
MG		 624 if (property == rdev->mode_info.underscan_hborder_property) {
625 /* need to find digital encoder on connector */
626 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
627 if (!encoder)
628 return 0;
629
630 radeon_encoder = to_radeon_encoder(encoder);
631
632 if (radeon_encoder->underscan_hborder != val) {
633 radeon_encoder->underscan_hborder = val;
634 radeon_property_change_mode(&radeon_encoder->base);
635 }
636 }
637
638 if (property == rdev->mode_info.underscan_vborder_property) {
639 /* need to find digital encoder on connector */
640 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
641 if (!encoder)
642 return 0;
643
644 radeon_encoder = to_radeon_encoder(encoder);
645
646 if (radeon_encoder->underscan_vborder != val) {
647 radeon_encoder->underscan_vborder = val;
648 radeon_property_change_mode(&radeon_encoder->base);
649 }
650 }
651
445282db
DA		 652 if (property == rdev->mode_info.tv_std_property) {
653 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
654 if (!encoder) {
655 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
656 }
657
658 if (!encoder)
659 return 0;
660
661 radeon_encoder = to_radeon_encoder(encoder);
662 if (!radeon_encoder->enc_priv)
663 return 0;
643acacf 664 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA		 665 struct radeon_encoder_atom_dac *dac_int;
666 dac_int = radeon_encoder->enc_priv;
667 dac_int->tv_std = val;
668 } else {
669 struct radeon_encoder_tv_dac *dac_int;
670 dac_int = radeon_encoder->enc_priv;
671 dac_int->tv_std = val;
672 }
673 radeon_property_change_mode(&radeon_encoder->base);
674 }
675
676 if (property == rdev->mode_info.load_detect_property) {
677 struct radeon_connector *radeon_connector =
678 to_radeon_connector(connector);
679
680 if (val == 0)
681 radeon_connector->dac_load_detect = false;
682 else
683 radeon_connector->dac_load_detect = true;
684 }
685
686 if (property == rdev->mode_info.tmds_pll_property) {
687 struct radeon_encoder_int_tmds *tmds = NULL;
688 bool ret = false;
689 /* need to find digital encoder on connector */
690 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
691 if (!encoder)
692 return 0;
693
694 radeon_encoder = to_radeon_encoder(encoder);
695
696 tmds = radeon_encoder->enc_priv;
697 if (!tmds)
698 return 0;
699
700 if (val == 0) {
701 if (rdev->is_atom_bios)
702 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
703 else
704 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
705 }
706 if (val == 1 || ret == false) {
707 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
708 }
709 radeon_property_change_mode(&radeon_encoder->base);
710 }
711
da997620
AD		 712 if (property == dev->mode_config.scaling_mode_property) {
713 enum radeon_rmx_type rmx_type;
714
715 if (connector->encoder)
716 radeon_encoder = to_radeon_encoder(connector->encoder);
717 else {
319d1e14 718 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
da997620
AD		 719 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
720 }
721
722 switch (val) {
723 default:
724 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
725 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
726 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
727 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
728 }
729 if (radeon_encoder->rmx_type == rmx_type)
730 return 0;
731
732 if ((rmx_type != DRM_MODE_SCALE_NONE) &&
733 (radeon_encoder->native_mode.clock == 0))
734 return 0;
735
736 radeon_encoder->rmx_type = rmx_type;
737
738 radeon_property_change_mode(&radeon_encoder->base);
739 }
740
643b1f56
AD		 741 if (property == rdev->mode_info.output_csc_property) {
742 if (connector->encoder)
743 radeon_encoder = to_radeon_encoder(connector->encoder);
744 else {
16bb079e 745 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
643b1f56
AD		 746 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
747 }
748
749 if (radeon_encoder->output_csc == val)
750 return 0;
751
752 radeon_encoder->output_csc = val;
753
754 if (connector->encoder->crtc) {
755 struct drm_crtc *crtc = connector->encoder->crtc;
643b1f56
AD		 756 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
757
758 radeon_crtc->output_csc = radeon_encoder->output_csc;
759
42585395
PR		 760 /*
761 * Our .gamma_set assumes the .gamma_store has been
762 * prefilled and don't care about its arguments.
763 */
764 crtc->funcs->gamma_set(crtc, NULL, NULL, NULL, 0, NULL);
643b1f56
AD		 765 }
766 }
767
771fe6b9
JG		 768 return 0;
769}
770
8dfaa8a7
MD		 771static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
772 struct drm_connector *connector)
773{
774 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 775 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
13bb9430
MG		 776 struct drm_display_mode *t, *mode;
777
778 /* If the EDID preferred mode doesn't match the native mode, use it */
779 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
780 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
781 if (mode->hdisplay != native_mode->hdisplay ||
782 mode->vdisplay != native_mode->vdisplay)
783 memcpy(native_mode, mode, sizeof(*mode));
784 }
785 }
8dfaa8a7
MD		 786
787 /* Try to get native mode details from EDID if necessary */
de2103e4 788 if (!native_mode->clock) {
8dfaa8a7 789 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD		 790 if (mode->hdisplay == native_mode->hdisplay &&
791 mode->vdisplay == native_mode->vdisplay) {
792 *native_mode = *mode;
793 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 794 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD		 795 break;
796 }
797 }
798 }
13bb9430 799
de2103e4 800 if (!native_mode->clock) {
c5d46b4e 801 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD		 802 radeon_encoder->rmx_type = RMX_OFF;
803 }
804}
771fe6b9
JG		 805
806static int radeon_lvds_get_modes(struct drm_connector *connector)
807{
771fe6b9
JG		 808 struct drm_encoder *encoder;
809 int ret = 0;
810 struct drm_display_mode *mode;
811
72a5c970
AD		 812 radeon_connector_get_edid(connector);
813 ret = radeon_ddc_get_modes(connector);
814 if (ret > 0) {
815 encoder = radeon_best_single_encoder(connector);
816 if (encoder) {
817 radeon_fixup_lvds_native_mode(encoder, connector);
818 /* add scaled modes */
819 radeon_add_common_modes(encoder, connector);
771fe6b9 820 }
72a5c970 821 return ret;
771fe6b9
JG		 822 }
823
824 encoder = radeon_best_single_encoder(connector);
825 if (!encoder)
826 return 0;
827
828 /* we have no EDID modes */
829 mode = radeon_fp_native_mode(encoder);
830 if (mode) {
831 ret = 1;
832 drm_mode_probed_add(connector, mode);
7a868e18
AD		 833 /* add the width/height from vbios tables if available */
834 connector->display_info.width_mm = mode->width_mm;
835 connector->display_info.height_mm = mode->height_mm;
7747b713
AD		 836 /* add scaled modes */
837 radeon_add_common_modes(encoder, connector);
771fe6b9 838 }
923f6848 839
771fe6b9
JG		 840 return ret;
841}
842
7a47f20e 843static enum drm_mode_status radeon_lvds_mode_valid(struct drm_connector *connector,
771fe6b9
JG		 844 struct drm_display_mode *mode)
845{
a3fa6320
AD		 846 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
847
848 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
849 return MODE_PANEL;
850
851 if (encoder) {
852 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
853 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
854
855 /* AVIVO hardware supports downscaling modes larger than the panel
856 * to the panel size, but I'm not sure this is desirable.
857 */
858 if ((mode->hdisplay > native_mode->hdisplay) ||
859 (mode->vdisplay > native_mode->vdisplay))
860 return MODE_PANEL;
861
862 /* if scaling is disabled, block non-native modes */
863 if (radeon_encoder->rmx_type == RMX_OFF) {
864 if ((mode->hdisplay != native_mode->hdisplay) ||
865 (mode->vdisplay != native_mode->vdisplay))
866 return MODE_PANEL;
867 }
868 }
869
771fe6b9
JG		 870 return MODE_OK;
871}
872
7b334fcb 873static enum drm_connector_status
930a9e28 874radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 875{
13485794
AD		 876 struct drm_device *dev = connector->dev;
877 struct radeon_device *rdev = dev->dev_private;
0549a061 878 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 879 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 880 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 881 int r;
882
15734fef
LW		 883 if (!drm_kms_helper_is_poll_worker()) {
884 r = pm_runtime_get_sync(connector->dev->dev);
885 if (r < 0)
886 return connector_status_disconnected;
887 }
2ffb8429
AD		 888
889 if (encoder) {
890 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 891 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD		 892
893 /* check if panel is valid */
de2103e4 894 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429 895 ret = connector_status_connected;
13485794
AD		 896 /* don't fetch the edid from the vbios if ddc fails and runpm is
897 * enabled so we report disconnected.
898 */
899 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
900 ret = connector_status_disconnected;
2ffb8429 901 }
0549a061
AD		 902
903 /* check for edid as well */
72a5c970 904 radeon_connector_get_edid(connector);
0294cf4f
AD		 905 if (radeon_connector->edid)
906 ret = connector_status_connected;
771fe6b9 907 /* check acpi lid status ??? */
2ffb8429 908
771fe6b9 909 radeon_connector_update_scratch_regs(connector, ret);
15734fef
LW		 910
911 if (!drm_kms_helper_is_poll_worker()) {
912 pm_runtime_mark_last_busy(connector->dev->dev);
913 pm_runtime_put_autosuspend(connector->dev->dev);
914 }
915
771fe6b9
JG		 916 return ret;
917}
918
b0c80bd5
AD		 919static void radeon_connector_unregister(struct drm_connector *connector)
920{
921 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
922
0a6e2105 923 if (radeon_connector->ddc_bus && radeon_connector->ddc_bus->has_aux) {
b0c80bd5
AD		 924 drm_dp_aux_unregister(&radeon_connector->ddc_bus->aux);
925 radeon_connector->ddc_bus->has_aux = false;
926 }
927}
928
771fe6b9
JG		 929static void radeon_connector_destroy(struct drm_connector *connector)
930{
931 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
932
72a5c970 933 radeon_connector_free_edid(connector);
771fe6b9 934 kfree(radeon_connector->con_priv);
34ea3d38 935 drm_connector_unregister(connector);
771fe6b9
JG		 936 drm_connector_cleanup(connector);
937 kfree(connector);
938}
939
445282db
DA		 940static int radeon_lvds_set_property(struct drm_connector *connector,
941 struct drm_property *property,
942 uint64_t value)
943{
944 struct drm_device *dev = connector->dev;
945 struct radeon_encoder *radeon_encoder;
946 enum radeon_rmx_type rmx_type;
947
d9fdaafb 948 DRM_DEBUG_KMS("\n");
445282db
DA		 949 if (property != dev->mode_config.scaling_mode_property)
950 return 0;
951
952 if (connector->encoder)
953 radeon_encoder = to_radeon_encoder(connector->encoder);
954 else {
319d1e14 955 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
445282db
DA		 956 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
957 }
958
959 switch (value) {
960 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
961 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
962 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
963 default:
964 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
965 }
966 if (radeon_encoder->rmx_type == rmx_type)
967 return 0;
968
969 radeon_encoder->rmx_type = rmx_type;
970
971 radeon_property_change_mode(&radeon_encoder->base);
972 return 0;
973}
974
975
1109ca09 976static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
771fe6b9
JG		 977 .get_modes = radeon_lvds_get_modes,
978 .mode_valid = radeon_lvds_mode_valid,
979 .best_encoder = radeon_best_single_encoder,
980};
981
1109ca09 982static const struct drm_connector_funcs radeon_lvds_connector_funcs = {
771fe6b9
JG		 983 .dpms = drm_helper_connector_dpms,
984 .detect = radeon_lvds_detect,
985 .fill_modes = drm_helper_probe_single_connector_modes,
b0c80bd5 986 .early_unregister = radeon_connector_unregister,
771fe6b9 987 .destroy = radeon_connector_destroy,
445282db 988 .set_property = radeon_lvds_set_property,
771fe6b9
JG		 989};
990
991static int radeon_vga_get_modes(struct drm_connector *connector)
992{
771fe6b9
JG		 993 int ret;
994
72a5c970
AD		 995 radeon_connector_get_edid(connector);
996 ret = radeon_ddc_get_modes(connector);
771fe6b9 997
da997620
AD		 998 radeon_get_native_mode(connector);
999
771fe6b9
JG		 1000 return ret;
1001}
1002
7a47f20e 1003static enum drm_mode_status radeon_vga_mode_valid(struct drm_connector *connector,
771fe6b9
JG		 1004 struct drm_display_mode *mode)
1005{
b20f9bef
AD		 1006 struct drm_device *dev = connector->dev;
1007 struct radeon_device *rdev = dev->dev_private;
1008
a3fa6320 1009 /* XXX check mode bandwidth */
b20f9bef
AD		 1010
1011 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1012 return MODE_CLOCK_HIGH;
1013
771fe6b9
JG		 1014 return MODE_OK;
1015}
1016
7b334fcb 1017static enum drm_connector_status
930a9e28 1018radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 1019{
fafcf94e
AD		 1020 struct drm_device *dev = connector->dev;
1021 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 1022 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1023 struct drm_encoder *encoder;
319d1e14 1024 const struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 1025 bool dret = false;
771fe6b9 1026 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 1027 int r;
1028
15734fef
LW		 1029 if (!drm_kms_helper_is_poll_worker()) {
1030 r = pm_runtime_get_sync(connector->dev->dev);
1031 if (r < 0)
1032 return connector_status_disconnected;
1033 }
771fe6b9 1034
4ce001ab
DA		 1035 encoder = radeon_best_single_encoder(connector);
1036 if (!encoder)
1037 ret = connector_status_disconnected;
1038
eb6b6d7c 1039 if (radeon_connector->ddc_bus)
0a9069d3 1040 dret = radeon_ddc_probe(radeon_connector, false);
0294cf4f 1041 if (dret) {
d0d0a225 1042 radeon_connector->detected_by_load = false;
72a5c970
AD		 1043 radeon_connector_free_edid(connector);
1044 radeon_connector_get_edid(connector);
0294cf4f
AD		 1045
1046 if (!radeon_connector->edid) {
f82f5f3a 1047 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 1048 connector->name);
f82f5f3a 1049 ret = connector_status_connected;
0294cf4f 1050 } else {
72a5c970
AD		 1051 radeon_connector->use_digital =
1052 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
0294cf4f
AD		 1053
1054 /* some oems have boards with separate digital and analog connectors
1055 * with a shared ddc line (often vga + hdmi)
1056 */
1057 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
72a5c970 1058 radeon_connector_free_edid(connector);
0294cf4f 1059 ret = connector_status_disconnected;
72a5c970 1060 } else {
0294cf4f 1061 ret = connector_status_connected;
72a5c970 1062 }
0294cf4f
AD		 1063 }
1064 } else {
c3cceedd
DA		 1065
1066 /* if we aren't forcing don't do destructive polling */
d0d0a225
AD		 1067 if (!force) {
1068 /* only return the previous status if we last
1069 * detected a monitor via load.
1070 */
1071 if (radeon_connector->detected_by_load)
10ebc0bc
DA		 1072 ret = connector->status;
1073 goto out;
d0d0a225 1074 }
c3cceedd 1075
d8a7f792 1076 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA		 1077 encoder_funcs = encoder->helper_private;
1078 ret = encoder_funcs->detect(encoder, connector);
34076446 1079 if (ret != connector_status_disconnected)
d0d0a225 1080 radeon_connector->detected_by_load = true;
445282db 1081 }
771fe6b9
JG		 1082 }
1083
4ce001ab
DA		 1084 if (ret == connector_status_connected)
1085 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD		 1086
1087 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1088 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1089 * by other means, assume the CRT is connected and use that EDID.
1090 */
1091 if ((!rdev->is_atom_bios) &&
1092 (ret == connector_status_disconnected) &&
1093 rdev->mode_info.bios_hardcoded_edid_size) {
1094 ret = connector_status_connected;
1095 }
1096
771fe6b9 1097 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1098
1099out:
15734fef
LW		 1100 if (!drm_kms_helper_is_poll_worker()) {
1101 pm_runtime_mark_last_busy(connector->dev->dev);
1102 pm_runtime_put_autosuspend(connector->dev->dev);
1103 }
10ebc0bc 1104
771fe6b9
JG		 1105 return ret;
1106}
1107
1109ca09 1108static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
771fe6b9
JG		 1109 .get_modes = radeon_vga_get_modes,
1110 .mode_valid = radeon_vga_mode_valid,
1111 .best_encoder = radeon_best_single_encoder,
1112};
1113
1109ca09 1114static const struct drm_connector_funcs radeon_vga_connector_funcs = {
771fe6b9
JG		 1115 .dpms = drm_helper_connector_dpms,
1116 .detect = radeon_vga_detect,
1117 .fill_modes = drm_helper_probe_single_connector_modes,
b0c80bd5 1118 .early_unregister = radeon_connector_unregister,
771fe6b9
JG		 1119 .destroy = radeon_connector_destroy,
1120 .set_property = radeon_connector_set_property,
1121};
1122
4ce001ab
DA		 1123static int radeon_tv_get_modes(struct drm_connector *connector)
1124{
1125 struct drm_device *dev = connector->dev;
923f6848 1126 struct radeon_device *rdev = dev->dev_private;
4ce001ab 1127 struct drm_display_mode *tv_mode;
923f6848 1128 struct drm_encoder *encoder;
4ce001ab 1129
923f6848
AD		 1130 encoder = radeon_best_single_encoder(connector);
1131 if (!encoder)
1132 return 0;
4ce001ab 1133
923f6848
AD		 1134 /* avivo chips can scale any mode */
1135 if (rdev->family >= CHIP_RS600)
1136 /* add scaled modes */
1137 radeon_add_common_modes(encoder, connector);
1138 else {
1139 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 1140 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD		 1141 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
1142 drm_mode_probed_add(connector, tv_mode);
1143 }
4ce001ab
DA		 1144 return 1;
1145}
1146
7a47f20e 1147static enum drm_mode_status radeon_tv_mode_valid(struct drm_connector *connector,
4ce001ab
DA		 1148 struct drm_display_mode *mode)
1149{
a3fa6320
AD		 1150 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
1151 return MODE_CLOCK_RANGE;
4ce001ab
DA		 1152 return MODE_OK;
1153}
1154
7b334fcb 1155static enum drm_connector_status
930a9e28 1156radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA		 1157{
1158 struct drm_encoder *encoder;
319d1e14 1159 const struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA		 1160 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1161 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc 1162 int r;
445282db
DA		 1163
1164 if (!radeon_connector->dac_load_detect)
1165 return ret;
4ce001ab 1166
15734fef
LW		 1167 if (!drm_kms_helper_is_poll_worker()) {
1168 r = pm_runtime_get_sync(connector->dev->dev);
1169 if (r < 0)
1170 return connector_status_disconnected;
1171 }
10ebc0bc 1172
4ce001ab
DA		 1173 encoder = radeon_best_single_encoder(connector);
1174 if (!encoder)
1175 ret = connector_status_disconnected;
1176 else {
1177 encoder_funcs = encoder->helper_private;
1178 ret = encoder_funcs->detect(encoder, connector);
1179 }
1180 if (ret == connector_status_connected)
1181 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
1182 radeon_connector_update_scratch_regs(connector, ret);
15734fef
LW		 1183
1184 if (!drm_kms_helper_is_poll_worker()) {
1185 pm_runtime_mark_last_busy(connector->dev->dev);
1186 pm_runtime_put_autosuspend(connector->dev->dev);
1187 }
1188
4ce001ab
DA		 1189 return ret;
1190}
1191
1109ca09 1192static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
4ce001ab
DA		 1193 .get_modes = radeon_tv_get_modes,
1194 .mode_valid = radeon_tv_mode_valid,
1195 .best_encoder = radeon_best_single_encoder,
1196};
1197
1109ca09 1198static const struct drm_connector_funcs radeon_tv_connector_funcs = {
4ce001ab
DA		 1199 .dpms = drm_helper_connector_dpms,
1200 .detect = radeon_tv_detect,
1201 .fill_modes = drm_helper_probe_single_connector_modes,
b0c80bd5 1202 .early_unregister = radeon_connector_unregister,
4ce001ab
DA		 1203 .destroy = radeon_connector_destroy,
1204 .set_property = radeon_connector_set_property,
1205};
1206
11fe1266
TU		 1207static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
1208{
1209 struct drm_device *dev = connector->dev;
1210 struct radeon_device *rdev = dev->dev_private;
1211 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1212 enum drm_connector_status status;
1213
1214 /* We only trust HPD on R600 and newer ASICS. */
1215 if (rdev->family >= CHIP_R600
1216 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) {
1217 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
1218 status = connector_status_connected;
1219 else
1220 status = connector_status_disconnected;
1221 if (connector->status == status)
1222 return true;
1223 }
1224
1225 return false;
1226}
1227
4ce001ab
DA		 1228/*
1229 * DVI is complicated
1230 * Do a DDC probe, if DDC probe passes, get the full EDID so
1231 * we can do analog/digital monitor detection at this point.
1232 * If the monitor is an analog monitor or we got no DDC,
1233 * we need to find the DAC encoder object for this connector.
1234 * If we got no DDC, we do load detection on the DAC encoder object.
1235 * If we got analog DDC or load detection passes on the DAC encoder
1236 * we have to check if this analog encoder is shared with anyone else (TV)
1237 * if its shared we have to set the other connector to disconnected.
1238 */
7b334fcb 1239static enum drm_connector_status
930a9e28 1240radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 1241{
fafcf94e
AD		 1242 struct drm_device *dev = connector->dev;
1243 struct radeon_device *rdev = dev->dev_private;
771fe6b9 1244 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 1245 struct drm_encoder *encoder = NULL;
319d1e14 1246 const struct drm_encoder_helper_funcs *encoder_funcs;
7b71ca24 1247 int r;
771fe6b9 1248 enum drm_connector_status ret = connector_status_disconnected;
fc87f13b 1249 bool dret = false, broken_edid = false;
771fe6b9 1250
15734fef
LW		 1251 if (!drm_kms_helper_is_poll_worker()) {
1252 r = pm_runtime_get_sync(connector->dev->dev);
1253 if (r < 0)
1254 return connector_status_disconnected;
1255 }
10ebc0bc 1256
cb5d4166
L		 1257 if (radeon_connector->detected_hpd_without_ddc) {
1258 force = true;
1259 radeon_connector->detected_hpd_without_ddc = false;
1260 }
1261
10ebc0bc
DA		 1262 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1263 ret = connector->status;
1264 goto exit;
1265 }
11fe1266 1266
cb5d4166 1267 if (radeon_connector->ddc_bus) {
0a9069d3 1268 dret = radeon_ddc_probe(radeon_connector, false);
cb5d4166
L		 1269
1270 /* Sometimes the pins required for the DDC probe on DVI
1271 * connectors don't make contact at the same time that the ones
1272 * for HPD do. If the DDC probe fails even though we had an HPD
1273 * signal, try again later */
1274 if (!dret && !force &&
1275 connector->status != connector_status_connected) {
1276 DRM_DEBUG_KMS("hpd detected without ddc, retrying in 1 second\n");
1277 radeon_connector->detected_hpd_without_ddc = true;
1278 schedule_delayed_work(&rdev->hotplug_work,
1279 msecs_to_jiffies(1000));
1280 goto exit;
1281 }
1282 }
4ce001ab 1283 if (dret) {
d0d0a225 1284 radeon_connector->detected_by_load = false;
72a5c970
AD		 1285 radeon_connector_free_edid(connector);
1286 radeon_connector_get_edid(connector);
4ce001ab
DA		 1287
1288 if (!radeon_connector->edid) {
f82f5f3a 1289 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 1290 connector->name);
4a9a8b71
DA		 1291 /* rs690 seems to have a problem with connectors not existing and always
1292 * return a block of 0's. If we see this just stop polling on this output */
72a5c970
AD		 1293 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) &&
1294 radeon_connector->base.null_edid_counter) {
4a9a8b71 1295 ret = connector_status_disconnected;
72082093
JN		 1296 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n",
1297 connector->name);
4a9a8b71 1298 radeon_connector->ddc_bus = NULL;
fc87f13b
EE		 1299 } else {
1300 ret = connector_status_connected;
1301 broken_edid = true; /* defer use_digital to later */
4a9a8b71 1302 }
4ce001ab 1303 } else {
72a5c970
AD		 1304 radeon_connector->use_digital =
1305 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
4ce001ab 1306
0294cf4f
AD		 1307 /* some oems have boards with separate digital and analog connectors
1308 * with a shared ddc line (often vga + hdmi)
1309 */
1310 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
72a5c970 1311 radeon_connector_free_edid(connector);
0294cf4f 1312 ret = connector_status_disconnected;
72a5c970 1313 } else {
0294cf4f 1314 ret = connector_status_connected;
72a5c970 1315 }
42f14c4b
AD		 1316 /* This gets complicated. We have boards with VGA + HDMI with a
1317 * shared DDC line and we have boards with DVI-D + HDMI with a shared
1318 * DDC line. The latter is more complex because with DVI<->HDMI adapters
1319 * you don't really know what's connected to which port as both are digital.
71407c46 1320 */
d3932d6c 1321 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD		 1322 struct drm_connector *list_connector;
1323 struct radeon_connector *list_radeon_connector;
1324 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
1325 if (connector == list_connector)
1326 continue;
1327 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD		 1328 if (list_radeon_connector->shared_ddc &&
1329 (list_radeon_connector->ddc_bus->rec.i2c_id ==
1330 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD		 1331 /* cases where both connectors are digital */
1332 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1333 /* hpd is our only option in this case */
1334 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
72a5c970 1335 radeon_connector_free_edid(connector);
71407c46
AD		 1336 ret = connector_status_disconnected;
1337 }
1338 }
1339 }
1340 }
1341 }
4ce001ab
DA		 1342 }
1343 }
1344
1345 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
1346 goto out;
1347
5f0a2612
AD		 1348 /* DVI-D and HDMI-A are digital only */
1349 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1350 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1351 goto out;
1352
d0d0a225 1353 /* if we aren't forcing don't do destructive polling */
c3cceedd 1354 if (!force) {
d0d0a225
AD		 1355 /* only return the previous status if we last
1356 * detected a monitor via load.
1357 */
1358 if (radeon_connector->detected_by_load)
1359 ret = connector->status;
c3cceedd
DA		 1360 goto out;
1361 }
1362
4ce001ab 1363 /* find analog encoder */
445282db 1364 if (radeon_connector->dac_load_detect) {
7b71ca24 1365 int i;
771fe6b9 1366
7b71ca24 1367 drm_connector_for_each_possible_encoder(connector, encoder, i) {
e3632507 1368 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
e00e8b5e
AD		 1369 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1370 continue;
1371
445282db
DA		 1372 encoder_funcs = encoder->helper_private;
1373 if (encoder_funcs->detect) {
fc87f13b
EE		 1374 if (!broken_edid) {
1375 if (ret != connector_status_connected) {
1376 /* deal with analog monitors without DDC */
1377 ret = encoder_funcs->detect(encoder, connector);
1378 if (ret == connector_status_connected) {
1379 radeon_connector->use_digital = false;
1380 }
1381 if (ret != connector_status_disconnected)
1382 radeon_connector->detected_by_load = true;
445282db 1383 }
fc87f13b
EE		 1384 } else {
1385 enum drm_connector_status lret;
1386 /* assume digital unless load detected otherwise */
1387 radeon_connector->use_digital = true;
1388 lret = encoder_funcs->detect(encoder, connector);
1389 DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
1390 if (lret == connector_status_connected)
1391 radeon_connector->use_digital = false;
771fe6b9 1392 }
445282db 1393 break;
771fe6b9
JG		 1394 }
1395 }
1396 }
1397
4ce001ab
DA		 1398 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
1399 encoder) {
1400 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1401 }
1402
fafcf94e
AD		 1403 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1404 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1405 * by other means, assume the DFP is connected and use that EDID. In most
1406 * cases the DVI port is actually a virtual KVM port connected to the service
1407 * processor.
1408 */
a09d431f 1409out:
fafcf94e
AD		 1410 if ((!rdev->is_atom_bios) &&
1411 (ret == connector_status_disconnected) &&
1412 rdev->mode_info.bios_hardcoded_edid_size) {
1413 radeon_connector->use_digital = true;
1414 ret = connector_status_connected;
1415 }
1416
771fe6b9
JG		 1417 /* updated in get modes as well since we need to know if it's analog or digital */
1418 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc 1419
d0ea397e
AD		 1420 if ((radeon_audio != 0) && radeon_connector->use_digital) {
1421 const struct drm_connector_helper_funcs *connector_funcs =
1422 connector->helper_private;
1423
1424 encoder = connector_funcs->best_encoder(connector);
1425 if (encoder && (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)) {
1426 radeon_connector_get_edid(connector);
1427 radeon_audio_detect(connector, encoder, ret);
1428 }
1429 }
1a626b68 1430
10ebc0bc 1431exit:
15734fef
LW		 1432 if (!drm_kms_helper_is_poll_worker()) {
1433 pm_runtime_mark_last_busy(connector->dev->dev);
1434 pm_runtime_put_autosuspend(connector->dev->dev);
1435 }
10ebc0bc 1436
771fe6b9
JG		 1437 return ret;
1438}
1439
1440/* okay need to be smart in here about which encoder to pick */
1109ca09 1441static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
771fe6b9 1442{
771fe6b9 1443 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
771fe6b9
JG		 1444 struct drm_encoder *encoder;
1445 int i;
771fe6b9 1446
7b71ca24 1447 drm_connector_for_each_possible_encoder(connector, encoder, i) {
4ce001ab 1448 if (radeon_connector->use_digital == true) {
771fe6b9
JG		 1449 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1450 return encoder;
1451 } else {
1452 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1453 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1454 return encoder;
1455 }
1456 }
1457
1458 /* see if we have a default encoder TODO */
1459
1460 /* then check use digitial */
1461 /* pick the first one */
7b71ca24
VS		 1462 drm_connector_for_each_possible_encoder(connector, encoder, i)
1463 return encoder;
1464
771fe6b9
JG		 1465 return NULL;
1466}
1467
d50ba256
DA		 1468static void radeon_dvi_force(struct drm_connector *connector)
1469{
1470 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1471 if (connector->force == DRM_FORCE_ON)
1472 radeon_connector->use_digital = false;
1473 if (connector->force == DRM_FORCE_ON_DIGITAL)
1474 radeon_connector->use_digital = true;
1475}
1476
7a47f20e 1477static enum drm_mode_status radeon_dvi_mode_valid(struct drm_connector *connector,
a3fa6320
AD		 1478 struct drm_display_mode *mode)
1479{
1b24203e
AD		 1480 struct drm_device *dev = connector->dev;
1481 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD		 1482 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1483
1484 /* XXX check mode bandwidth */
1485
1b24203e
AD		 1486 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1487 if (radeon_connector->use_digital &&
1488 (rdev->family == CHIP_RV100) &&
1489 (mode->clock > 135000))
1490 return MODE_CLOCK_HIGH;
1491
a3fa6320
AD		 1492 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1493 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1494 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1495 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1496 return MODE_OK;
377bd8a9 1497 else if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
f2263fc7
AD		 1498 /* HDMI 1.3+ supports max clock of 340 Mhz */
1499 if (mode->clock > 340000)
e1e84017 1500 return MODE_CLOCK_HIGH;
f2263fc7
AD		 1501 else
1502 return MODE_OK;
1503 } else {
a3fa6320 1504 return MODE_CLOCK_HIGH;
f2263fc7 1505 }
a3fa6320 1506 }
b20f9bef
AD		 1507
1508 /* check against the max pixel clock */
1509 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1510 return MODE_CLOCK_HIGH;
1511
a3fa6320
AD		 1512 return MODE_OK;
1513}
1514
1109ca09 1515static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
3e22920f 1516 .get_modes = radeon_vga_get_modes,
a3fa6320 1517 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG		 1518 .best_encoder = radeon_dvi_encoder,
1519};
1520
1109ca09 1521static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
771fe6b9
JG		 1522 .dpms = drm_helper_connector_dpms,
1523 .detect = radeon_dvi_detect,
1524 .fill_modes = drm_helper_probe_single_connector_modes,
1525 .set_property = radeon_connector_set_property,
b0c80bd5 1526 .early_unregister = radeon_connector_unregister,
771fe6b9 1527 .destroy = radeon_connector_destroy,
d50ba256 1528 .force = radeon_dvi_force,
771fe6b9
JG		 1529};
1530
746c1aa4
DA		 1531static int radeon_dp_get_modes(struct drm_connector *connector)
1532{
1533 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1534 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1535 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA		 1536 int ret;
1537
f89931f3
AD		 1538 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1539 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1540 struct drm_display_mode *mode;
1541
2b69ffb9
AD		 1542 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1543 if (!radeon_dig_connector->edp_on)
1544 atombios_set_edp_panel_power(connector,
1545 ATOM_TRANSMITTER_ACTION_POWER_ON);
72a5c970
AD		 1546 radeon_connector_get_edid(connector);
1547 ret = radeon_ddc_get_modes(connector);
2b69ffb9
AD		 1548 if (!radeon_dig_connector->edp_on)
1549 atombios_set_edp_panel_power(connector,
1550 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1551 } else {
1552 /* need to setup ddc on the bridge */
1553 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1554 ENCODER_OBJECT_ID_NONE) {
1555 if (encoder)
1556 radeon_atom_ext_encoder_setup_ddc(encoder);
1557 }
72a5c970
AD		 1558 radeon_connector_get_edid(connector);
1559 ret = radeon_ddc_get_modes(connector);
2b69ffb9 1560 }
d291767b
AD		 1561
1562 if (ret > 0) {
d291767b
AD		 1563 if (encoder) {
1564 radeon_fixup_lvds_native_mode(encoder, connector);
1565 /* add scaled modes */
1566 radeon_add_common_modes(encoder, connector);
1567 }
1568 return ret;
1569 }
1570
d291767b
AD		 1571 if (!encoder)
1572 return 0;
1573
1574 /* we have no EDID modes */
1575 mode = radeon_fp_native_mode(encoder);
1576 if (mode) {
1577 ret = 1;
1578 drm_mode_probed_add(connector, mode);
1579 /* add the width/height from vbios tables if available */
1580 connector->display_info.width_mm = mode->width_mm;
1581 connector->display_info.height_mm = mode->height_mm;
1582 /* add scaled modes */
1583 radeon_add_common_modes(encoder, connector);
1584 }
591a10e1
AD		 1585 } else {
1586 /* need to setup ddc on the bridge */
1d33e1fc
AD		 1587 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1588 ENCODER_OBJECT_ID_NONE) {
591a10e1
AD		 1589 if (encoder)
1590 radeon_atom_ext_encoder_setup_ddc(encoder);
1591 }
72a5c970
AD		 1592 radeon_connector_get_edid(connector);
1593 ret = radeon_ddc_get_modes(connector);
da997620
AD		 1594
1595 radeon_get_native_mode(connector);
591a10e1 1596 }
8b834852 1597
746c1aa4
DA		 1598 return ret;
1599}
1600
1d33e1fc 1601u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
d7fa8bb3 1602{
d7fa8bb3
AD		 1603 struct drm_encoder *encoder;
1604 struct radeon_encoder *radeon_encoder;
1605 int i;
d7fa8bb3 1606
7b71ca24 1607 drm_connector_for_each_possible_encoder(connector, encoder, i) {
d7fa8bb3
AD		 1608 radeon_encoder = to_radeon_encoder(encoder);
1609
1610 switch (radeon_encoder->encoder_id) {
1611 case ENCODER_OBJECT_ID_TRAVIS:
1612 case ENCODER_OBJECT_ID_NUTMEG:
1d33e1fc 1613 return radeon_encoder->encoder_id;
d7fa8bb3
AD		 1614 default:
1615 break;
1616 }
1617 }
1618
1d33e1fc 1619 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD		 1620}
1621
ebdea82d 1622static bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
d7fa8bb3 1623{
d7fa8bb3
AD		 1624 struct drm_encoder *encoder;
1625 struct radeon_encoder *radeon_encoder;
1626 int i;
1627 bool found = false;
1628
7b71ca24 1629 drm_connector_for_each_possible_encoder(connector, encoder, i) {
d7fa8bb3
AD		 1630 radeon_encoder = to_radeon_encoder(encoder);
1631 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1632 found = true;
1633 }
1634
1635 return found;
1636}
1637
1638bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1639{
1640 struct drm_device *dev = connector->dev;
1641 struct radeon_device *rdev = dev->dev_private;
1642
1643 if (ASIC_IS_DCE5(rdev) &&
af5d3653 1644 (rdev->clock.default_dispclk >= 53900) &&
d7fa8bb3
AD		 1645 radeon_connector_encoder_is_hbr2(connector)) {
1646 return true;
1647 }
1648
1649 return false;
1650}
1651
7b334fcb 1652static enum drm_connector_status
930a9e28 1653radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1654{
f8d0edde
AD		 1655 struct drm_device *dev = connector->dev;
1656 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1657 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1658 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1659 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1660 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
10ebc0bc 1661 int r;
746c1aa4 1662
9843ead0
DA		 1663 if (radeon_dig_connector->is_mst)
1664 return connector_status_disconnected;
1665
15734fef
LW		 1666 if (!drm_kms_helper_is_poll_worker()) {
1667 r = pm_runtime_get_sync(connector->dev->dev);
1668 if (r < 0)
1669 return connector_status_disconnected;
1670 }
10ebc0bc
DA		 1671
1672 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1673 ret = connector->status;
1674 goto out;
1675 }
11fe1266 1676
72a5c970 1677 radeon_connector_free_edid(connector);
746c1aa4 1678
f89931f3
AD		 1679 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1680 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1681 if (encoder) {
1682 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1683 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1684
1685 /* check if panel is valid */
1686 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1687 ret = connector_status_connected;
13485794
AD		 1688 /* don't fetch the edid from the vbios if ddc fails and runpm is
1689 * enabled so we report disconnected.
1690 */
1691 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
1692 ret = connector_status_disconnected;
d291767b 1693 }
6f50eae7
AD		 1694 /* eDP is always DP */
1695 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD		 1696 if (!radeon_dig_connector->edp_on)
1697 atombios_set_edp_panel_power(connector,
1698 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1699 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1700 ret = connector_status_connected;
8b834852
AD		 1701 if (!radeon_dig_connector->edp_on)
1702 atombios_set_edp_panel_power(connector,
1703 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1d33e1fc
AD		 1704 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1705 ENCODER_OBJECT_ID_NONE) {
b06947b5
AD		 1706 /* DP bridges are always DP */
1707 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1708 /* get the DPCD from the bridge */
1709 radeon_dp_getdpcd(radeon_connector);
1710
6777a4f6
AD		 1711 if (encoder) {
1712 /* setup ddc on the bridge */
1713 radeon_atom_ext_encoder_setup_ddc(encoder);
0a9069d3
NOS		 1714 /* bridge chips are always aux */
1715 if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */
b06947b5 1716 ret = connector_status_connected;
6777a4f6 1717 else if (radeon_connector->dac_load_detect) { /* try load detection */
319d1e14 1718 const struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
b06947b5
AD		 1719 ret = encoder_funcs->detect(encoder, connector);
1720 }
591a10e1 1721 }
b06947b5 1722 } else {
6f50eae7 1723 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD		 1724 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1725 ret = connector_status_connected;
9843ead0 1726 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
f8d0edde 1727 radeon_dp_getdpcd(radeon_connector);
9843ead0
DA		 1728 r = radeon_dp_mst_probe(radeon_connector);
1729 if (r == 1)
1730 ret = connector_status_disconnected;
1731 }
6f50eae7 1732 } else {
f8d0edde 1733 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
9843ead0
DA		 1734 if (radeon_dp_getdpcd(radeon_connector)) {
1735 r = radeon_dp_mst_probe(radeon_connector);
1736 if (r == 1)
1737 ret = connector_status_disconnected;
1738 else
1739 ret = connector_status_connected;
1740 }
f8d0edde 1741 } else {
d592fca9 1742 /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */
0a9069d3 1743 if (radeon_ddc_probe(radeon_connector, false))
f8d0edde
AD		 1744 ret = connector_status_connected;
1745 }
4143e919 1746 }
746c1aa4 1747 }
4143e919 1748
30f44372 1749 radeon_connector_update_scratch_regs(connector, ret);
1a626b68 1750
d0ea397e
AD		 1751 if ((radeon_audio != 0) && encoder) {
1752 radeon_connector_get_edid(connector);
1753 radeon_audio_detect(connector, encoder, ret);
1754 }
1a626b68 1755
10ebc0bc 1756out:
15734fef
LW		 1757 if (!drm_kms_helper_is_poll_worker()) {
1758 pm_runtime_mark_last_busy(connector->dev->dev);
1759 pm_runtime_put_autosuspend(connector->dev->dev);
1760 }
10ebc0bc 1761
746c1aa4
DA		 1762 return ret;
1763}
1764
7a47f20e 1765static enum drm_mode_status radeon_dp_mode_valid(struct drm_connector *connector,
5801ead6
AD		 1766 struct drm_display_mode *mode)
1767{
6536a3a6
AD		 1768 struct drm_device *dev = connector->dev;
1769 struct radeon_device *rdev = dev->dev_private;
5801ead6
AD		 1770 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1771 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1772
1773 /* XXX check mode bandwidth */
1774
f89931f3
AD		 1775 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1776 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1777 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1778
1779 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1780 return MODE_PANEL;
1781
1782 if (encoder) {
1783 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1784 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1785
f89931f3 1786 /* AVIVO hardware supports downscaling modes larger than the panel
d291767b
AD		 1787 * to the panel size, but I'm not sure this is desirable.
1788 */
1789 if ((mode->hdisplay > native_mode->hdisplay) ||
1790 (mode->vdisplay > native_mode->vdisplay))
1791 return MODE_PANEL;
1792
1793 /* if scaling is disabled, block non-native modes */
1794 if (radeon_encoder->rmx_type == RMX_OFF) {
1795 if ((mode->hdisplay != native_mode->hdisplay) ||
1796 (mode->vdisplay != native_mode->vdisplay))
1797 return MODE_PANEL;
1798 }
1799 }
d291767b
AD		 1800 } else {
1801 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
6536a3a6 1802 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {
d291767b 1803 return radeon_dp_mode_valid_helper(connector, mode);
6536a3a6 1804 } else {
377bd8a9 1805 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
6536a3a6
AD		 1806 /* HDMI 1.3+ supports max clock of 340 Mhz */
1807 if (mode->clock > 340000)
1808 return MODE_CLOCK_HIGH;
1809 } else {
1810 if (mode->clock > 165000)
1811 return MODE_CLOCK_HIGH;
1812 }
1813 }
d291767b 1814 }
6536a3a6
AD		 1815
1816 return MODE_OK;
5801ead6
AD		 1817}
1818
1109ca09 1819static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
746c1aa4 1820 .get_modes = radeon_dp_get_modes,
5801ead6 1821 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA		 1822 .best_encoder = radeon_dvi_encoder,
1823};
1824
1109ca09 1825static const struct drm_connector_funcs radeon_dp_connector_funcs = {
746c1aa4
DA		 1826 .dpms = drm_helper_connector_dpms,
1827 .detect = radeon_dp_detect,
1828 .fill_modes = drm_helper_probe_single_connector_modes,
1829 .set_property = radeon_connector_set_property,
b0c80bd5 1830 .early_unregister = radeon_connector_unregister,
379dfc25 1831 .destroy = radeon_connector_destroy,
746c1aa4
DA		 1832 .force = radeon_dvi_force,
1833};
1834
855f5f1d
AD		 1835static const struct drm_connector_funcs radeon_edp_connector_funcs = {
1836 .dpms = drm_helper_connector_dpms,
1837 .detect = radeon_dp_detect,
1838 .fill_modes = drm_helper_probe_single_connector_modes,
1839 .set_property = radeon_lvds_set_property,
b0c80bd5 1840 .early_unregister = radeon_connector_unregister,
379dfc25 1841 .destroy = radeon_connector_destroy,
855f5f1d
AD		 1842 .force = radeon_dvi_force,
1843};
1844
1845static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
1846 .dpms = drm_helper_connector_dpms,
1847 .detect = radeon_dp_detect,
1848 .fill_modes = drm_helper_probe_single_connector_modes,
1849 .set_property = radeon_lvds_set_property,
b0c80bd5 1850 .early_unregister = radeon_connector_unregister,
379dfc25 1851 .destroy = radeon_connector_destroy,
855f5f1d
AD		 1852 .force = radeon_dvi_force,
1853};
1854
771fe6b9
JG		 1855void
1856radeon_add_atom_connector(struct drm_device *dev,
1857 uint32_t connector_id,
1858 uint32_t supported_device,
1859 int connector_type,
1860 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1861 uint32_t igp_lane_info,
eed45b30 1862 uint16_t connector_object_id,
26b5bc98
AD		 1863 struct radeon_hpd *hpd,
1864 struct radeon_router *router)
771fe6b9 1865{
445282db 1866 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 1867 struct drm_connector *connector;
1868 struct radeon_connector *radeon_connector;
1869 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD		 1870 struct drm_encoder *encoder;
1871 struct radeon_encoder *radeon_encoder;
771fe6b9 1872 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1873 bool shared_ddc = false;
eac4dff6 1874 bool is_dp_bridge = false;
496263bf 1875 bool has_aux = false;
771fe6b9 1876
4ce001ab 1877 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 1878 return;
1879
cf4c12f9
AD		 1880 /* if the user selected tv=0 don't try and add the connector */
1881 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1882 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1883 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1884 (radeon_tv == 0))
1885 return;
1886
771fe6b9
JG		 1887 /* see if we already added it */
1888 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1889 radeon_connector = to_radeon_connector(connector);
1890 if (radeon_connector->connector_id == connector_id) {
1891 radeon_connector->devices |= supported_device;
1892 return;
1893 }
0294cf4f 1894 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1895 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD		 1896 radeon_connector->shared_ddc = true;
1897 shared_ddc = true;
1898 }
fb939dfc 1899 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD		 1900 (radeon_connector->router.router_id == router->router_id)) {
1901 radeon_connector->shared_ddc = false;
1902 shared_ddc = false;
1903 }
0294cf4f 1904 }
771fe6b9
JG		 1905 }
1906
eac4dff6
AD		 1907 /* check if it's a dp bridge */
1908 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1909 radeon_encoder = to_radeon_encoder(encoder);
1910 if (radeon_encoder->devices & supported_device) {
1911 switch (radeon_encoder->encoder_id) {
1912 case ENCODER_OBJECT_ID_TRAVIS:
1913 case ENCODER_OBJECT_ID_NUTMEG:
1914 is_dp_bridge = true;
1915 break;
1916 default:
1917 break;
1918 }
1919 }
1920 }
1921
771fe6b9
JG		 1922 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1923 if (!radeon_connector)
1924 return;
1925
1926 connector = &radeon_connector->base;
1927
1928 radeon_connector->connector_id = connector_id;
1929 radeon_connector->devices = supported_device;
0294cf4f 1930 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1931 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1932 radeon_connector->hpd = *hpd;
bc1c4dc3 1933
26b5bc98 1934 radeon_connector->router = *router;
fb939dfc 1935 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD		 1936 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1937 if (!radeon_connector->router_bus)
a70882aa 1938 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1939 }
eac4dff6
AD		 1940
1941 if (is_dp_bridge) {
771fe6b9
JG		 1942 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1943 if (!radeon_dig_connector)
1944 goto failed;
771fe6b9
JG		 1945 radeon_dig_connector->igp_lane_info = igp_lane_info;
1946 radeon_connector->con_priv = radeon_dig_connector;
771fe6b9 1947 if (i2c_bus->valid) {
379dfc25
AD		 1948 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1949 if (radeon_connector->ddc_bus)
496263bf
AD		 1950 has_aux = true;
1951 else
eac4dff6 1952 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1953 }
eac4dff6
AD		 1954 switch (connector_type) {
1955 case DRM_MODE_CONNECTOR_VGA:
1956 case DRM_MODE_CONNECTOR_DVIA:
1957 default:
855f5f1d
AD		 1958 drm_connector_init(dev, &radeon_connector->base,
1959 &radeon_dp_connector_funcs, connector_type);
1960 drm_connector_helper_add(&radeon_connector->base,
1961 &radeon_dp_connector_helper_funcs);
eac4dff6
AD		 1962 connector->interlace_allowed = true;
1963 connector->doublescan_allowed = true;
d629a3ce 1964 radeon_connector->dac_load_detect = true;
e35755fa 1965 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 1966 rdev->mode_info.load_detect_property,
1967 1);
da997620
AD		 1968 drm_object_attach_property(&radeon_connector->base.base,
1969 dev->mode_config.scaling_mode_property,
1970 DRM_MODE_SCALE_NONE);
643b1f56
AD		 1971 if (ASIC_IS_DCE5(rdev))
1972 drm_object_attach_property(&radeon_connector->base.base,
1973 rdev->mode_info.output_csc_property,
1974 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 1975 break;
1976 case DRM_MODE_CONNECTOR_DVII:
1977 case DRM_MODE_CONNECTOR_DVID:
1978 case DRM_MODE_CONNECTOR_HDMIA:
1979 case DRM_MODE_CONNECTOR_HDMIB:
1980 case DRM_MODE_CONNECTOR_DisplayPort:
855f5f1d
AD		 1981 drm_connector_init(dev, &radeon_connector->base,
1982 &radeon_dp_connector_funcs, connector_type);
1983 drm_connector_helper_add(&radeon_connector->base,
1984 &radeon_dp_connector_helper_funcs);
e35755fa 1985 drm_object_attach_property(&radeon_connector->base.base,
430f70d5 1986 rdev->mode_info.underscan_property,
56bec7c0 1987 UNDERSCAN_OFF);
e35755fa 1988 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1989 rdev->mode_info.underscan_hborder_property,
1990 0);
e35755fa 1991 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1992 rdev->mode_info.underscan_vborder_property,
1993 0);
91915260 1994
da997620
AD		 1995 drm_object_attach_property(&radeon_connector->base.base,
1996 dev->mode_config.scaling_mode_property,
1997 DRM_MODE_SCALE_NONE);
1998
6214bb74
AD		 1999 drm_object_attach_property(&radeon_connector->base.base,
2000 rdev->mode_info.dither_property,
2001 RADEON_FMT_DITHER_DISABLE);
91915260 2002
7403c515 2003 if (radeon_audio != 0) {
108dc8e8
AD		 2004 drm_object_attach_property(&radeon_connector->base.base,
2005 rdev->mode_info.audio_property,
e31fadd3 2006 RADEON_AUDIO_AUTO);
7403c515
AD		 2007 radeon_connector->audio = RADEON_AUDIO_AUTO;
2008 }
643b1f56
AD		 2009 if (ASIC_IS_DCE5(rdev))
2010 drm_object_attach_property(&radeon_connector->base.base,
2011 rdev->mode_info.output_csc_property,
2012 RADEON_OUTPUT_CSC_BYPASS);
91915260 2013
eac4dff6
AD		 2014 subpixel_order = SubPixelHorizontalRGB;
2015 connector->interlace_allowed = true;
2016 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
2017 connector->doublescan_allowed = true;
2018 else
2019 connector->doublescan_allowed = false;
d629a3ce
AD		 2020 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
2021 radeon_connector->dac_load_detect = true;
e35755fa 2022 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 2023 rdev->mode_info.load_detect_property,
2024 1);
2025 }
eac4dff6
AD		 2026 break;
2027 case DRM_MODE_CONNECTOR_LVDS:
2028 case DRM_MODE_CONNECTOR_eDP:
855f5f1d
AD		 2029 drm_connector_init(dev, &radeon_connector->base,
2030 &radeon_lvds_bridge_connector_funcs, connector_type);
2031 drm_connector_helper_add(&radeon_connector->base,
2032 &radeon_dp_connector_helper_funcs);
e35755fa 2033 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2034 dev->mode_config.scaling_mode_property,
2035 DRM_MODE_SCALE_FULLSCREEN);
2036 subpixel_order = SubPixelHorizontalRGB;
2037 connector->interlace_allowed = false;
2038 connector->doublescan_allowed = false;
2039 break;
5bccf5e3 2040 }
eac4dff6
AD		 2041 } else {
2042 switch (connector_type) {
2043 case DRM_MODE_CONNECTOR_VGA:
2044 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
2045 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
2046 if (i2c_bus->valid) {
2047 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2048 if (!radeon_connector->ddc_bus)
2049 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2050 }
390d0bbe 2051 radeon_connector->dac_load_detect = true;
e35755fa 2052 drm_object_attach_property(&radeon_connector->base.base,
390d0bbe
AD		 2053 rdev->mode_info.load_detect_property,
2054 1);
da997620
AD		 2055 if (ASIC_IS_AVIVO(rdev))
2056 drm_object_attach_property(&radeon_connector->base.base,
2057 dev->mode_config.scaling_mode_property,
2058 DRM_MODE_SCALE_NONE);
643b1f56
AD		 2059 if (ASIC_IS_DCE5(rdev))
2060 drm_object_attach_property(&radeon_connector->base.base,
2061 rdev->mode_info.output_csc_property,
2062 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2063 /* no HPD on analog connectors */
2064 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eac4dff6 2065 connector->interlace_allowed = true;
c49948f4 2066 connector->doublescan_allowed = true;
eac4dff6
AD		 2067 break;
2068 case DRM_MODE_CONNECTOR_DVIA:
2069 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
2070 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
2071 if (i2c_bus->valid) {
2072 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2073 if (!radeon_connector->ddc_bus)
2074 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2075 }
2076 radeon_connector->dac_load_detect = true;
e35755fa 2077 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2078 rdev->mode_info.load_detect_property,
2079 1);
da997620
AD		 2080 if (ASIC_IS_AVIVO(rdev))
2081 drm_object_attach_property(&radeon_connector->base.base,
2082 dev->mode_config.scaling_mode_property,
2083 DRM_MODE_SCALE_NONE);
643b1f56
AD		 2084 if (ASIC_IS_DCE5(rdev))
2085 drm_object_attach_property(&radeon_connector->base.base,
2086 rdev->mode_info.output_csc_property,
2087 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2088 /* no HPD on analog connectors */
2089 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2090 connector->interlace_allowed = true;
2091 connector->doublescan_allowed = true;
2092 break;
2093 case DRM_MODE_CONNECTOR_DVII:
2094 case DRM_MODE_CONNECTOR_DVID:
2095 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2096 if (!radeon_dig_connector)
2097 goto failed;
2098 radeon_dig_connector->igp_lane_info = igp_lane_info;
2099 radeon_connector->con_priv = radeon_dig_connector;
2100 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
2101 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2102 if (i2c_bus->valid) {
2103 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2104 if (!radeon_connector->ddc_bus)
2105 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2106 }
2107 subpixel_order = SubPixelHorizontalRGB;
e35755fa 2108 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2109 rdev->mode_info.coherent_mode_property,
2110 1);
2111 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2112 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2113 rdev->mode_info.underscan_property,
2114 UNDERSCAN_OFF);
e35755fa 2115 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2116 rdev->mode_info.underscan_hborder_property,
2117 0);
e35755fa 2118 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2119 rdev->mode_info.underscan_vborder_property,
2120 0);
da997620
AD		 2121 drm_object_attach_property(&radeon_connector->base.base,
2122 rdev->mode_info.dither_property,
2123 RADEON_FMT_DITHER_DISABLE);
2124 drm_object_attach_property(&radeon_connector->base.base,
2125 dev->mode_config.scaling_mode_property,
2126 DRM_MODE_SCALE_NONE);
eac4dff6 2127 }
108dc8e8 2128 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2129 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2130 rdev->mode_info.audio_property,
e31fadd3 2131 RADEON_AUDIO_AUTO);
7403c515 2132 radeon_connector->audio = RADEON_AUDIO_AUTO;
8666c076 2133 }
eac4dff6
AD		 2134 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
2135 radeon_connector->dac_load_detect = true;
e35755fa 2136 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2137 rdev->mode_info.load_detect_property,
2138 1);
2139 }
643b1f56
AD		 2140 if (ASIC_IS_DCE5(rdev))
2141 drm_object_attach_property(&radeon_connector->base.base,
2142 rdev->mode_info.output_csc_property,
2143 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2144 connector->interlace_allowed = true;
2145 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2146 connector->doublescan_allowed = true;
2147 else
2148 connector->doublescan_allowed = false;
2149 break;
2150 case DRM_MODE_CONNECTOR_HDMIA:
2151 case DRM_MODE_CONNECTOR_HDMIB:
2152 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2153 if (!radeon_dig_connector)
2154 goto failed;
2155 radeon_dig_connector->igp_lane_info = igp_lane_info;
2156 radeon_connector->con_priv = radeon_dig_connector;
2157 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
2158 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2159 if (i2c_bus->valid) {
2160 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2161 if (!radeon_connector->ddc_bus)
2162 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2163 }
e35755fa 2164 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2165 rdev->mode_info.coherent_mode_property,
2166 1);
2167 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2168 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2169 rdev->mode_info.underscan_property,
2170 UNDERSCAN_OFF);
e35755fa 2171 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2172 rdev->mode_info.underscan_hborder_property,
2173 0);
e35755fa 2174 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2175 rdev->mode_info.underscan_vborder_property,
2176 0);
da997620
AD		 2177 drm_object_attach_property(&radeon_connector->base.base,
2178 rdev->mode_info.dither_property,
2179 RADEON_FMT_DITHER_DISABLE);
2180 drm_object_attach_property(&radeon_connector->base.base,
2181 dev->mode_config.scaling_mode_property,
2182 DRM_MODE_SCALE_NONE);
eac4dff6 2183 }
108dc8e8 2184 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2185 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2186 rdev->mode_info.audio_property,
e31fadd3 2187 RADEON_AUDIO_AUTO);
7403c515 2188 radeon_connector->audio = RADEON_AUDIO_AUTO;
8666c076 2189 }
643b1f56
AD		 2190 if (ASIC_IS_DCE5(rdev))
2191 drm_object_attach_property(&radeon_connector->base.base,
2192 rdev->mode_info.output_csc_property,
2193 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2194 subpixel_order = SubPixelHorizontalRGB;
2195 connector->interlace_allowed = true;
2196 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
2197 connector->doublescan_allowed = true;
2198 else
2199 connector->doublescan_allowed = false;
2200 break;
2201 case DRM_MODE_CONNECTOR_DisplayPort:
2202 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2203 if (!radeon_dig_connector)
2204 goto failed;
2205 radeon_dig_connector->igp_lane_info = igp_lane_info;
2206 radeon_connector->con_priv = radeon_dig_connector;
2207 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
2208 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2209 if (i2c_bus->valid) {
eac4dff6 2210 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
496263bf
AD		 2211 if (radeon_connector->ddc_bus)
2212 has_aux = true;
2213 else
eac4dff6
AD		 2214 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2215 }
2216 subpixel_order = SubPixelHorizontalRGB;
e35755fa 2217 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2218 rdev->mode_info.coherent_mode_property,
2219 1);
2220 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2221 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2222 rdev->mode_info.underscan_property,
2223 UNDERSCAN_OFF);
e35755fa 2224 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2225 rdev->mode_info.underscan_hborder_property,
2226 0);
e35755fa 2227 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2228 rdev->mode_info.underscan_vborder_property,
2229 0);
da997620
AD		 2230 drm_object_attach_property(&radeon_connector->base.base,
2231 rdev->mode_info.dither_property,
2232 RADEON_FMT_DITHER_DISABLE);
2233 drm_object_attach_property(&radeon_connector->base.base,
2234 dev->mode_config.scaling_mode_property,
2235 DRM_MODE_SCALE_NONE);
eac4dff6 2236 }
108dc8e8 2237 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2238 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2239 rdev->mode_info.audio_property,
e31fadd3 2240 RADEON_AUDIO_AUTO);
7403c515 2241 radeon_connector->audio = RADEON_AUDIO_AUTO;
8666c076 2242 }
643b1f56
AD		 2243 if (ASIC_IS_DCE5(rdev))
2244 drm_object_attach_property(&radeon_connector->base.base,
2245 rdev->mode_info.output_csc_property,
2246 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2247 connector->interlace_allowed = true;
2248 /* in theory with a DP to VGA converter... */
c49948f4 2249 connector->doublescan_allowed = false;
eac4dff6
AD		 2250 break;
2251 case DRM_MODE_CONNECTOR_eDP:
2252 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2253 if (!radeon_dig_connector)
2254 goto failed;
2255 radeon_dig_connector->igp_lane_info = igp_lane_info;
2256 radeon_connector->con_priv = radeon_dig_connector;
855f5f1d 2257 drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
eac4dff6
AD		 2258 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2259 if (i2c_bus->valid) {
379dfc25
AD		 2260 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2261 if (radeon_connector->ddc_bus)
496263bf
AD		 2262 has_aux = true;
2263 else
eac4dff6
AD		 2264 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2265 }
e35755fa 2266 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2267 dev->mode_config.scaling_mode_property,
2268 DRM_MODE_SCALE_FULLSCREEN);
2269 subpixel_order = SubPixelHorizontalRGB;
2270 connector->interlace_allowed = false;
2271 connector->doublescan_allowed = false;
2272 break;
2273 case DRM_MODE_CONNECTOR_SVIDEO:
2274 case DRM_MODE_CONNECTOR_Composite:
2275 case DRM_MODE_CONNECTOR_9PinDIN:
2276 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2277 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2278 radeon_connector->dac_load_detect = true;
e35755fa 2279 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2280 rdev->mode_info.load_detect_property,
2281 1);
e35755fa 2282 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2283 rdev->mode_info.tv_std_property,
2284 radeon_atombios_get_tv_info(rdev));
2285 /* no HPD on analog connectors */
2286 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2287 connector->interlace_allowed = false;
2288 connector->doublescan_allowed = false;
2289 break;
2290 case DRM_MODE_CONNECTOR_LVDS:
2291 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2292 if (!radeon_dig_connector)
2293 goto failed;
2294 radeon_dig_connector->igp_lane_info = igp_lane_info;
2295 radeon_connector->con_priv = radeon_dig_connector;
2296 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
2297 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
2298 if (i2c_bus->valid) {
2299 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2300 if (!radeon_connector->ddc_bus)
2301 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2302 }
e35755fa 2303 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2304 dev->mode_config.scaling_mode_property,
2305 DRM_MODE_SCALE_FULLSCREEN);
2306 subpixel_order = SubPixelHorizontalRGB;
2307 connector->interlace_allowed = false;
2308 connector->doublescan_allowed = false;
2309 break;
771fe6b9 2310 }
771fe6b9
JG		 2311 }
2312
2581afcc 2313 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
14ff8d48
L		 2314 if (i2c_bus->valid) {
2315 connector->polled = DRM_CONNECTOR_POLL_CONNECT |
2316 DRM_CONNECTOR_POLL_DISCONNECT;
2317 }
eb1f8e4f
DA		 2318 } else
2319 connector->polled = DRM_CONNECTOR_POLL_HPD;
2320
771fe6b9 2321 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2322 drm_connector_register(connector);
496263bf
AD		 2323
2324 if (has_aux)
2325 radeon_dp_aux_init(radeon_connector);
2326
771fe6b9
JG		 2327 return;
2328
2329failed:
771fe6b9
JG		 2330 drm_connector_cleanup(connector);
2331 kfree(connector);
2332}
2333
2334void
2335radeon_add_legacy_connector(struct drm_device *dev,
2336 uint32_t connector_id,
2337 uint32_t supported_device,
2338 int connector_type,
b75fad06 2339 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD		 2340 uint16_t connector_object_id,
2341 struct radeon_hpd *hpd)
771fe6b9 2342{
445282db 2343 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 2344 struct drm_connector *connector;
2345 struct radeon_connector *radeon_connector;
2346 uint32_t subpixel_order = SubPixelNone;
2347
4ce001ab 2348 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 2349 return;
2350
cf4c12f9
AD		 2351 /* if the user selected tv=0 don't try and add the connector */
2352 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
2353 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
2354 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
2355 (radeon_tv == 0))
2356 return;
2357
771fe6b9
JG		 2358 /* see if we already added it */
2359 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2360 radeon_connector = to_radeon_connector(connector);
2361 if (radeon_connector->connector_id == connector_id) {
2362 radeon_connector->devices |= supported_device;
2363 return;
2364 }
2365 }
2366
2367 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
2368 if (!radeon_connector)
2369 return;
2370
2371 connector = &radeon_connector->base;
2372
2373 radeon_connector->connector_id = connector_id;
2374 radeon_connector->devices = supported_device;
b75fad06 2375 radeon_connector->connector_object_id = connector_object_id;
eed45b30 2376 radeon_connector->hpd = *hpd;
bc1c4dc3 2377
771fe6b9
JG		 2378 switch (connector_type) {
2379 case DRM_MODE_CONNECTOR_VGA:
2380 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2381 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2382 if (i2c_bus->valid) {
f376b94f 2383 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2384 if (!radeon_connector->ddc_bus)
a70882aa 2385 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2386 }
35e4b7af 2387 radeon_connector->dac_load_detect = true;
e35755fa 2388 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2389 rdev->mode_info.load_detect_property,
2390 1);
2581afcc
AD		 2391 /* no HPD on analog connectors */
2392 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2393 connector->interlace_allowed = true;
2394 connector->doublescan_allowed = true;
771fe6b9
JG		 2395 break;
2396 case DRM_MODE_CONNECTOR_DVIA:
2397 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2398 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2399 if (i2c_bus->valid) {
f376b94f 2400 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2401 if (!radeon_connector->ddc_bus)
a70882aa 2402 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2403 }
35e4b7af 2404 radeon_connector->dac_load_detect = true;
e35755fa 2405 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2406 rdev->mode_info.load_detect_property,
2407 1);
2581afcc
AD		 2408 /* no HPD on analog connectors */
2409 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2410 connector->interlace_allowed = true;
2411 connector->doublescan_allowed = true;
771fe6b9
JG		 2412 break;
2413 case DRM_MODE_CONNECTOR_DVII:
2414 case DRM_MODE_CONNECTOR_DVID:
2415 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 2416 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 2417 if (i2c_bus->valid) {
f376b94f 2418 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2419 if (!radeon_connector->ddc_bus)
a70882aa 2420 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD		 2421 }
2422 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 2423 radeon_connector->dac_load_detect = true;
e35755fa 2424 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2425 rdev->mode_info.load_detect_property,
2426 1);
771fe6b9
JG		 2427 }
2428 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2429 connector->interlace_allowed = true;
2430 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2431 connector->doublescan_allowed = true;
2432 else
2433 connector->doublescan_allowed = false;
771fe6b9
JG		 2434 break;
2435 case DRM_MODE_CONNECTOR_SVIDEO:
2436 case DRM_MODE_CONNECTOR_Composite:
2437 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD		 2438 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2439 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2440 radeon_connector->dac_load_detect = true;
2441 /* RS400,RC410,RS480 chipset seems to report a lot
2442 * of false positive on load detect, we haven't yet
2443 * found a way to make load detect reliable on those
2444 * chipset, thus just disable it for TV.
2445 */
2446 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
2447 radeon_connector->dac_load_detect = false;
e35755fa 2448 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2449 rdev->mode_info.load_detect_property,
2450 radeon_connector->dac_load_detect);
e35755fa 2451 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2452 rdev->mode_info.tv_std_property,
2453 radeon_combios_get_tv_info(rdev));
2454 /* no HPD on analog connectors */
2455 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2456 connector->interlace_allowed = false;
2457 connector->doublescan_allowed = false;
771fe6b9
JG		 2458 break;
2459 case DRM_MODE_CONNECTOR_LVDS:
2460 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 2461 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 2462 if (i2c_bus->valid) {
f376b94f 2463 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2464 if (!radeon_connector->ddc_bus)
a70882aa 2465 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2466 }
e35755fa 2467 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2468 dev->mode_config.scaling_mode_property,
2469 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 2470 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2471 connector->interlace_allowed = false;
2472 connector->doublescan_allowed = false;
771fe6b9
JG		 2473 break;
2474 }
2475
2581afcc 2476 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
14ff8d48
L		 2477 if (i2c_bus->valid) {
2478 connector->polled = DRM_CONNECTOR_POLL_CONNECT |
2479 DRM_CONNECTOR_POLL_DISCONNECT;
2480 }
eb1f8e4f
DA		 2481 } else
2482 connector->polled = DRM_CONNECTOR_POLL_HPD;
14ff8d48 2483
771fe6b9 2484 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2485 drm_connector_register(connector);
771fe6b9 2486}
9843ead0
DA		 2487
2488void radeon_setup_mst_connector(struct drm_device *dev)
2489{
2490 struct radeon_device *rdev = dev->dev_private;
2491 struct drm_connector *connector;
2492 struct radeon_connector *radeon_connector;
2493
2494 if (!ASIC_IS_DCE5(rdev))
2495 return;
2496
2497 if (radeon_mst == 0)
2498 return;
2499
2500 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2501 int ret;
2502
2503 radeon_connector = to_radeon_connector(connector);
2504
2505 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
2506 continue;
2507
2508 ret = radeon_dp_mst_init(radeon_connector);
2509 }
2510}
Linux 6.x block layer and io_uring tree(s)