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Merge branches 'acpi-video', 'device-properties', 'pm-sleep' and 'pm-cpuidle'
[linux-2.6-block.git] / drivers / gpu / drm / radeon / radeon_connectors.c
CommitLineData
771fe6b9
JG		 1/*
2 * Copyright 2007-8 Advanced Micro Devices, Inc.
3 * Copyright 2008 Red Hat Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors: Dave Airlie
24 * Alex Deucher
25 */
760285e7
DH		 26#include <drm/drmP.h>
27#include <drm/drm_edid.h>
28#include <drm/drm_crtc_helper.h>
29#include <drm/drm_fb_helper.h>
9843ead0 30#include <drm/drm_dp_mst_helper.h>
760285e7 31#include <drm/radeon_drm.h>
771fe6b9 32#include "radeon.h"
1a626b68 33#include "radeon_audio.h"
923f6848 34#include "atom.h"
771fe6b9 35
10ebc0bc
DA		 36#include <linux/pm_runtime.h>
37
9843ead0
DA		 38static int radeon_dp_handle_hpd(struct drm_connector *connector)
39{
40 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
41 int ret;
42
43 ret = radeon_dp_mst_check_status(radeon_connector);
44 if (ret == -EINVAL)
45 return 1;
46 return 0;
47}
d4877cf2
AD		 48void radeon_connector_hotplug(struct drm_connector *connector)
49{
50 struct drm_device *dev = connector->dev;
51 struct radeon_device *rdev = dev->dev_private;
52 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
53
9843ead0
DA		 54 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
55 struct radeon_connector_atom_dig *dig_connector =
56 radeon_connector->con_priv;
57
58 if (radeon_connector->is_mst_connector)
59 return;
60 if (dig_connector->is_mst) {
61 radeon_dp_handle_hpd(connector);
62 return;
63 }
64 }
cbac9543
AD		 65 /* bail if the connector does not have hpd pin, e.g.,
66 * VGA, TV, etc.
67 */
68 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
69 return;
70
1e85e1d0 71 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
d4877cf2 72
73104b5c 73 /* if the connector is already off, don't turn it back on */
6e9f798d 74 /* FIXME: This access isn't protected by any locks. */
73104b5c
AD		 75 if (connector->dpms != DRM_MODE_DPMS_ON)
76 return;
77
d5811e87
AD		 78 /* just deal with DP (not eDP) here. */
79 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
266dcba5
JG		 80 struct radeon_connector_atom_dig *dig_connector =
81 radeon_connector->con_priv;
7c3ed0fd 82
266dcba5
JG		 83 /* if existing sink type was not DP no need to retrain */
84 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
85 return;
86
87 /* first get sink type as it may be reset after (un)plug */
88 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
89 /* don't do anything if sink is not display port, i.e.,
90 * passive dp->(dvi|hdmi) adaptor
91 */
92 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
93 int saved_dpms = connector->dpms;
94 /* Only turn off the display if it's physically disconnected */
ca2ccde5 95 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
266dcba5 96 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
ca2ccde5
JG		 97 } else if (radeon_dp_needs_link_train(radeon_connector)) {
98 /* set it to OFF so that drm_helper_connector_dpms()
99 * won't return immediately since the current state
100 * is ON at this point.
101 */
102 connector->dpms = DRM_MODE_DPMS_OFF;
266dcba5 103 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
ca2ccde5 104 }
266dcba5
JG		 105 connector->dpms = saved_dpms;
106 }
d4877cf2 107 }
d4877cf2
AD		 108}
109
445282db
DA		 110static void radeon_property_change_mode(struct drm_encoder *encoder)
111{
112 struct drm_crtc *crtc = encoder->crtc;
113
114 if (crtc && crtc->enabled) {
115 drm_crtc_helper_set_mode(crtc, &crtc->mode,
f4510a27 116 crtc->x, crtc->y, crtc->primary->fb);
445282db
DA		 117 }
118}
eccea792
AD		 119
120int radeon_get_monitor_bpc(struct drm_connector *connector)
121{
122 struct drm_device *dev = connector->dev;
123 struct radeon_device *rdev = dev->dev_private;
124 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
125 struct radeon_connector_atom_dig *dig_connector;
126 int bpc = 8;
ea292861 127 int mode_clock, max_tmds_clock;
eccea792
AD		 128
129 switch (connector->connector_type) {
130 case DRM_MODE_CONNECTOR_DVII:
131 case DRM_MODE_CONNECTOR_HDMIB:
132 if (radeon_connector->use_digital) {
377bd8a9 133 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 134 if (connector->display_info.bpc)
135 bpc = connector->display_info.bpc;
136 }
137 }
138 break;
139 case DRM_MODE_CONNECTOR_DVID:
140 case DRM_MODE_CONNECTOR_HDMIA:
377bd8a9 141 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 142 if (connector->display_info.bpc)
143 bpc = connector->display_info.bpc;
144 }
145 break;
146 case DRM_MODE_CONNECTOR_DisplayPort:
147 dig_connector = radeon_connector->con_priv;
148 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
149 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
377bd8a9 150 drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
eccea792
AD		 151 if (connector->display_info.bpc)
152 bpc = connector->display_info.bpc;
153 }
154 break;
155 case DRM_MODE_CONNECTOR_eDP:
156 case DRM_MODE_CONNECTOR_LVDS:
157 if (connector->display_info.bpc)
158 bpc = connector->display_info.bpc;
159 else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {
319d1e14 160 const struct drm_connector_helper_funcs *connector_funcs =
eccea792
AD		 161 connector->helper_private;
162 struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
163 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
164 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
165
166 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
167 bpc = 6;
168 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
169 bpc = 8;
170 }
171 break;
172 }
89b92339 173
377bd8a9 174 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
89b92339
MK		 175 /* hdmi deep color only implemented on DCE4+ */
176 if ((bpc > 8) && !ASIC_IS_DCE4(rdev)) {
177 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n",
72082093 178 connector->name, bpc);
89b92339
MK		 179 bpc = 8;
180 }
181
182 /*
183 * Pre DCE-8 hw can't handle > 12 bpc, and more than 12 bpc doesn't make
184 * much sense without support for > 12 bpc framebuffers. RGB 4:4:4 at
185 * 12 bpc is always supported on hdmi deep color sinks, as this is
186 * required by the HDMI-1.3 spec. Clamp to a safe 12 bpc maximum.
187 */
188 if (bpc > 12) {
189 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
72082093 190 connector->name, bpc);
89b92339
MK		 191 bpc = 12;
192 }
ea292861
MK		 193
194 /* Any defined maximum tmds clock limit we must not exceed? */
195 if (connector->max_tmds_clock > 0) {
196 /* mode_clock is clock in kHz for mode to be modeset on this connector */
197 mode_clock = radeon_connector->pixelclock_for_modeset;
198
199 /* Maximum allowable input clock in kHz */
200 max_tmds_clock = connector->max_tmds_clock * 1000;
201
202 DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
203 connector->name, mode_clock, max_tmds_clock);
204
205 /* Check if bpc is within clock limit. Try to degrade gracefully otherwise */
206 if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
207 if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) &&
208 (mode_clock * 5/4 <= max_tmds_clock))
209 bpc = 10;
210 else
211 bpc = 8;
212
213 DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",
214 connector->name, bpc);
215 }
216
217 if ((bpc == 10) && (mode_clock * 5/4 > max_tmds_clock)) {
218 bpc = 8;
219 DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",
220 connector->name, bpc);
221 }
222 }
9f51e2e0
MK		 223 else if (bpc > 8) {
224 /* max_tmds_clock missing, but hdmi spec mandates it for deep color. */
225 DRM_DEBUG("%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n",
226 connector->name);
227 bpc = 8;
228 }
89b92339
MK		 229 }
230
9f51e2e0
MK		 231 if ((radeon_deep_color == 0) && (bpc > 8)) {
232 DRM_DEBUG("%s: Deep color disabled. Set radeon module param deep_color=1 to enable.\n",
233 connector->name);
a624f429 234 bpc = 8;
9f51e2e0 235 }
a624f429 236
89b92339 237 DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
72082093 238 connector->name, connector->display_info.bpc, bpc);
89b92339 239
eccea792
AD		 240 return bpc;
241}
242
771fe6b9
JG		 243static void
244radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
245{
246 struct drm_device *dev = connector->dev;
247 struct radeon_device *rdev = dev->dev_private;
248 struct drm_encoder *best_encoder = NULL;
249 struct drm_encoder *encoder = NULL;
319d1e14 250 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
771fe6b9
JG		 251 bool connected;
252 int i;
253
254 best_encoder = connector_funcs->best_encoder(connector);
255
256 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
257 if (connector->encoder_ids[i] == 0)
258 break;
259
b957f457
RC		 260 encoder = drm_encoder_find(connector->dev,
261 connector->encoder_ids[i]);
262 if (!encoder)
771fe6b9
JG		 263 continue;
264
771fe6b9
JG		 265 if ((encoder == best_encoder) && (status == connector_status_connected))
266 connected = true;
267 else
268 connected = false;
269
270 if (rdev->is_atom_bios)
271 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
272 else
273 radeon_combios_connected_scratch_regs(connector, encoder, connected);
274
275 }
276}
277
1109ca09 278static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
445282db 279{
445282db
DA		 280 struct drm_encoder *encoder;
281 int i;
282
283 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
284 if (connector->encoder_ids[i] == 0)
285 break;
286
b957f457
RC		 287 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
288 if (!encoder)
445282db
DA		 289 continue;
290
445282db
DA		 291 if (encoder->encoder_type == encoder_type)
292 return encoder;
293 }
294 return NULL;
295}
296
377bd8a9
AD		 297struct edid *radeon_connector_edid(struct drm_connector *connector)
298{
299 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
300 struct drm_property_blob *edid_blob = connector->edid_blob_ptr;
301
302 if (radeon_connector->edid) {
303 return radeon_connector->edid;
304 } else if (edid_blob) {
305 struct edid *edid = kmemdup(edid_blob->data, edid_blob->length, GFP_KERNEL);
306 if (edid)
307 radeon_connector->edid = edid;
308 }
309 return radeon_connector->edid;
310}
311
72a5c970
AD		 312static void radeon_connector_get_edid(struct drm_connector *connector)
313{
314 struct drm_device *dev = connector->dev;
315 struct radeon_device *rdev = dev->dev_private;
316 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
317
318 if (radeon_connector->edid)
319 return;
320
321 /* on hw with routers, select right port */
322 if (radeon_connector->router.ddc_valid)
323 radeon_router_select_ddc_port(radeon_connector);
324
325 if ((radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
326 ENCODER_OBJECT_ID_NONE) &&
327 radeon_connector->ddc_bus->has_aux) {
328 radeon_connector->edid = drm_get_edid(connector,
329 &radeon_connector->ddc_bus->aux.ddc);
330 } else if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
331 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
332 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
333
334 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
335 dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) &&
336 radeon_connector->ddc_bus->has_aux)
337 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
338 &radeon_connector->ddc_bus->aux.ddc);
339 else if (radeon_connector->ddc_bus)
340 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
341 &radeon_connector->ddc_bus->adapter);
342 } else if (radeon_connector->ddc_bus) {
343 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
344 &radeon_connector->ddc_bus->adapter);
345 }
346
347 if (!radeon_connector->edid) {
13485794
AD		 348 /* don't fetch the edid from the vbios if ddc fails and runpm is
349 * enabled so we report disconnected.
350 */
351 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
352 return;
353
72a5c970
AD		 354 if (rdev->is_atom_bios) {
355 /* some laptops provide a hardcoded edid in rom for LCDs */
356 if (((connector->connector_type == DRM_MODE_CONNECTOR_LVDS) ||
357 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)))
358 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
359 } else {
360 /* some servers provide a hardcoded edid in rom for KVMs */
361 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
362 }
363 }
364}
365
366static void radeon_connector_free_edid(struct drm_connector *connector)
367{
368 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
369
370 if (radeon_connector->edid) {
371 kfree(radeon_connector->edid);
372 radeon_connector->edid = NULL;
373 }
374}
375
376static int radeon_ddc_get_modes(struct drm_connector *connector)
377{
378 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
379 int ret;
380
381 if (radeon_connector->edid) {
382 drm_mode_connector_update_edid_property(connector, radeon_connector->edid);
383 ret = drm_add_edid_modes(connector, radeon_connector->edid);
384 drm_edid_to_eld(connector, radeon_connector->edid);
385 return ret;
386 }
387 drm_mode_connector_update_edid_property(connector, NULL);
388 return 0;
389}
390
1109ca09 391static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
771fe6b9
JG		 392{
393 int enc_id = connector->encoder_ids[0];
771fe6b9 394 /* pick the encoder ids */
b957f457
RC		 395 if (enc_id)
396 return drm_encoder_find(connector->dev, enc_id);
771fe6b9
JG		 397 return NULL;
398}
399
da997620
AD		 400static void radeon_get_native_mode(struct drm_connector *connector)
401{
402 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
403 struct radeon_encoder *radeon_encoder;
404
405 if (encoder == NULL)
406 return;
407
408 radeon_encoder = to_radeon_encoder(encoder);
409
410 if (!list_empty(&connector->probed_modes)) {
411 struct drm_display_mode *preferred_mode =
412 list_first_entry(&connector->probed_modes,
413 struct drm_display_mode, head);
414
415 radeon_encoder->native_mode = *preferred_mode;
416 } else {
417 radeon_encoder->native_mode.clock = 0;
418 }
419}
420
4ce001ab
DA		 421/*
422 * radeon_connector_analog_encoder_conflict_solve
423 * - search for other connectors sharing this encoder
424 * if priority is true, then set them disconnected if this is connected
425 * if priority is false, set us disconnected if they are connected
426 */
427static enum drm_connector_status
428radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
429 struct drm_encoder *encoder,
430 enum drm_connector_status current_status,
431 bool priority)
432{
433 struct drm_device *dev = connector->dev;
434 struct drm_connector *conflict;
08d07511 435 struct radeon_connector *radeon_conflict;
4ce001ab
DA		 436 int i;
437
438 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
439 if (conflict == connector)
440 continue;
441
08d07511 442 radeon_conflict = to_radeon_connector(conflict);
4ce001ab
DA		 443 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
444 if (conflict->encoder_ids[i] == 0)
445 break;
446
447 /* if the IDs match */
448 if (conflict->encoder_ids[i] == encoder->base.id) {
449 if (conflict->status != connector_status_connected)
450 continue;
08d07511
AD		 451
452 if (radeon_conflict->use_digital)
453 continue;
4ce001ab
DA		 454
455 if (priority == true) {
72082093
JN		 456 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n",
457 conflict->name);
458 DRM_DEBUG_KMS("in favor of %s\n",
459 connector->name);
4ce001ab
DA		 460 conflict->status = connector_status_disconnected;
461 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
462 } else {
72082093
JN		 463 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n",
464 connector->name);
465 DRM_DEBUG_KMS("in favor of %s\n",
466 conflict->name);
4ce001ab
DA		 467 current_status = connector_status_disconnected;
468 }
469 break;
470 }
471 }
472 }
473 return current_status;
474
475}
476
771fe6b9
JG		 477static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
478{
479 struct drm_device *dev = encoder->dev;
480 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
481 struct drm_display_mode *mode = NULL;
de2103e4 482 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
771fe6b9 483
de2103e4
AD		 484 if (native_mode->hdisplay != 0 &&
485 native_mode->vdisplay != 0 &&
486 native_mode->clock != 0) {
fb06ca8f 487 mode = drm_mode_duplicate(dev, native_mode);
771fe6b9
JG		 488 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
489 drm_mode_set_name(mode);
490
d9fdaafb 491 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
d2efdf6d
AD		 492 } else if (native_mode->hdisplay != 0 &&
493 native_mode->vdisplay != 0) {
494 /* mac laptops without an edid */
495 /* Note that this is not necessarily the exact panel mode,
496 * but an approximation based on the cvt formula. For these
497 * systems we should ideally read the mode info out of the
498 * registers or add a mode table, but this works and is much
499 * simpler.
500 */
501 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
502 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
d9fdaafb 503 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
771fe6b9
JG		 504 }
505 return mode;
506}
507
923f6848
AD		 508static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
509{
510 struct drm_device *dev = encoder->dev;
511 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
512 struct drm_display_mode *mode = NULL;
de2103e4 513 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
923f6848
AD		 514 int i;
515 struct mode_size {
516 int w;
517 int h;
518 } common_modes[17] = {
519 { 640, 480},
520 { 720, 480},
521 { 800, 600},
522 { 848, 480},
523 {1024, 768},
524 {1152, 768},
525 {1280, 720},
526 {1280, 800},
527 {1280, 854},
528 {1280, 960},
529 {1280, 1024},
530 {1440, 900},
531 {1400, 1050},
532 {1680, 1050},
533 {1600, 1200},
534 {1920, 1080},
535 {1920, 1200}
536 };
537
538 for (i = 0; i < 17; i++) {
dfdd6467
AD		 539 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
540 if (common_modes[i].w > 1024 ||
541 common_modes[i].h > 768)
542 continue;
543 }
923f6848 544 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
de2103e4
AD		 545 if (common_modes[i].w > native_mode->hdisplay ||
546 common_modes[i].h > native_mode->vdisplay ||
547 (common_modes[i].w == native_mode->hdisplay &&
548 common_modes[i].h == native_mode->vdisplay))
923f6848
AD		 549 continue;
550 }
551 if (common_modes[i].w < 320 || common_modes[i].h < 200)
552 continue;
553
d50ba256 554 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
923f6848
AD		 555 drm_mode_probed_add(connector, mode);
556 }
557}
558
1109ca09 559static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
771fe6b9
JG		 560 uint64_t val)
561{
445282db
DA		 562 struct drm_device *dev = connector->dev;
563 struct radeon_device *rdev = dev->dev_private;
564 struct drm_encoder *encoder;
565 struct radeon_encoder *radeon_encoder;
566
567 if (property == rdev->mode_info.coherent_mode_property) {
568 struct radeon_encoder_atom_dig *dig;
ce227c41 569 bool new_coherent_mode;
445282db
DA		 570
571 /* need to find digital encoder on connector */
572 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
573 if (!encoder)
574 return 0;
575
576 radeon_encoder = to_radeon_encoder(encoder);
577
578 if (!radeon_encoder->enc_priv)
579 return 0;
580
581 dig = radeon_encoder->enc_priv;
ce227c41
DA		 582 new_coherent_mode = val ? true : false;
583 if (dig->coherent_mode != new_coherent_mode) {
584 dig->coherent_mode = new_coherent_mode;
585 radeon_property_change_mode(&radeon_encoder->base);
586 }
445282db
DA		 587 }
588
8666c076
AD		 589 if (property == rdev->mode_info.audio_property) {
590 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
591 /* need to find digital encoder on connector */
592 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
593 if (!encoder)
594 return 0;
595
596 radeon_encoder = to_radeon_encoder(encoder);
597
598 if (radeon_connector->audio != val) {
599 radeon_connector->audio = val;
600 radeon_property_change_mode(&radeon_encoder->base);
601 }
602 }
603
6214bb74
AD		 604 if (property == rdev->mode_info.dither_property) {
605 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
606 /* need to find digital encoder on connector */
607 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
608 if (!encoder)
609 return 0;
610
611 radeon_encoder = to_radeon_encoder(encoder);
612
613 if (radeon_connector->dither != val) {
614 radeon_connector->dither = val;
615 radeon_property_change_mode(&radeon_encoder->base);
616 }
617 }
618
5b1714d3
AD		 619 if (property == rdev->mode_info.underscan_property) {
620 /* need to find digital encoder on connector */
621 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
622 if (!encoder)
623 return 0;
624
625 radeon_encoder = to_radeon_encoder(encoder);
626
627 if (radeon_encoder->underscan_type != val) {
628 radeon_encoder->underscan_type = val;
629 radeon_property_change_mode(&radeon_encoder->base);
630 }
631 }
632
5bccf5e3
MG		 633 if (property == rdev->mode_info.underscan_hborder_property) {
634 /* need to find digital encoder on connector */
635 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
636 if (!encoder)
637 return 0;
638
639 radeon_encoder = to_radeon_encoder(encoder);
640
641 if (radeon_encoder->underscan_hborder != val) {
642 radeon_encoder->underscan_hborder = val;
643 radeon_property_change_mode(&radeon_encoder->base);
644 }
645 }
646
647 if (property == rdev->mode_info.underscan_vborder_property) {
648 /* need to find digital encoder on connector */
649 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
650 if (!encoder)
651 return 0;
652
653 radeon_encoder = to_radeon_encoder(encoder);
654
655 if (radeon_encoder->underscan_vborder != val) {
656 radeon_encoder->underscan_vborder = val;
657 radeon_property_change_mode(&radeon_encoder->base);
658 }
659 }
660
445282db
DA		 661 if (property == rdev->mode_info.tv_std_property) {
662 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
663 if (!encoder) {
664 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
665 }
666
667 if (!encoder)
668 return 0;
669
670 radeon_encoder = to_radeon_encoder(encoder);
671 if (!radeon_encoder->enc_priv)
672 return 0;
643acacf 673 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
445282db
DA		 674 struct radeon_encoder_atom_dac *dac_int;
675 dac_int = radeon_encoder->enc_priv;
676 dac_int->tv_std = val;
677 } else {
678 struct radeon_encoder_tv_dac *dac_int;
679 dac_int = radeon_encoder->enc_priv;
680 dac_int->tv_std = val;
681 }
682 radeon_property_change_mode(&radeon_encoder->base);
683 }
684
685 if (property == rdev->mode_info.load_detect_property) {
686 struct radeon_connector *radeon_connector =
687 to_radeon_connector(connector);
688
689 if (val == 0)
690 radeon_connector->dac_load_detect = false;
691 else
692 radeon_connector->dac_load_detect = true;
693 }
694
695 if (property == rdev->mode_info.tmds_pll_property) {
696 struct radeon_encoder_int_tmds *tmds = NULL;
697 bool ret = false;
698 /* need to find digital encoder on connector */
699 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
700 if (!encoder)
701 return 0;
702
703 radeon_encoder = to_radeon_encoder(encoder);
704
705 tmds = radeon_encoder->enc_priv;
706 if (!tmds)
707 return 0;
708
709 if (val == 0) {
710 if (rdev->is_atom_bios)
711 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
712 else
713 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
714 }
715 if (val == 1 || ret == false) {
716 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
717 }
718 radeon_property_change_mode(&radeon_encoder->base);
719 }
720
da997620
AD		 721 if (property == dev->mode_config.scaling_mode_property) {
722 enum radeon_rmx_type rmx_type;
723
724 if (connector->encoder)
725 radeon_encoder = to_radeon_encoder(connector->encoder);
726 else {
319d1e14 727 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
da997620
AD		 728 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
729 }
730
731 switch (val) {
732 default:
733 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
734 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
735 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
736 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
737 }
738 if (radeon_encoder->rmx_type == rmx_type)
739 return 0;
740
741 if ((rmx_type != DRM_MODE_SCALE_NONE) &&
742 (radeon_encoder->native_mode.clock == 0))
743 return 0;
744
745 radeon_encoder->rmx_type = rmx_type;
746
747 radeon_property_change_mode(&radeon_encoder->base);
748 }
749
643b1f56
AD		 750 if (property == rdev->mode_info.output_csc_property) {
751 if (connector->encoder)
752 radeon_encoder = to_radeon_encoder(connector->encoder);
753 else {
16bb079e 754 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
643b1f56
AD		 755 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
756 }
757
758 if (radeon_encoder->output_csc == val)
759 return 0;
760
761 radeon_encoder->output_csc = val;
762
763 if (connector->encoder->crtc) {
764 struct drm_crtc *crtc = connector->encoder->crtc;
16bb079e 765 const struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
643b1f56
AD		 766 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
767
768 radeon_crtc->output_csc = radeon_encoder->output_csc;
769
770 (*crtc_funcs->load_lut)(crtc);
771 }
772 }
773
771fe6b9
JG		 774 return 0;
775}
776
8dfaa8a7
MD		 777static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
778 struct drm_connector *connector)
779{
780 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 781 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
13bb9430
MG		 782 struct drm_display_mode *t, *mode;
783
784 /* If the EDID preferred mode doesn't match the native mode, use it */
785 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
786 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
787 if (mode->hdisplay != native_mode->hdisplay ||
788 mode->vdisplay != native_mode->vdisplay)
789 memcpy(native_mode, mode, sizeof(*mode));
790 }
791 }
8dfaa8a7
MD		 792
793 /* Try to get native mode details from EDID if necessary */
de2103e4 794 if (!native_mode->clock) {
8dfaa8a7 795 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
de2103e4
AD		 796 if (mode->hdisplay == native_mode->hdisplay &&
797 mode->vdisplay == native_mode->vdisplay) {
798 *native_mode = *mode;
799 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
c5d46b4e 800 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
8dfaa8a7
MD		 801 break;
802 }
803 }
804 }
13bb9430 805
de2103e4 806 if (!native_mode->clock) {
c5d46b4e 807 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
8dfaa8a7
MD		 808 radeon_encoder->rmx_type = RMX_OFF;
809 }
810}
771fe6b9
JG		 811
812static int radeon_lvds_get_modes(struct drm_connector *connector)
813{
771fe6b9
JG		 814 struct drm_encoder *encoder;
815 int ret = 0;
816 struct drm_display_mode *mode;
817
72a5c970
AD		 818 radeon_connector_get_edid(connector);
819 ret = radeon_ddc_get_modes(connector);
820 if (ret > 0) {
821 encoder = radeon_best_single_encoder(connector);
822 if (encoder) {
823 radeon_fixup_lvds_native_mode(encoder, connector);
824 /* add scaled modes */
825 radeon_add_common_modes(encoder, connector);
771fe6b9 826 }
72a5c970 827 return ret;
771fe6b9
JG		 828 }
829
830 encoder = radeon_best_single_encoder(connector);
831 if (!encoder)
832 return 0;
833
834 /* we have no EDID modes */
835 mode = radeon_fp_native_mode(encoder);
836 if (mode) {
837 ret = 1;
838 drm_mode_probed_add(connector, mode);
7a868e18
AD		 839 /* add the width/height from vbios tables if available */
840 connector->display_info.width_mm = mode->width_mm;
841 connector->display_info.height_mm = mode->height_mm;
7747b713
AD		 842 /* add scaled modes */
843 radeon_add_common_modes(encoder, connector);
771fe6b9 844 }
923f6848 845
771fe6b9
JG		 846 return ret;
847}
848
849static int radeon_lvds_mode_valid(struct drm_connector *connector,
850 struct drm_display_mode *mode)
851{
a3fa6320
AD		 852 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
853
854 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
855 return MODE_PANEL;
856
857 if (encoder) {
858 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
859 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
860
861 /* AVIVO hardware supports downscaling modes larger than the panel
862 * to the panel size, but I'm not sure this is desirable.
863 */
864 if ((mode->hdisplay > native_mode->hdisplay) ||
865 (mode->vdisplay > native_mode->vdisplay))
866 return MODE_PANEL;
867
868 /* if scaling is disabled, block non-native modes */
869 if (radeon_encoder->rmx_type == RMX_OFF) {
870 if ((mode->hdisplay != native_mode->hdisplay) ||
871 (mode->vdisplay != native_mode->vdisplay))
872 return MODE_PANEL;
873 }
874 }
875
771fe6b9
JG		 876 return MODE_OK;
877}
878
7b334fcb 879static enum drm_connector_status
930a9e28 880radeon_lvds_detect(struct drm_connector *connector, bool force)
771fe6b9 881{
13485794
AD		 882 struct drm_device *dev = connector->dev;
883 struct radeon_device *rdev = dev->dev_private;
0549a061 884 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
2ffb8429 885 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
0549a061 886 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 887 int r;
888
889 r = pm_runtime_get_sync(connector->dev->dev);
890 if (r < 0)
891 return connector_status_disconnected;
2ffb8429
AD		 892
893 if (encoder) {
894 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
de2103e4 895 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
2ffb8429
AD		 896
897 /* check if panel is valid */
de2103e4 898 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
2ffb8429 899 ret = connector_status_connected;
13485794
AD		 900 /* don't fetch the edid from the vbios if ddc fails and runpm is
901 * enabled so we report disconnected.
902 */
903 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
904 ret = connector_status_disconnected;
2ffb8429 905 }
0549a061
AD		 906
907 /* check for edid as well */
72a5c970 908 radeon_connector_get_edid(connector);
0294cf4f
AD		 909 if (radeon_connector->edid)
910 ret = connector_status_connected;
771fe6b9 911 /* check acpi lid status ??? */
2ffb8429 912
771fe6b9 913 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 914 pm_runtime_mark_last_busy(connector->dev->dev);
915 pm_runtime_put_autosuspend(connector->dev->dev);
771fe6b9
JG		 916 return ret;
917}
918
919static void radeon_connector_destroy(struct drm_connector *connector)
920{
921 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
922
72a5c970 923 radeon_connector_free_edid(connector);
771fe6b9 924 kfree(radeon_connector->con_priv);
34ea3d38 925 drm_connector_unregister(connector);
771fe6b9
JG		 926 drm_connector_cleanup(connector);
927 kfree(connector);
928}
929
445282db
DA		 930static int radeon_lvds_set_property(struct drm_connector *connector,
931 struct drm_property *property,
932 uint64_t value)
933{
934 struct drm_device *dev = connector->dev;
935 struct radeon_encoder *radeon_encoder;
936 enum radeon_rmx_type rmx_type;
937
d9fdaafb 938 DRM_DEBUG_KMS("\n");
445282db
DA		 939 if (property != dev->mode_config.scaling_mode_property)
940 return 0;
941
942 if (connector->encoder)
943 radeon_encoder = to_radeon_encoder(connector->encoder);
944 else {
319d1e14 945 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
445282db
DA		 946 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
947 }
948
949 switch (value) {
950 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
951 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
952 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
953 default:
954 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
955 }
956 if (radeon_encoder->rmx_type == rmx_type)
957 return 0;
958
959 radeon_encoder->rmx_type = rmx_type;
960
961 radeon_property_change_mode(&radeon_encoder->base);
962 return 0;
963}
964
965
1109ca09 966static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
771fe6b9
JG		 967 .get_modes = radeon_lvds_get_modes,
968 .mode_valid = radeon_lvds_mode_valid,
969 .best_encoder = radeon_best_single_encoder,
970};
971
1109ca09 972static const struct drm_connector_funcs radeon_lvds_connector_funcs = {
771fe6b9
JG		 973 .dpms = drm_helper_connector_dpms,
974 .detect = radeon_lvds_detect,
975 .fill_modes = drm_helper_probe_single_connector_modes,
976 .destroy = radeon_connector_destroy,
445282db 977 .set_property = radeon_lvds_set_property,
771fe6b9
JG		 978};
979
980static int radeon_vga_get_modes(struct drm_connector *connector)
981{
771fe6b9
JG		 982 int ret;
983
72a5c970
AD		 984 radeon_connector_get_edid(connector);
985 ret = radeon_ddc_get_modes(connector);
771fe6b9 986
da997620
AD		 987 radeon_get_native_mode(connector);
988
771fe6b9
JG		 989 return ret;
990}
991
992static int radeon_vga_mode_valid(struct drm_connector *connector,
993 struct drm_display_mode *mode)
994{
b20f9bef
AD		 995 struct drm_device *dev = connector->dev;
996 struct radeon_device *rdev = dev->dev_private;
997
a3fa6320 998 /* XXX check mode bandwidth */
b20f9bef
AD		 999
1000 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1001 return MODE_CLOCK_HIGH;
1002
771fe6b9
JG		 1003 return MODE_OK;
1004}
1005
7b334fcb 1006static enum drm_connector_status
930a9e28 1007radeon_vga_detect(struct drm_connector *connector, bool force)
771fe6b9 1008{
fafcf94e
AD		 1009 struct drm_device *dev = connector->dev;
1010 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 1011 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1012 struct drm_encoder *encoder;
319d1e14 1013 const struct drm_encoder_helper_funcs *encoder_funcs;
4b9d2a21 1014 bool dret = false;
771fe6b9 1015 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc
DA		 1016 int r;
1017
1018 r = pm_runtime_get_sync(connector->dev->dev);
1019 if (r < 0)
1020 return connector_status_disconnected;
771fe6b9 1021
4ce001ab
DA		 1022 encoder = radeon_best_single_encoder(connector);
1023 if (!encoder)
1024 ret = connector_status_disconnected;
1025
eb6b6d7c 1026 if (radeon_connector->ddc_bus)
0a9069d3 1027 dret = radeon_ddc_probe(radeon_connector, false);
0294cf4f 1028 if (dret) {
d0d0a225 1029 radeon_connector->detected_by_load = false;
72a5c970
AD		 1030 radeon_connector_free_edid(connector);
1031 radeon_connector_get_edid(connector);
0294cf4f
AD		 1032
1033 if (!radeon_connector->edid) {
f82f5f3a 1034 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 1035 connector->name);
f82f5f3a 1036 ret = connector_status_connected;
0294cf4f 1037 } else {
72a5c970
AD		 1038 radeon_connector->use_digital =
1039 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
0294cf4f
AD		 1040
1041 /* some oems have boards with separate digital and analog connectors
1042 * with a shared ddc line (often vga + hdmi)
1043 */
1044 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
72a5c970 1045 radeon_connector_free_edid(connector);
0294cf4f 1046 ret = connector_status_disconnected;
72a5c970 1047 } else {
0294cf4f 1048 ret = connector_status_connected;
72a5c970 1049 }
0294cf4f
AD		 1050 }
1051 } else {
c3cceedd
DA		 1052
1053 /* if we aren't forcing don't do destructive polling */
d0d0a225
AD		 1054 if (!force) {
1055 /* only return the previous status if we last
1056 * detected a monitor via load.
1057 */
1058 if (radeon_connector->detected_by_load)
10ebc0bc
DA		 1059 ret = connector->status;
1060 goto out;
d0d0a225 1061 }
c3cceedd 1062
d8a7f792 1063 if (radeon_connector->dac_load_detect && encoder) {
445282db
DA		 1064 encoder_funcs = encoder->helper_private;
1065 ret = encoder_funcs->detect(encoder, connector);
34076446 1066 if (ret != connector_status_disconnected)
d0d0a225 1067 radeon_connector->detected_by_load = true;
445282db 1068 }
771fe6b9
JG		 1069 }
1070
4ce001ab
DA		 1071 if (ret == connector_status_connected)
1072 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
fafcf94e
AD		 1073
1074 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1075 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1076 * by other means, assume the CRT is connected and use that EDID.
1077 */
1078 if ((!rdev->is_atom_bios) &&
1079 (ret == connector_status_disconnected) &&
1080 rdev->mode_info.bios_hardcoded_edid_size) {
1081 ret = connector_status_connected;
1082 }
1083
771fe6b9 1084 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1085
1086out:
1087 pm_runtime_mark_last_busy(connector->dev->dev);
1088 pm_runtime_put_autosuspend(connector->dev->dev);
1089
771fe6b9
JG		 1090 return ret;
1091}
1092
1109ca09 1093static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
771fe6b9
JG		 1094 .get_modes = radeon_vga_get_modes,
1095 .mode_valid = radeon_vga_mode_valid,
1096 .best_encoder = radeon_best_single_encoder,
1097};
1098
1109ca09 1099static const struct drm_connector_funcs radeon_vga_connector_funcs = {
771fe6b9
JG		 1100 .dpms = drm_helper_connector_dpms,
1101 .detect = radeon_vga_detect,
1102 .fill_modes = drm_helper_probe_single_connector_modes,
1103 .destroy = radeon_connector_destroy,
1104 .set_property = radeon_connector_set_property,
1105};
1106
4ce001ab
DA		 1107static int radeon_tv_get_modes(struct drm_connector *connector)
1108{
1109 struct drm_device *dev = connector->dev;
923f6848 1110 struct radeon_device *rdev = dev->dev_private;
4ce001ab 1111 struct drm_display_mode *tv_mode;
923f6848 1112 struct drm_encoder *encoder;
4ce001ab 1113
923f6848
AD		 1114 encoder = radeon_best_single_encoder(connector);
1115 if (!encoder)
1116 return 0;
4ce001ab 1117
923f6848
AD		 1118 /* avivo chips can scale any mode */
1119 if (rdev->family >= CHIP_RS600)
1120 /* add scaled modes */
1121 radeon_add_common_modes(encoder, connector);
1122 else {
1123 /* only 800x600 is supported right now on pre-avivo chips */
d50ba256 1124 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
923f6848
AD		 1125 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
1126 drm_mode_probed_add(connector, tv_mode);
1127 }
4ce001ab
DA		 1128 return 1;
1129}
1130
1131static int radeon_tv_mode_valid(struct drm_connector *connector,
1132 struct drm_display_mode *mode)
1133{
a3fa6320
AD		 1134 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
1135 return MODE_CLOCK_RANGE;
4ce001ab
DA		 1136 return MODE_OK;
1137}
1138
7b334fcb 1139static enum drm_connector_status
930a9e28 1140radeon_tv_detect(struct drm_connector *connector, bool force)
4ce001ab
DA		 1141{
1142 struct drm_encoder *encoder;
319d1e14 1143 const struct drm_encoder_helper_funcs *encoder_funcs;
445282db
DA		 1144 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1145 enum drm_connector_status ret = connector_status_disconnected;
10ebc0bc 1146 int r;
445282db
DA		 1147
1148 if (!radeon_connector->dac_load_detect)
1149 return ret;
4ce001ab 1150
10ebc0bc
DA		 1151 r = pm_runtime_get_sync(connector->dev->dev);
1152 if (r < 0)
1153 return connector_status_disconnected;
1154
4ce001ab
DA		 1155 encoder = radeon_best_single_encoder(connector);
1156 if (!encoder)
1157 ret = connector_status_disconnected;
1158 else {
1159 encoder_funcs = encoder->helper_private;
1160 ret = encoder_funcs->detect(encoder, connector);
1161 }
1162 if (ret == connector_status_connected)
1163 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
1164 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc
DA		 1165 pm_runtime_mark_last_busy(connector->dev->dev);
1166 pm_runtime_put_autosuspend(connector->dev->dev);
4ce001ab
DA		 1167 return ret;
1168}
1169
1109ca09 1170static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
4ce001ab
DA		 1171 .get_modes = radeon_tv_get_modes,
1172 .mode_valid = radeon_tv_mode_valid,
1173 .best_encoder = radeon_best_single_encoder,
1174};
1175
1109ca09 1176static const struct drm_connector_funcs radeon_tv_connector_funcs = {
4ce001ab
DA		 1177 .dpms = drm_helper_connector_dpms,
1178 .detect = radeon_tv_detect,
1179 .fill_modes = drm_helper_probe_single_connector_modes,
1180 .destroy = radeon_connector_destroy,
1181 .set_property = radeon_connector_set_property,
1182};
1183
11fe1266
TU		 1184static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
1185{
1186 struct drm_device *dev = connector->dev;
1187 struct radeon_device *rdev = dev->dev_private;
1188 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1189 enum drm_connector_status status;
1190
1191 /* We only trust HPD on R600 and newer ASICS. */
1192 if (rdev->family >= CHIP_R600
1193 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) {
1194 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
1195 status = connector_status_connected;
1196 else
1197 status = connector_status_disconnected;
1198 if (connector->status == status)
1199 return true;
1200 }
1201
1202 return false;
1203}
1204
4ce001ab
DA		 1205/*
1206 * DVI is complicated
1207 * Do a DDC probe, if DDC probe passes, get the full EDID so
1208 * we can do analog/digital monitor detection at this point.
1209 * If the monitor is an analog monitor or we got no DDC,
1210 * we need to find the DAC encoder object for this connector.
1211 * If we got no DDC, we do load detection on the DAC encoder object.
1212 * If we got analog DDC or load detection passes on the DAC encoder
1213 * we have to check if this analog encoder is shared with anyone else (TV)
1214 * if its shared we have to set the other connector to disconnected.
1215 */
7b334fcb 1216static enum drm_connector_status
930a9e28 1217radeon_dvi_detect(struct drm_connector *connector, bool force)
771fe6b9 1218{
fafcf94e
AD		 1219 struct drm_device *dev = connector->dev;
1220 struct radeon_device *rdev = dev->dev_private;
771fe6b9 1221 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
4ce001ab 1222 struct drm_encoder *encoder = NULL;
319d1e14 1223 const struct drm_encoder_helper_funcs *encoder_funcs;
10ebc0bc 1224 int i, r;
771fe6b9 1225 enum drm_connector_status ret = connector_status_disconnected;
fc87f13b 1226 bool dret = false, broken_edid = false;
771fe6b9 1227
10ebc0bc
DA		 1228 r = pm_runtime_get_sync(connector->dev->dev);
1229 if (r < 0)
1230 return connector_status_disconnected;
1231
1232 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1233 ret = connector->status;
1234 goto exit;
1235 }
11fe1266 1236
eb6b6d7c 1237 if (radeon_connector->ddc_bus)
0a9069d3 1238 dret = radeon_ddc_probe(radeon_connector, false);
4ce001ab 1239 if (dret) {
d0d0a225 1240 radeon_connector->detected_by_load = false;
72a5c970
AD		 1241 radeon_connector_free_edid(connector);
1242 radeon_connector_get_edid(connector);
4ce001ab
DA		 1243
1244 if (!radeon_connector->edid) {
f82f5f3a 1245 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
72082093 1246 connector->name);
4a9a8b71
DA		 1247 /* rs690 seems to have a problem with connectors not existing and always
1248 * return a block of 0's. If we see this just stop polling on this output */
72a5c970
AD		 1249 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) &&
1250 radeon_connector->base.null_edid_counter) {
4a9a8b71 1251 ret = connector_status_disconnected;
72082093
JN		 1252 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n",
1253 connector->name);
4a9a8b71 1254 radeon_connector->ddc_bus = NULL;
fc87f13b
EE		 1255 } else {
1256 ret = connector_status_connected;
1257 broken_edid = true; /* defer use_digital to later */
4a9a8b71 1258 }
4ce001ab 1259 } else {
72a5c970
AD		 1260 radeon_connector->use_digital =
1261 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
4ce001ab 1262
0294cf4f
AD		 1263 /* some oems have boards with separate digital and analog connectors
1264 * with a shared ddc line (often vga + hdmi)
1265 */
1266 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
72a5c970 1267 radeon_connector_free_edid(connector);
0294cf4f 1268 ret = connector_status_disconnected;
72a5c970 1269 } else {
0294cf4f 1270 ret = connector_status_connected;
72a5c970 1271 }
42f14c4b
AD		 1272 /* This gets complicated. We have boards with VGA + HDMI with a
1273 * shared DDC line and we have boards with DVI-D + HDMI with a shared
1274 * DDC line. The latter is more complex because with DVI<->HDMI adapters
1275 * you don't really know what's connected to which port as both are digital.
71407c46 1276 */
d3932d6c 1277 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
71407c46
AD		 1278 struct drm_connector *list_connector;
1279 struct radeon_connector *list_radeon_connector;
1280 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
1281 if (connector == list_connector)
1282 continue;
1283 list_radeon_connector = to_radeon_connector(list_connector);
b2ea4aa6
AD		 1284 if (list_radeon_connector->shared_ddc &&
1285 (list_radeon_connector->ddc_bus->rec.i2c_id ==
1286 radeon_connector->ddc_bus->rec.i2c_id)) {
42f14c4b
AD		 1287 /* cases where both connectors are digital */
1288 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1289 /* hpd is our only option in this case */
1290 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
72a5c970 1291 radeon_connector_free_edid(connector);
71407c46
AD		 1292 ret = connector_status_disconnected;
1293 }
1294 }
1295 }
1296 }
1297 }
4ce001ab
DA		 1298 }
1299 }
1300
1301 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
1302 goto out;
1303
5f0a2612
AD		 1304 /* DVI-D and HDMI-A are digital only */
1305 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1306 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1307 goto out;
1308
d0d0a225 1309 /* if we aren't forcing don't do destructive polling */
c3cceedd 1310 if (!force) {
d0d0a225
AD		 1311 /* only return the previous status if we last
1312 * detected a monitor via load.
1313 */
1314 if (radeon_connector->detected_by_load)
1315 ret = connector->status;
c3cceedd
DA		 1316 goto out;
1317 }
1318
4ce001ab 1319 /* find analog encoder */
445282db
DA		 1320 if (radeon_connector->dac_load_detect) {
1321 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1322 if (connector->encoder_ids[i] == 0)
1323 break;
771fe6b9 1324
b957f457
RC		 1325 encoder = drm_encoder_find(connector->dev,
1326 connector->encoder_ids[i]);
1327 if (!encoder)
445282db 1328 continue;
771fe6b9 1329
e3632507 1330 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
e00e8b5e
AD		 1331 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1332 continue;
1333
445282db
DA		 1334 encoder_funcs = encoder->helper_private;
1335 if (encoder_funcs->detect) {
fc87f13b
EE		 1336 if (!broken_edid) {
1337 if (ret != connector_status_connected) {
1338 /* deal with analog monitors without DDC */
1339 ret = encoder_funcs->detect(encoder, connector);
1340 if (ret == connector_status_connected) {
1341 radeon_connector->use_digital = false;
1342 }
1343 if (ret != connector_status_disconnected)
1344 radeon_connector->detected_by_load = true;
445282db 1345 }
fc87f13b
EE		 1346 } else {
1347 enum drm_connector_status lret;
1348 /* assume digital unless load detected otherwise */
1349 radeon_connector->use_digital = true;
1350 lret = encoder_funcs->detect(encoder, connector);
1351 DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
1352 if (lret == connector_status_connected)
1353 radeon_connector->use_digital = false;
771fe6b9 1354 }
445282db 1355 break;
771fe6b9
JG		 1356 }
1357 }
1358 }
1359
4ce001ab
DA		 1360 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
1361 encoder) {
1362 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1363 }
1364
fafcf94e
AD		 1365 /* RN50 and some RV100 asics in servers often have a hardcoded EDID in the
1366 * vbios to deal with KVMs. If we have one and are not able to detect a monitor
1367 * by other means, assume the DFP is connected and use that EDID. In most
1368 * cases the DVI port is actually a virtual KVM port connected to the service
1369 * processor.
1370 */
a09d431f 1371out:
fafcf94e
AD		 1372 if ((!rdev->is_atom_bios) &&
1373 (ret == connector_status_disconnected) &&
1374 rdev->mode_info.bios_hardcoded_edid_size) {
1375 radeon_connector->use_digital = true;
1376 ret = connector_status_connected;
1377 }
1378
771fe6b9
JG		 1379 /* updated in get modes as well since we need to know if it's analog or digital */
1380 radeon_connector_update_scratch_regs(connector, ret);
10ebc0bc 1381
2d1c18bb 1382 if (radeon_audio != 0)
1a626b68
SG		 1383 radeon_audio_detect(connector, ret);
1384
10ebc0bc
DA		 1385exit:
1386 pm_runtime_mark_last_busy(connector->dev->dev);
1387 pm_runtime_put_autosuspend(connector->dev->dev);
1388
771fe6b9
JG		 1389 return ret;
1390}
1391
1392/* okay need to be smart in here about which encoder to pick */
1109ca09 1393static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
771fe6b9
JG		 1394{
1395 int enc_id = connector->encoder_ids[0];
1396 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
771fe6b9
JG		 1397 struct drm_encoder *encoder;
1398 int i;
1399 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1400 if (connector->encoder_ids[i] == 0)
1401 break;
1402
b957f457
RC		 1403 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1404 if (!encoder)
771fe6b9
JG		 1405 continue;
1406
4ce001ab 1407 if (radeon_connector->use_digital == true) {
771fe6b9
JG		 1408 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1409 return encoder;
1410 } else {
1411 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1412 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1413 return encoder;
1414 }
1415 }
1416
1417 /* see if we have a default encoder TODO */
1418
1419 /* then check use digitial */
1420 /* pick the first one */
b957f457
RC		 1421 if (enc_id)
1422 return drm_encoder_find(connector->dev, enc_id);
771fe6b9
JG		 1423 return NULL;
1424}
1425
d50ba256
DA		 1426static void radeon_dvi_force(struct drm_connector *connector)
1427{
1428 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1429 if (connector->force == DRM_FORCE_ON)
1430 radeon_connector->use_digital = false;
1431 if (connector->force == DRM_FORCE_ON_DIGITAL)
1432 radeon_connector->use_digital = true;
1433}
1434
a3fa6320
AD		 1435static int radeon_dvi_mode_valid(struct drm_connector *connector,
1436 struct drm_display_mode *mode)
1437{
1b24203e
AD		 1438 struct drm_device *dev = connector->dev;
1439 struct radeon_device *rdev = dev->dev_private;
a3fa6320
AD		 1440 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1441
1442 /* XXX check mode bandwidth */
1443
1b24203e
AD		 1444 /* clocks over 135 MHz have heat issues with DVI on RV100 */
1445 if (radeon_connector->use_digital &&
1446 (rdev->family == CHIP_RV100) &&
1447 (mode->clock > 135000))
1448 return MODE_CLOCK_HIGH;
1449
a3fa6320
AD		 1450 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1451 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1452 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1453 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1454 return MODE_OK;
377bd8a9 1455 else if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
f2263fc7
AD		 1456 /* HDMI 1.3+ supports max clock of 340 Mhz */
1457 if (mode->clock > 340000)
e1e84017 1458 return MODE_CLOCK_HIGH;
f2263fc7
AD		 1459 else
1460 return MODE_OK;
1461 } else {
a3fa6320 1462 return MODE_CLOCK_HIGH;
f2263fc7 1463 }
a3fa6320 1464 }
b20f9bef
AD		 1465
1466 /* check against the max pixel clock */
1467 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1468 return MODE_CLOCK_HIGH;
1469
a3fa6320
AD		 1470 return MODE_OK;
1471}
1472
1109ca09 1473static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
3e22920f 1474 .get_modes = radeon_vga_get_modes,
a3fa6320 1475 .mode_valid = radeon_dvi_mode_valid,
771fe6b9
JG		 1476 .best_encoder = radeon_dvi_encoder,
1477};
1478
1109ca09 1479static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
771fe6b9
JG		 1480 .dpms = drm_helper_connector_dpms,
1481 .detect = radeon_dvi_detect,
1482 .fill_modes = drm_helper_probe_single_connector_modes,
1483 .set_property = radeon_connector_set_property,
1484 .destroy = radeon_connector_destroy,
d50ba256 1485 .force = radeon_dvi_force,
771fe6b9
JG		 1486};
1487
746c1aa4
DA		 1488static int radeon_dp_get_modes(struct drm_connector *connector)
1489{
1490 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
8b834852 1491 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1492 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
746c1aa4
DA		 1493 int ret;
1494
f89931f3
AD		 1495 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1496 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1497 struct drm_display_mode *mode;
1498
2b69ffb9
AD		 1499 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1500 if (!radeon_dig_connector->edp_on)
1501 atombios_set_edp_panel_power(connector,
1502 ATOM_TRANSMITTER_ACTION_POWER_ON);
72a5c970
AD		 1503 radeon_connector_get_edid(connector);
1504 ret = radeon_ddc_get_modes(connector);
2b69ffb9
AD		 1505 if (!radeon_dig_connector->edp_on)
1506 atombios_set_edp_panel_power(connector,
1507 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1508 } else {
1509 /* need to setup ddc on the bridge */
1510 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1511 ENCODER_OBJECT_ID_NONE) {
1512 if (encoder)
1513 radeon_atom_ext_encoder_setup_ddc(encoder);
1514 }
72a5c970
AD		 1515 radeon_connector_get_edid(connector);
1516 ret = radeon_ddc_get_modes(connector);
2b69ffb9 1517 }
d291767b
AD		 1518
1519 if (ret > 0) {
d291767b
AD		 1520 if (encoder) {
1521 radeon_fixup_lvds_native_mode(encoder, connector);
1522 /* add scaled modes */
1523 radeon_add_common_modes(encoder, connector);
1524 }
1525 return ret;
1526 }
1527
d291767b
AD		 1528 if (!encoder)
1529 return 0;
1530
1531 /* we have no EDID modes */
1532 mode = radeon_fp_native_mode(encoder);
1533 if (mode) {
1534 ret = 1;
1535 drm_mode_probed_add(connector, mode);
1536 /* add the width/height from vbios tables if available */
1537 connector->display_info.width_mm = mode->width_mm;
1538 connector->display_info.height_mm = mode->height_mm;
1539 /* add scaled modes */
1540 radeon_add_common_modes(encoder, connector);
1541 }
591a10e1
AD		 1542 } else {
1543 /* need to setup ddc on the bridge */
1d33e1fc
AD		 1544 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1545 ENCODER_OBJECT_ID_NONE) {
591a10e1
AD		 1546 if (encoder)
1547 radeon_atom_ext_encoder_setup_ddc(encoder);
1548 }
72a5c970
AD		 1549 radeon_connector_get_edid(connector);
1550 ret = radeon_ddc_get_modes(connector);
da997620
AD		 1551
1552 radeon_get_native_mode(connector);
591a10e1 1553 }
8b834852 1554
746c1aa4
DA		 1555 return ret;
1556}
1557
1d33e1fc 1558u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
d7fa8bb3 1559{
d7fa8bb3
AD		 1560 struct drm_encoder *encoder;
1561 struct radeon_encoder *radeon_encoder;
1562 int i;
d7fa8bb3
AD		 1563
1564 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1565 if (connector->encoder_ids[i] == 0)
1566 break;
1567
b957f457
RC		 1568 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1569 if (!encoder)
d7fa8bb3
AD		 1570 continue;
1571
d7fa8bb3
AD		 1572 radeon_encoder = to_radeon_encoder(encoder);
1573
1574 switch (radeon_encoder->encoder_id) {
1575 case ENCODER_OBJECT_ID_TRAVIS:
1576 case ENCODER_OBJECT_ID_NUTMEG:
1d33e1fc 1577 return radeon_encoder->encoder_id;
d7fa8bb3
AD		 1578 default:
1579 break;
1580 }
1581 }
1582
1d33e1fc 1583 return ENCODER_OBJECT_ID_NONE;
d7fa8bb3
AD		 1584}
1585
ebdea82d 1586static bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
d7fa8bb3 1587{
d7fa8bb3
AD		 1588 struct drm_encoder *encoder;
1589 struct radeon_encoder *radeon_encoder;
1590 int i;
1591 bool found = false;
1592
1593 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
1594 if (connector->encoder_ids[i] == 0)
1595 break;
1596
b957f457
RC		 1597 encoder = drm_encoder_find(connector->dev, connector->encoder_ids[i]);
1598 if (!encoder)
d7fa8bb3
AD		 1599 continue;
1600
d7fa8bb3
AD		 1601 radeon_encoder = to_radeon_encoder(encoder);
1602 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1603 found = true;
1604 }
1605
1606 return found;
1607}
1608
1609bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1610{
1611 struct drm_device *dev = connector->dev;
1612 struct radeon_device *rdev = dev->dev_private;
1613
1614 if (ASIC_IS_DCE5(rdev) &&
af5d3653 1615 (rdev->clock.default_dispclk >= 53900) &&
d7fa8bb3
AD		 1616 radeon_connector_encoder_is_hbr2(connector)) {
1617 return true;
1618 }
1619
1620 return false;
1621}
1622
7b334fcb 1623static enum drm_connector_status
930a9e28 1624radeon_dp_detect(struct drm_connector *connector, bool force)
746c1aa4 1625{
f8d0edde
AD		 1626 struct drm_device *dev = connector->dev;
1627 struct radeon_device *rdev = dev->dev_private;
746c1aa4 1628 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
746c1aa4 1629 enum drm_connector_status ret = connector_status_disconnected;
4143e919 1630 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
591a10e1 1631 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
10ebc0bc 1632 int r;
746c1aa4 1633
9843ead0
DA		 1634 if (radeon_dig_connector->is_mst)
1635 return connector_status_disconnected;
1636
10ebc0bc
DA		 1637 r = pm_runtime_get_sync(connector->dev->dev);
1638 if (r < 0)
1639 return connector_status_disconnected;
1640
1641 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1642 ret = connector->status;
1643 goto out;
1644 }
11fe1266 1645
72a5c970 1646 radeon_connector_free_edid(connector);
746c1aa4 1647
f89931f3
AD		 1648 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1649 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1650 if (encoder) {
1651 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1652 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1653
1654 /* check if panel is valid */
1655 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1656 ret = connector_status_connected;
13485794
AD		 1657 /* don't fetch the edid from the vbios if ddc fails and runpm is
1658 * enabled so we report disconnected.
1659 */
1660 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
1661 ret = connector_status_disconnected;
d291767b 1662 }
6f50eae7
AD		 1663 /* eDP is always DP */
1664 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
8b834852
AD		 1665 if (!radeon_dig_connector->edp_on)
1666 atombios_set_edp_panel_power(connector,
1667 ATOM_TRANSMITTER_ACTION_POWER_ON);
6f50eae7 1668 if (radeon_dp_getdpcd(radeon_connector))
9fa05c98 1669 ret = connector_status_connected;
8b834852
AD		 1670 if (!radeon_dig_connector->edp_on)
1671 atombios_set_edp_panel_power(connector,
1672 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1d33e1fc
AD		 1673 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1674 ENCODER_OBJECT_ID_NONE) {
b06947b5
AD		 1675 /* DP bridges are always DP */
1676 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1677 /* get the DPCD from the bridge */
1678 radeon_dp_getdpcd(radeon_connector);
1679
6777a4f6
AD		 1680 if (encoder) {
1681 /* setup ddc on the bridge */
1682 radeon_atom_ext_encoder_setup_ddc(encoder);
0a9069d3
NOS		 1683 /* bridge chips are always aux */
1684 if (radeon_ddc_probe(radeon_connector, true)) /* try DDC */
b06947b5 1685 ret = connector_status_connected;
6777a4f6 1686 else if (radeon_connector->dac_load_detect) { /* try load detection */
319d1e14 1687 const struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
b06947b5
AD		 1688 ret = encoder_funcs->detect(encoder, connector);
1689 }
591a10e1 1690 }
b06947b5 1691 } else {
6f50eae7 1692 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
f8d0edde
AD		 1693 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1694 ret = connector_status_connected;
9843ead0 1695 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
f8d0edde 1696 radeon_dp_getdpcd(radeon_connector);
9843ead0
DA		 1697 r = radeon_dp_mst_probe(radeon_connector);
1698 if (r == 1)
1699 ret = connector_status_disconnected;
1700 }
6f50eae7 1701 } else {
f8d0edde 1702 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
9843ead0
DA		 1703 if (radeon_dp_getdpcd(radeon_connector)) {
1704 r = radeon_dp_mst_probe(radeon_connector);
1705 if (r == 1)
1706 ret = connector_status_disconnected;
1707 else
1708 ret = connector_status_connected;
1709 }
f8d0edde 1710 } else {
d592fca9 1711 /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */
0a9069d3 1712 if (radeon_ddc_probe(radeon_connector, false))
f8d0edde
AD		 1713 ret = connector_status_connected;
1714 }
4143e919 1715 }
746c1aa4 1716 }
4143e919 1717
30f44372 1718 radeon_connector_update_scratch_regs(connector, ret);
1a626b68 1719
2d1c18bb 1720 if (radeon_audio != 0)
1a626b68
SG		 1721 radeon_audio_detect(connector, ret);
1722
10ebc0bc
DA		 1723out:
1724 pm_runtime_mark_last_busy(connector->dev->dev);
1725 pm_runtime_put_autosuspend(connector->dev->dev);
1726
746c1aa4
DA		 1727 return ret;
1728}
1729
5801ead6
AD		 1730static int radeon_dp_mode_valid(struct drm_connector *connector,
1731 struct drm_display_mode *mode)
1732{
6536a3a6
AD		 1733 struct drm_device *dev = connector->dev;
1734 struct radeon_device *rdev = dev->dev_private;
5801ead6
AD		 1735 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1736 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1737
1738 /* XXX check mode bandwidth */
1739
f89931f3
AD		 1740 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1741 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
d291767b
AD		 1742 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1743
1744 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1745 return MODE_PANEL;
1746
1747 if (encoder) {
1748 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1749 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1750
f89931f3 1751 /* AVIVO hardware supports downscaling modes larger than the panel
d291767b
AD		 1752 * to the panel size, but I'm not sure this is desirable.
1753 */
1754 if ((mode->hdisplay > native_mode->hdisplay) ||
1755 (mode->vdisplay > native_mode->vdisplay))
1756 return MODE_PANEL;
1757
1758 /* if scaling is disabled, block non-native modes */
1759 if (radeon_encoder->rmx_type == RMX_OFF) {
1760 if ((mode->hdisplay != native_mode->hdisplay) ||
1761 (mode->vdisplay != native_mode->vdisplay))
1762 return MODE_PANEL;
1763 }
1764 }
d291767b
AD		 1765 } else {
1766 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
6536a3a6 1767 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {
d291767b 1768 return radeon_dp_mode_valid_helper(connector, mode);
6536a3a6 1769 } else {
377bd8a9 1770 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
6536a3a6
AD		 1771 /* HDMI 1.3+ supports max clock of 340 Mhz */
1772 if (mode->clock > 340000)
1773 return MODE_CLOCK_HIGH;
1774 } else {
1775 if (mode->clock > 165000)
1776 return MODE_CLOCK_HIGH;
1777 }
1778 }
d291767b 1779 }
6536a3a6
AD		 1780
1781 return MODE_OK;
5801ead6
AD		 1782}
1783
1109ca09 1784static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
746c1aa4 1785 .get_modes = radeon_dp_get_modes,
5801ead6 1786 .mode_valid = radeon_dp_mode_valid,
746c1aa4
DA		 1787 .best_encoder = radeon_dvi_encoder,
1788};
1789
1109ca09 1790static const struct drm_connector_funcs radeon_dp_connector_funcs = {
746c1aa4
DA		 1791 .dpms = drm_helper_connector_dpms,
1792 .detect = radeon_dp_detect,
1793 .fill_modes = drm_helper_probe_single_connector_modes,
1794 .set_property = radeon_connector_set_property,
379dfc25 1795 .destroy = radeon_connector_destroy,
746c1aa4
DA		 1796 .force = radeon_dvi_force,
1797};
1798
855f5f1d
AD		 1799static const struct drm_connector_funcs radeon_edp_connector_funcs = {
1800 .dpms = drm_helper_connector_dpms,
1801 .detect = radeon_dp_detect,
1802 .fill_modes = drm_helper_probe_single_connector_modes,
1803 .set_property = radeon_lvds_set_property,
379dfc25 1804 .destroy = radeon_connector_destroy,
855f5f1d
AD		 1805 .force = radeon_dvi_force,
1806};
1807
1808static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
1809 .dpms = drm_helper_connector_dpms,
1810 .detect = radeon_dp_detect,
1811 .fill_modes = drm_helper_probe_single_connector_modes,
1812 .set_property = radeon_lvds_set_property,
379dfc25 1813 .destroy = radeon_connector_destroy,
855f5f1d
AD		 1814 .force = radeon_dvi_force,
1815};
1816
771fe6b9
JG		 1817void
1818radeon_add_atom_connector(struct drm_device *dev,
1819 uint32_t connector_id,
1820 uint32_t supported_device,
1821 int connector_type,
1822 struct radeon_i2c_bus_rec *i2c_bus,
b75fad06 1823 uint32_t igp_lane_info,
eed45b30 1824 uint16_t connector_object_id,
26b5bc98
AD		 1825 struct radeon_hpd *hpd,
1826 struct radeon_router *router)
771fe6b9 1827{
445282db 1828 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 1829 struct drm_connector *connector;
1830 struct radeon_connector *radeon_connector;
1831 struct radeon_connector_atom_dig *radeon_dig_connector;
eac4dff6
AD		 1832 struct drm_encoder *encoder;
1833 struct radeon_encoder *radeon_encoder;
771fe6b9 1834 uint32_t subpixel_order = SubPixelNone;
0294cf4f 1835 bool shared_ddc = false;
eac4dff6 1836 bool is_dp_bridge = false;
496263bf 1837 bool has_aux = false;
771fe6b9 1838
4ce001ab 1839 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 1840 return;
1841
cf4c12f9
AD		 1842 /* if the user selected tv=0 don't try and add the connector */
1843 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1844 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1845 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1846 (radeon_tv == 0))
1847 return;
1848
771fe6b9
JG		 1849 /* see if we already added it */
1850 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1851 radeon_connector = to_radeon_connector(connector);
1852 if (radeon_connector->connector_id == connector_id) {
1853 radeon_connector->devices |= supported_device;
1854 return;
1855 }
0294cf4f 1856 if (radeon_connector->ddc_bus && i2c_bus->valid) {
d3932d6c 1857 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
0294cf4f
AD		 1858 radeon_connector->shared_ddc = true;
1859 shared_ddc = true;
1860 }
fb939dfc 1861 if (radeon_connector->router_bus && router->ddc_valid &&
26b5bc98
AD		 1862 (radeon_connector->router.router_id == router->router_id)) {
1863 radeon_connector->shared_ddc = false;
1864 shared_ddc = false;
1865 }
0294cf4f 1866 }
771fe6b9
JG		 1867 }
1868
eac4dff6
AD		 1869 /* check if it's a dp bridge */
1870 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1871 radeon_encoder = to_radeon_encoder(encoder);
1872 if (radeon_encoder->devices & supported_device) {
1873 switch (radeon_encoder->encoder_id) {
1874 case ENCODER_OBJECT_ID_TRAVIS:
1875 case ENCODER_OBJECT_ID_NUTMEG:
1876 is_dp_bridge = true;
1877 break;
1878 default:
1879 break;
1880 }
1881 }
1882 }
1883
771fe6b9
JG		 1884 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1885 if (!radeon_connector)
1886 return;
1887
1888 connector = &radeon_connector->base;
1889
1890 radeon_connector->connector_id = connector_id;
1891 radeon_connector->devices = supported_device;
0294cf4f 1892 radeon_connector->shared_ddc = shared_ddc;
b75fad06 1893 radeon_connector->connector_object_id = connector_object_id;
eed45b30 1894 radeon_connector->hpd = *hpd;
bc1c4dc3 1895
26b5bc98 1896 radeon_connector->router = *router;
fb939dfc 1897 if (router->ddc_valid || router->cd_valid) {
26b5bc98
AD		 1898 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1899 if (!radeon_connector->router_bus)
a70882aa 1900 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
26b5bc98 1901 }
eac4dff6
AD		 1902
1903 if (is_dp_bridge) {
771fe6b9
JG		 1904 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1905 if (!radeon_dig_connector)
1906 goto failed;
771fe6b9
JG		 1907 radeon_dig_connector->igp_lane_info = igp_lane_info;
1908 radeon_connector->con_priv = radeon_dig_connector;
771fe6b9 1909 if (i2c_bus->valid) {
379dfc25
AD		 1910 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1911 if (radeon_connector->ddc_bus)
496263bf
AD		 1912 has_aux = true;
1913 else
eac4dff6 1914 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 1915 }
eac4dff6
AD		 1916 switch (connector_type) {
1917 case DRM_MODE_CONNECTOR_VGA:
1918 case DRM_MODE_CONNECTOR_DVIA:
1919 default:
855f5f1d
AD		 1920 drm_connector_init(dev, &radeon_connector->base,
1921 &radeon_dp_connector_funcs, connector_type);
1922 drm_connector_helper_add(&radeon_connector->base,
1923 &radeon_dp_connector_helper_funcs);
eac4dff6
AD		 1924 connector->interlace_allowed = true;
1925 connector->doublescan_allowed = true;
d629a3ce 1926 radeon_connector->dac_load_detect = true;
e35755fa 1927 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 1928 rdev->mode_info.load_detect_property,
1929 1);
da997620
AD		 1930 drm_object_attach_property(&radeon_connector->base.base,
1931 dev->mode_config.scaling_mode_property,
1932 DRM_MODE_SCALE_NONE);
643b1f56
AD		 1933 if (ASIC_IS_DCE5(rdev))
1934 drm_object_attach_property(&radeon_connector->base.base,
1935 rdev->mode_info.output_csc_property,
1936 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 1937 break;
1938 case DRM_MODE_CONNECTOR_DVII:
1939 case DRM_MODE_CONNECTOR_DVID:
1940 case DRM_MODE_CONNECTOR_HDMIA:
1941 case DRM_MODE_CONNECTOR_HDMIB:
1942 case DRM_MODE_CONNECTOR_DisplayPort:
855f5f1d
AD		 1943 drm_connector_init(dev, &radeon_connector->base,
1944 &radeon_dp_connector_funcs, connector_type);
1945 drm_connector_helper_add(&radeon_connector->base,
1946 &radeon_dp_connector_helper_funcs);
e35755fa 1947 drm_object_attach_property(&radeon_connector->base.base,
430f70d5 1948 rdev->mode_info.underscan_property,
56bec7c0 1949 UNDERSCAN_OFF);
e35755fa 1950 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1951 rdev->mode_info.underscan_hborder_property,
1952 0);
e35755fa 1953 drm_object_attach_property(&radeon_connector->base.base,
5bccf5e3
MG		 1954 rdev->mode_info.underscan_vborder_property,
1955 0);
91915260 1956
da997620
AD		 1957 drm_object_attach_property(&radeon_connector->base.base,
1958 dev->mode_config.scaling_mode_property,
1959 DRM_MODE_SCALE_NONE);
1960
6214bb74
AD		 1961 drm_object_attach_property(&radeon_connector->base.base,
1962 rdev->mode_info.dither_property,
1963 RADEON_FMT_DITHER_DISABLE);
91915260 1964
108dc8e8
AD		 1965 if (radeon_audio != 0)
1966 drm_object_attach_property(&radeon_connector->base.base,
1967 rdev->mode_info.audio_property,
e31fadd3 1968 RADEON_AUDIO_AUTO);
643b1f56
AD		 1969 if (ASIC_IS_DCE5(rdev))
1970 drm_object_attach_property(&radeon_connector->base.base,
1971 rdev->mode_info.output_csc_property,
1972 RADEON_OUTPUT_CSC_BYPASS);
91915260 1973
eac4dff6
AD		 1974 subpixel_order = SubPixelHorizontalRGB;
1975 connector->interlace_allowed = true;
1976 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
1977 connector->doublescan_allowed = true;
1978 else
1979 connector->doublescan_allowed = false;
d629a3ce
AD		 1980 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
1981 radeon_connector->dac_load_detect = true;
e35755fa 1982 drm_object_attach_property(&radeon_connector->base.base,
d629a3ce
AD		 1983 rdev->mode_info.load_detect_property,
1984 1);
1985 }
eac4dff6
AD		 1986 break;
1987 case DRM_MODE_CONNECTOR_LVDS:
1988 case DRM_MODE_CONNECTOR_eDP:
855f5f1d
AD		 1989 drm_connector_init(dev, &radeon_connector->base,
1990 &radeon_lvds_bridge_connector_funcs, connector_type);
1991 drm_connector_helper_add(&radeon_connector->base,
1992 &radeon_dp_connector_helper_funcs);
e35755fa 1993 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 1994 dev->mode_config.scaling_mode_property,
1995 DRM_MODE_SCALE_FULLSCREEN);
1996 subpixel_order = SubPixelHorizontalRGB;
1997 connector->interlace_allowed = false;
1998 connector->doublescan_allowed = false;
1999 break;
5bccf5e3 2000 }
eac4dff6
AD		 2001 } else {
2002 switch (connector_type) {
2003 case DRM_MODE_CONNECTOR_VGA:
2004 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
2005 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
2006 if (i2c_bus->valid) {
2007 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2008 if (!radeon_connector->ddc_bus)
2009 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2010 }
390d0bbe 2011 radeon_connector->dac_load_detect = true;
e35755fa 2012 drm_object_attach_property(&radeon_connector->base.base,
390d0bbe
AD		 2013 rdev->mode_info.load_detect_property,
2014 1);
da997620
AD		 2015 if (ASIC_IS_AVIVO(rdev))
2016 drm_object_attach_property(&radeon_connector->base.base,
2017 dev->mode_config.scaling_mode_property,
2018 DRM_MODE_SCALE_NONE);
643b1f56
AD		 2019 if (ASIC_IS_DCE5(rdev))
2020 drm_object_attach_property(&radeon_connector->base.base,
2021 rdev->mode_info.output_csc_property,
2022 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2023 /* no HPD on analog connectors */
2024 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2025 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2026 connector->interlace_allowed = true;
c49948f4 2027 connector->doublescan_allowed = true;
eac4dff6
AD		 2028 break;
2029 case DRM_MODE_CONNECTOR_DVIA:
2030 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
2031 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
2032 if (i2c_bus->valid) {
2033 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2034 if (!radeon_connector->ddc_bus)
2035 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2036 }
2037 radeon_connector->dac_load_detect = true;
e35755fa 2038 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2039 rdev->mode_info.load_detect_property,
2040 1);
da997620
AD		 2041 if (ASIC_IS_AVIVO(rdev))
2042 drm_object_attach_property(&radeon_connector->base.base,
2043 dev->mode_config.scaling_mode_property,
2044 DRM_MODE_SCALE_NONE);
643b1f56
AD		 2045 if (ASIC_IS_DCE5(rdev))
2046 drm_object_attach_property(&radeon_connector->base.base,
2047 rdev->mode_info.output_csc_property,
2048 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2049 /* no HPD on analog connectors */
2050 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2051 connector->interlace_allowed = true;
2052 connector->doublescan_allowed = true;
2053 break;
2054 case DRM_MODE_CONNECTOR_DVII:
2055 case DRM_MODE_CONNECTOR_DVID:
2056 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2057 if (!radeon_dig_connector)
2058 goto failed;
2059 radeon_dig_connector->igp_lane_info = igp_lane_info;
2060 radeon_connector->con_priv = radeon_dig_connector;
2061 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
2062 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2063 if (i2c_bus->valid) {
2064 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2065 if (!radeon_connector->ddc_bus)
2066 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2067 }
2068 subpixel_order = SubPixelHorizontalRGB;
e35755fa 2069 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2070 rdev->mode_info.coherent_mode_property,
2071 1);
2072 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2073 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2074 rdev->mode_info.underscan_property,
2075 UNDERSCAN_OFF);
e35755fa 2076 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2077 rdev->mode_info.underscan_hborder_property,
2078 0);
e35755fa 2079 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2080 rdev->mode_info.underscan_vborder_property,
2081 0);
da997620
AD		 2082 drm_object_attach_property(&radeon_connector->base.base,
2083 rdev->mode_info.dither_property,
2084 RADEON_FMT_DITHER_DISABLE);
2085 drm_object_attach_property(&radeon_connector->base.base,
2086 dev->mode_config.scaling_mode_property,
2087 DRM_MODE_SCALE_NONE);
eac4dff6 2088 }
108dc8e8 2089 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2090 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2091 rdev->mode_info.audio_property,
e31fadd3 2092 RADEON_AUDIO_AUTO);
8666c076 2093 }
eac4dff6
AD		 2094 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
2095 radeon_connector->dac_load_detect = true;
e35755fa 2096 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2097 rdev->mode_info.load_detect_property,
2098 1);
2099 }
643b1f56
AD		 2100 if (ASIC_IS_DCE5(rdev))
2101 drm_object_attach_property(&radeon_connector->base.base,
2102 rdev->mode_info.output_csc_property,
2103 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2104 connector->interlace_allowed = true;
2105 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2106 connector->doublescan_allowed = true;
2107 else
2108 connector->doublescan_allowed = false;
2109 break;
2110 case DRM_MODE_CONNECTOR_HDMIA:
2111 case DRM_MODE_CONNECTOR_HDMIB:
2112 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2113 if (!radeon_dig_connector)
2114 goto failed;
2115 radeon_dig_connector->igp_lane_info = igp_lane_info;
2116 radeon_connector->con_priv = radeon_dig_connector;
2117 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
2118 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2119 if (i2c_bus->valid) {
2120 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2121 if (!radeon_connector->ddc_bus)
2122 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2123 }
e35755fa 2124 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2125 rdev->mode_info.coherent_mode_property,
2126 1);
2127 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2128 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2129 rdev->mode_info.underscan_property,
2130 UNDERSCAN_OFF);
e35755fa 2131 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2132 rdev->mode_info.underscan_hborder_property,
2133 0);
e35755fa 2134 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2135 rdev->mode_info.underscan_vborder_property,
2136 0);
da997620
AD		 2137 drm_object_attach_property(&radeon_connector->base.base,
2138 rdev->mode_info.dither_property,
2139 RADEON_FMT_DITHER_DISABLE);
2140 drm_object_attach_property(&radeon_connector->base.base,
2141 dev->mode_config.scaling_mode_property,
2142 DRM_MODE_SCALE_NONE);
eac4dff6 2143 }
108dc8e8 2144 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2145 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2146 rdev->mode_info.audio_property,
e31fadd3 2147 RADEON_AUDIO_AUTO);
8666c076 2148 }
643b1f56
AD		 2149 if (ASIC_IS_DCE5(rdev))
2150 drm_object_attach_property(&radeon_connector->base.base,
2151 rdev->mode_info.output_csc_property,
2152 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2153 subpixel_order = SubPixelHorizontalRGB;
2154 connector->interlace_allowed = true;
2155 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
2156 connector->doublescan_allowed = true;
2157 else
2158 connector->doublescan_allowed = false;
2159 break;
2160 case DRM_MODE_CONNECTOR_DisplayPort:
2161 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2162 if (!radeon_dig_connector)
2163 goto failed;
2164 radeon_dig_connector->igp_lane_info = igp_lane_info;
2165 radeon_connector->con_priv = radeon_dig_connector;
2166 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
2167 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2168 if (i2c_bus->valid) {
eac4dff6 2169 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
496263bf
AD		 2170 if (radeon_connector->ddc_bus)
2171 has_aux = true;
2172 else
eac4dff6
AD		 2173 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2174 }
2175 subpixel_order = SubPixelHorizontalRGB;
e35755fa 2176 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2177 rdev->mode_info.coherent_mode_property,
2178 1);
2179 if (ASIC_IS_AVIVO(rdev)) {
e35755fa 2180 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2181 rdev->mode_info.underscan_property,
2182 UNDERSCAN_OFF);
e35755fa 2183 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2184 rdev->mode_info.underscan_hborder_property,
2185 0);
e35755fa 2186 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2187 rdev->mode_info.underscan_vborder_property,
2188 0);
da997620
AD		 2189 drm_object_attach_property(&radeon_connector->base.base,
2190 rdev->mode_info.dither_property,
2191 RADEON_FMT_DITHER_DISABLE);
2192 drm_object_attach_property(&radeon_connector->base.base,
2193 dev->mode_config.scaling_mode_property,
2194 DRM_MODE_SCALE_NONE);
eac4dff6 2195 }
108dc8e8 2196 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
8666c076 2197 drm_object_attach_property(&radeon_connector->base.base,
108dc8e8 2198 rdev->mode_info.audio_property,
e31fadd3 2199 RADEON_AUDIO_AUTO);
8666c076 2200 }
643b1f56
AD		 2201 if (ASIC_IS_DCE5(rdev))
2202 drm_object_attach_property(&radeon_connector->base.base,
2203 rdev->mode_info.output_csc_property,
2204 RADEON_OUTPUT_CSC_BYPASS);
eac4dff6
AD		 2205 connector->interlace_allowed = true;
2206 /* in theory with a DP to VGA converter... */
c49948f4 2207 connector->doublescan_allowed = false;
eac4dff6
AD		 2208 break;
2209 case DRM_MODE_CONNECTOR_eDP:
2210 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2211 if (!radeon_dig_connector)
2212 goto failed;
2213 radeon_dig_connector->igp_lane_info = igp_lane_info;
2214 radeon_connector->con_priv = radeon_dig_connector;
855f5f1d 2215 drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
eac4dff6
AD		 2216 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2217 if (i2c_bus->valid) {
379dfc25
AD		 2218 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2219 if (radeon_connector->ddc_bus)
496263bf
AD		 2220 has_aux = true;
2221 else
eac4dff6
AD		 2222 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2223 }
e35755fa 2224 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2225 dev->mode_config.scaling_mode_property,
2226 DRM_MODE_SCALE_FULLSCREEN);
2227 subpixel_order = SubPixelHorizontalRGB;
2228 connector->interlace_allowed = false;
2229 connector->doublescan_allowed = false;
2230 break;
2231 case DRM_MODE_CONNECTOR_SVIDEO:
2232 case DRM_MODE_CONNECTOR_Composite:
2233 case DRM_MODE_CONNECTOR_9PinDIN:
2234 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2235 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2236 radeon_connector->dac_load_detect = true;
e35755fa 2237 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2238 rdev->mode_info.load_detect_property,
2239 1);
e35755fa 2240 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2241 rdev->mode_info.tv_std_property,
2242 radeon_atombios_get_tv_info(rdev));
2243 /* no HPD on analog connectors */
2244 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2245 connector->interlace_allowed = false;
2246 connector->doublescan_allowed = false;
2247 break;
2248 case DRM_MODE_CONNECTOR_LVDS:
2249 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2250 if (!radeon_dig_connector)
2251 goto failed;
2252 radeon_dig_connector->igp_lane_info = igp_lane_info;
2253 radeon_connector->con_priv = radeon_dig_connector;
2254 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
2255 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
2256 if (i2c_bus->valid) {
2257 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2258 if (!radeon_connector->ddc_bus)
2259 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2260 }
e35755fa 2261 drm_object_attach_property(&radeon_connector->base.base,
eac4dff6
AD		 2262 dev->mode_config.scaling_mode_property,
2263 DRM_MODE_SCALE_FULLSCREEN);
2264 subpixel_order = SubPixelHorizontalRGB;
2265 connector->interlace_allowed = false;
2266 connector->doublescan_allowed = false;
2267 break;
771fe6b9 2268 }
771fe6b9
JG		 2269 }
2270
2581afcc 2271 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 2272 if (i2c_bus->valid)
2273 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2274 } else
2275 connector->polled = DRM_CONNECTOR_POLL_HPD;
2276
771fe6b9 2277 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2278 drm_connector_register(connector);
496263bf
AD		 2279
2280 if (has_aux)
2281 radeon_dp_aux_init(radeon_connector);
2282
771fe6b9
JG		 2283 return;
2284
2285failed:
771fe6b9
JG		 2286 drm_connector_cleanup(connector);
2287 kfree(connector);
2288}
2289
2290void
2291radeon_add_legacy_connector(struct drm_device *dev,
2292 uint32_t connector_id,
2293 uint32_t supported_device,
2294 int connector_type,
b75fad06 2295 struct radeon_i2c_bus_rec *i2c_bus,
eed45b30
AD		 2296 uint16_t connector_object_id,
2297 struct radeon_hpd *hpd)
771fe6b9 2298{
445282db 2299 struct radeon_device *rdev = dev->dev_private;
771fe6b9
JG		 2300 struct drm_connector *connector;
2301 struct radeon_connector *radeon_connector;
2302 uint32_t subpixel_order = SubPixelNone;
2303
4ce001ab 2304 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
771fe6b9
JG		 2305 return;
2306
cf4c12f9
AD		 2307 /* if the user selected tv=0 don't try and add the connector */
2308 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
2309 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
2310 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
2311 (radeon_tv == 0))
2312 return;
2313
771fe6b9
JG		 2314 /* see if we already added it */
2315 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2316 radeon_connector = to_radeon_connector(connector);
2317 if (radeon_connector->connector_id == connector_id) {
2318 radeon_connector->devices |= supported_device;
2319 return;
2320 }
2321 }
2322
2323 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
2324 if (!radeon_connector)
2325 return;
2326
2327 connector = &radeon_connector->base;
2328
2329 radeon_connector->connector_id = connector_id;
2330 radeon_connector->devices = supported_device;
b75fad06 2331 radeon_connector->connector_object_id = connector_object_id;
eed45b30 2332 radeon_connector->hpd = *hpd;
bc1c4dc3 2333
771fe6b9
JG		 2334 switch (connector_type) {
2335 case DRM_MODE_CONNECTOR_VGA:
2336 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2337 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2338 if (i2c_bus->valid) {
f376b94f 2339 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2340 if (!radeon_connector->ddc_bus)
a70882aa 2341 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2342 }
35e4b7af 2343 radeon_connector->dac_load_detect = true;
e35755fa 2344 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2345 rdev->mode_info.load_detect_property,
2346 1);
2581afcc
AD		 2347 /* no HPD on analog connectors */
2348 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
eb1f8e4f 2349 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
c49948f4
AD		 2350 connector->interlace_allowed = true;
2351 connector->doublescan_allowed = true;
771fe6b9
JG		 2352 break;
2353 case DRM_MODE_CONNECTOR_DVIA:
2354 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
0b4c0f3f 2355 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
771fe6b9 2356 if (i2c_bus->valid) {
f376b94f 2357 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2358 if (!radeon_connector->ddc_bus)
a70882aa 2359 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2360 }
35e4b7af 2361 radeon_connector->dac_load_detect = true;
e35755fa 2362 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2363 rdev->mode_info.load_detect_property,
2364 1);
2581afcc
AD		 2365 /* no HPD on analog connectors */
2366 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2367 connector->interlace_allowed = true;
2368 connector->doublescan_allowed = true;
771fe6b9
JG		 2369 break;
2370 case DRM_MODE_CONNECTOR_DVII:
2371 case DRM_MODE_CONNECTOR_DVID:
2372 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
0b4c0f3f 2373 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
771fe6b9 2374 if (i2c_bus->valid) {
f376b94f 2375 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2376 if (!radeon_connector->ddc_bus)
a70882aa 2377 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
68b3adb4
AD		 2378 }
2379 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
35e4b7af 2380 radeon_connector->dac_load_detect = true;
e35755fa 2381 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2382 rdev->mode_info.load_detect_property,
2383 1);
771fe6b9
JG		 2384 }
2385 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2386 connector->interlace_allowed = true;
2387 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2388 connector->doublescan_allowed = true;
2389 else
2390 connector->doublescan_allowed = false;
771fe6b9
JG		 2391 break;
2392 case DRM_MODE_CONNECTOR_SVIDEO:
2393 case DRM_MODE_CONNECTOR_Composite:
2394 case DRM_MODE_CONNECTOR_9PinDIN:
cf4c12f9
AD		 2395 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2396 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2397 radeon_connector->dac_load_detect = true;
2398 /* RS400,RC410,RS480 chipset seems to report a lot
2399 * of false positive on load detect, we haven't yet
2400 * found a way to make load detect reliable on those
2401 * chipset, thus just disable it for TV.
2402 */
2403 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
2404 radeon_connector->dac_load_detect = false;
e35755fa 2405 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2406 rdev->mode_info.load_detect_property,
2407 radeon_connector->dac_load_detect);
e35755fa 2408 drm_object_attach_property(&radeon_connector->base.base,
cf4c12f9
AD		 2409 rdev->mode_info.tv_std_property,
2410 radeon_combios_get_tv_info(rdev));
2411 /* no HPD on analog connectors */
2412 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
c49948f4
AD		 2413 connector->interlace_allowed = false;
2414 connector->doublescan_allowed = false;
771fe6b9
JG		 2415 break;
2416 case DRM_MODE_CONNECTOR_LVDS:
2417 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
0b4c0f3f 2418 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
771fe6b9 2419 if (i2c_bus->valid) {
f376b94f 2420 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
771fe6b9 2421 if (!radeon_connector->ddc_bus)
a70882aa 2422 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
771fe6b9 2423 }
e35755fa 2424 drm_object_attach_property(&radeon_connector->base.base,
445282db
DA		 2425 dev->mode_config.scaling_mode_property,
2426 DRM_MODE_SCALE_FULLSCREEN);
771fe6b9 2427 subpixel_order = SubPixelHorizontalRGB;
c49948f4
AD		 2428 connector->interlace_allowed = false;
2429 connector->doublescan_allowed = false;
771fe6b9
JG		 2430 break;
2431 }
2432
2581afcc 2433 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
eb1f8e4f
DA		 2434 if (i2c_bus->valid)
2435 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2436 } else
2437 connector->polled = DRM_CONNECTOR_POLL_HPD;
771fe6b9 2438 connector->display_info.subpixel_order = subpixel_order;
34ea3d38 2439 drm_connector_register(connector);
771fe6b9 2440}
9843ead0
DA		 2441
2442void radeon_setup_mst_connector(struct drm_device *dev)
2443{
2444 struct radeon_device *rdev = dev->dev_private;
2445 struct drm_connector *connector;
2446 struct radeon_connector *radeon_connector;
2447
2448 if (!ASIC_IS_DCE5(rdev))
2449 return;
2450
2451 if (radeon_mst == 0)
2452 return;
2453
2454 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2455 int ret;
2456
2457 radeon_connector = to_radeon_connector(connector);
2458
2459 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
2460 continue;
2461
2462 ret = radeon_dp_mst_init(radeon_connector);
2463 }
2464}
Linux 6.x block layer and io_uring tree(s)