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1 | /* |
2 | * Copyright 2008 Advanced Micro Devices, Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Author: Stanislaw Skowronek | |
23 | */ | |
24 | ||
25 | #ifndef ATOM_NAMES_H | |
26 | #define ATOM_NAMES_H | |
27 | ||
28 | #include "atom.h" | |
29 | ||
30 | #ifdef ATOM_DEBUG | |
31 | ||
32 | #define ATOM_OP_NAMES_CNT 123 | |
33 | static char *atom_op_names[ATOM_OP_NAMES_CNT] = { | |
34 | "RESERVED", "MOVE_REG", "MOVE_PS", "MOVE_WS", "MOVE_FB", "MOVE_PLL", | |
35 | "MOVE_MC", "AND_REG", "AND_PS", "AND_WS", "AND_FB", "AND_PLL", "AND_MC", | |
36 | "OR_REG", "OR_PS", "OR_WS", "OR_FB", "OR_PLL", "OR_MC", "SHIFT_LEFT_REG", | |
37 | "SHIFT_LEFT_PS", "SHIFT_LEFT_WS", "SHIFT_LEFT_FB", "SHIFT_LEFT_PLL", | |
38 | "SHIFT_LEFT_MC", "SHIFT_RIGHT_REG", "SHIFT_RIGHT_PS", "SHIFT_RIGHT_WS", | |
39 | "SHIFT_RIGHT_FB", "SHIFT_RIGHT_PLL", "SHIFT_RIGHT_MC", "MUL_REG", | |
40 | "MUL_PS", "MUL_WS", "MUL_FB", "MUL_PLL", "MUL_MC", "DIV_REG", "DIV_PS", | |
41 | "DIV_WS", "DIV_FB", "DIV_PLL", "DIV_MC", "ADD_REG", "ADD_PS", "ADD_WS", | |
42 | "ADD_FB", "ADD_PLL", "ADD_MC", "SUB_REG", "SUB_PS", "SUB_WS", "SUB_FB", | |
43 | "SUB_PLL", "SUB_MC", "SET_ATI_PORT", "SET_PCI_PORT", "SET_SYS_IO_PORT", | |
44 | "SET_REG_BLOCK", "SET_FB_BASE", "COMPARE_REG", "COMPARE_PS", | |
45 | "COMPARE_WS", "COMPARE_FB", "COMPARE_PLL", "COMPARE_MC", "SWITCH", | |
46 | "JUMP", "JUMP_EQUAL", "JUMP_BELOW", "JUMP_ABOVE", "JUMP_BELOW_OR_EQUAL", | |
47 | "JUMP_ABOVE_OR_EQUAL", "JUMP_NOT_EQUAL", "TEST_REG", "TEST_PS", "TEST_WS", | |
48 | "TEST_FB", "TEST_PLL", "TEST_MC", "DELAY_MILLISEC", "DELAY_MICROSEC", | |
49 | "CALL_TABLE", "REPEAT", "CLEAR_REG", "CLEAR_PS", "CLEAR_WS", "CLEAR_FB", | |
50 | "CLEAR_PLL", "CLEAR_MC", "NOP", "EOT", "MASK_REG", "MASK_PS", "MASK_WS", | |
51 | "MASK_FB", "MASK_PLL", "MASK_MC", "POST_CARD", "BEEP", "SAVE_REG", | |
52 | "RESTORE_REG", "SET_DATA_BLOCK", "XOR_REG", "XOR_PS", "XOR_WS", "XOR_FB", | |
53 | "XOR_PLL", "XOR_MC", "SHL_REG", "SHL_PS", "SHL_WS", "SHL_FB", "SHL_PLL", | |
54 | "SHL_MC", "SHR_REG", "SHR_PS", "SHR_WS", "SHR_FB", "SHR_PLL", "SHR_MC", | |
55 | "DEBUG", "CTB_DS", | |
56 | }; | |
57 | ||
58 | #define ATOM_TABLE_NAMES_CNT 74 | |
59 | static char *atom_table_names[ATOM_TABLE_NAMES_CNT] = { | |
60 | "ASIC_Init", "GetDisplaySurfaceSize", "ASIC_RegistersInit", | |
61 | "VRAM_BlockVenderDetection", "SetClocksRatio", "MemoryControllerInit", | |
62 | "GPIO_PinInit", "MemoryParamAdjust", "DVOEncoderControl", | |
63 | "GPIOPinControl", "SetEngineClock", "SetMemoryClock", "SetPixelClock", | |
64 | "DynamicClockGating", "ResetMemoryDLL", "ResetMemoryDevice", | |
65 | "MemoryPLLInit", "EnableMemorySelfRefresh", "AdjustMemoryController", | |
66 | "EnableASIC_StaticPwrMgt", "ASIC_StaticPwrMgtStatusChange", | |
67 | "DAC_LoadDetection", "TMDS2EncoderControl", "LCD1OutputControl", | |
68 | "DAC1EncoderControl", "DAC2EncoderControl", "DVOOutputControl", | |
69 | "CV1OutputControl", "SetCRTC_DPM_State", "TVEncoderControl", | |
70 | "TMDS1EncoderControl", "LVDSEncoderControl", "TV1OutputControl", | |
71 | "EnableScaler", "BlankCRTC", "EnableCRTC", "GetPixelClock", | |
72 | "EnableVGA_Render", "EnableVGA_Access", "SetCRTC_Timing", | |
73 | "SetCRTC_OverScan", "SetCRTC_Replication", "SelectCRTC_Source", | |
74 | "EnableGraphSurfaces", "UpdateCRTC_DoubleBufferRegisters", | |
75 | "LUT_AutoFill", "EnableHW_IconCursor", "GetMemoryClock", | |
76 | "GetEngineClock", "SetCRTC_UsingDTDTiming", "TVBootUpStdPinDetection", | |
77 | "DFP2OutputControl", "VRAM_BlockDetectionByStrap", "MemoryCleanUp", | |
78 | "ReadEDIDFromHWAssistedI2C", "WriteOneByteToHWAssistedI2C", | |
79 | "ReadHWAssistedI2CStatus", "SpeedFanControl", "PowerConnectorDetection", | |
80 | "MC_Synchronization", "ComputeMemoryEnginePLL", "MemoryRefreshConversion", | |
81 | "VRAM_GetCurrentInfoBlock", "DynamicMemorySettings", "MemoryTraining", | |
82 | "EnableLVDS_SS", "DFP1OutputControl", "SetVoltage", "CRT1OutputControl", | |
83 | "CRT2OutputControl", "SetupHWAssistedI2CStatus", "ClockSource", | |
84 | "MemoryDeviceInit", "EnableYUV", | |
85 | }; | |
86 | ||
87 | #define ATOM_IO_NAMES_CNT 5 | |
88 | static char *atom_io_names[ATOM_IO_NAMES_CNT] = { | |
89 | "MM", "PLL", "MC", "PCIE", "PCIE PORT", | |
90 | }; | |
91 | ||
92 | #else | |
93 | ||
94 | #define ATOM_OP_NAMES_CNT 0 | |
95 | #define ATOM_TABLE_NAMES_CNT 0 | |
96 | #define ATOM_IO_NAMES_CNT 0 | |
97 | ||
98 | #endif | |
99 | ||
100 | #endif |