[linux-block.git] / drivers / gpu / drm / qxl / qxl_cmd.c

/*
 * Copyright 2013 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Dave Airlie
 *          Alon Levy
 */

/* QXL cmd/ring handling */

#include <linux/delay.h>

#include <drm/drm_util.h>

#include "qxl_drv.h"
#include "qxl_object.h"

static int qxl_reap_surface_id(struct qxl_device *qdev, int max_to_reap);

struct ring {
	struct qxl_ring_header      header;
	uint8_t                     elements[];
};

struct qxl_ring {
	struct ring	       *ring;
	int			element_size;
	int			n_elements;
	int			prod_notify;
	wait_queue_head_t      *push_event;
	spinlock_t             lock;
};

void qxl_ring_free(struct qxl_ring *ring)
{
	kfree(ring);
}

void qxl_ring_init_hdr(struct qxl_ring *ring)
{
	ring->ring->header.notify_on_prod = ring->n_elements;
}

struct qxl_ring *
qxl_ring_create(struct qxl_ring_header *header,
		int element_size,
		int n_elements,
		int prod_notify,
		bool set_prod_notify,
		wait_queue_head_t *push_event)
{
	struct qxl_ring *ring;

	ring = kmalloc(sizeof(*ring), GFP_KERNEL);
	if (!ring)
		return NULL;

	ring->ring = (struct ring *)header;
	ring->element_size = element_size;
	ring->n_elements = n_elements;
	ring->prod_notify = prod_notify;
	ring->push_event = push_event;
	if (set_prod_notify)
		qxl_ring_init_hdr(ring);
	spin_lock_init(&ring->lock);
	return ring;
}

static int qxl_check_header(struct qxl_ring *ring)
{
	int ret;
	struct qxl_ring_header *header = &(ring->ring->header);
	unsigned long flags;

	spin_lock_irqsave(&ring->lock, flags);
	ret = header->prod - header->cons < header->num_items;
	if (ret == 0)
		header->notify_on_cons = header->cons + 1;
	spin_unlock_irqrestore(&ring->lock, flags);
	return ret;
}

int qxl_check_idle(struct qxl_ring *ring)
{
	int ret;
	struct qxl_ring_header *header = &(ring->ring->header);
	unsigned long flags;

	spin_lock_irqsave(&ring->lock, flags);
	ret = header->prod == header->cons;
	spin_unlock_irqrestore(&ring->lock, flags);
	return ret;
}

int qxl_ring_push(struct qxl_ring *ring,
		  const void *new_elt, bool interruptible)
{
	struct qxl_ring_header *header = &(ring->ring->header);
	uint8_t *elt;
	int idx, ret;
	unsigned long flags;

	spin_lock_irqsave(&ring->lock, flags);
	if (header->prod - header->cons == header->num_items) {
		header->notify_on_cons = header->cons + 1;
		mb();
		spin_unlock_irqrestore(&ring->lock, flags);
		if (!drm_can_sleep()) {
			while (!qxl_check_header(ring))
				udelay(1);
		} else {
			if (interruptible) {
				ret = wait_event_interruptible(*ring->push_event,
							       qxl_check_header(ring));
				if (ret)
					return ret;
			} else {
				wait_event(*ring->push_event,
					   qxl_check_header(ring));
			}

		}
		spin_lock_irqsave(&ring->lock, flags);
	}

	idx = header->prod & (ring->n_elements - 1);
	elt = ring->ring->elements + idx * ring->element_size;

	memcpy((void *)elt, new_elt, ring->element_size);

	header->prod++;

	mb();

	if (header->prod == header->notify_on_prod)
		outb(0, ring->prod_notify);

	spin_unlock_irqrestore(&ring->lock, flags);
	return 0;
}

static bool qxl_ring_pop(struct qxl_ring *ring,
			 void *element)
{
	volatile struct qxl_ring_header *header = &(ring->ring->header);
	volatile uint8_t *ring_elt;
	int idx;
	unsigned long flags;

	spin_lock_irqsave(&ring->lock, flags);
	if (header->cons == header->prod) {
		header->notify_on_prod = header->cons + 1;
		spin_unlock_irqrestore(&ring->lock, flags);
		return false;
	}

	idx = header->cons & (ring->n_elements - 1);
	ring_elt = ring->ring->elements + idx * ring->element_size;

	memcpy(element, (void *)ring_elt, ring->element_size);

	header->cons++;

	spin_unlock_irqrestore(&ring->lock, flags);
	return true;
}

int
qxl_push_command_ring_release(struct qxl_device *qdev, struct qxl_release *release,
			      uint32_t type, bool interruptible)
{
	struct qxl_command cmd;

	cmd.type = type;
	cmd.data = qxl_bo_physical_address(qdev, release->release_bo, release->release_offset);

	return qxl_ring_push(qdev->command_ring, &cmd, interruptible);
}

int
qxl_push_cursor_ring_release(struct qxl_device *qdev, struct qxl_release *release,
			     uint32_t type, bool interruptible)
{
	struct qxl_command cmd;

	cmd.type = type;
	cmd.data = qxl_bo_physical_address(qdev, release->release_bo, release->release_offset);

	return qxl_ring_push(qdev->cursor_ring, &cmd, interruptible);
}

bool qxl_queue_garbage_collect(struct qxl_device *qdev, bool flush)
{
	if (!qxl_check_idle(qdev->release_ring)) {
		schedule_work(&qdev->gc_work);
		if (flush)
			flush_work(&qdev->gc_work);
		return true;
	}
	return false;
}

int qxl_garbage_collect(struct qxl_device *qdev)
{
	struct qxl_release *release;
	uint64_t id, next_id;
	int i = 0;
	union qxl_release_info *info;

	while (qxl_ring_pop(qdev->release_ring, &id)) {
		DRM_DEBUG_DRIVER("popped %lld\n", id);
		while (id) {
			release = qxl_release_from_id_locked(qdev, id);
			if (release == NULL)
				break;

			info = qxl_release_map(qdev, release);
			next_id = info->next;
			qxl_release_unmap(qdev, release, info);

			DRM_DEBUG_DRIVER("popped %lld, next %lld\n", id,
					 next_id);

			switch (release->type) {
			case QXL_RELEASE_DRAWABLE:
			case QXL_RELEASE_SURFACE_CMD:
			case QXL_RELEASE_CURSOR_CMD:
				break;
			default:
				DRM_ERROR("unexpected release type\n");
				break;
			}
			id = next_id;

			qxl_release_free(qdev, release);
			++i;
		}
	}

	wake_up_all(&qdev->release_event);
	DRM_DEBUG_DRIVER("%d\n", i);

	return i;
}

int qxl_alloc_bo_reserved(struct qxl_device *qdev,
			  struct qxl_release *release,
			  unsigned long size,
			  struct qxl_bo **_bo)
{
	struct qxl_bo *bo;
	int ret;

	ret = qxl_bo_create(qdev, size, false /* not kernel - device */,
			    false, QXL_GEM_DOMAIN_VRAM, 0, NULL, &bo);
	if (ret) {
		DRM_ERROR("failed to allocate VRAM BO\n");
		return ret;
	}
	ret = qxl_release_list_add(release, bo);
	if (ret)
		goto out_unref;

	*_bo = bo;
	return 0;
out_unref:
	qxl_bo_unref(&bo);
	return ret;
}

static int wait_for_io_cmd_user(struct qxl_device *qdev, uint8_t val, long port, bool intr)
{
	int irq_num;
	long addr = qdev->io_base + port;
	int ret;

	mutex_lock(&qdev->async_io_mutex);
	irq_num = atomic_read(&qdev->irq_received_io_cmd);
	if (qdev->last_sent_io_cmd > irq_num) {
		if (intr)
			ret = wait_event_interruptible_timeout(qdev->io_cmd_event,
							       atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
		else
			ret = wait_event_timeout(qdev->io_cmd_event,
						 atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
		/* 0 is timeout, just bail the "hw" has gone away */
		if (ret <= 0)
			goto out;
		irq_num = atomic_read(&qdev->irq_received_io_cmd);
	}
	outb(val, addr);
	qdev->last_sent_io_cmd = irq_num + 1;
	if (intr)
		ret = wait_event_interruptible_timeout(qdev->io_cmd_event,
						       atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
	else
		ret = wait_event_timeout(qdev->io_cmd_event,
					 atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
out:
	if (ret > 0)
		ret = 0;
	mutex_unlock(&qdev->async_io_mutex);
	return ret;
}

static void wait_for_io_cmd(struct qxl_device *qdev, uint8_t val, long port)
{
	int ret;

restart:
	ret = wait_for_io_cmd_user(qdev, val, port, false);
	if (ret == -ERESTARTSYS)
		goto restart;
}

int qxl_io_update_area(struct qxl_device *qdev, struct qxl_bo *surf,
			const struct qxl_rect *area)
{
	int surface_id;
	uint32_t surface_width, surface_height;
	int ret;

	if (!surf->hw_surf_alloc)
		DRM_ERROR("got io update area with no hw surface\n");

	if (surf->is_primary)
		surface_id = 0;
	else
		surface_id = surf->surface_id;
	surface_width = surf->surf.width;
	surface_height = surf->surf.height;

	if (area->left < 0 || area->top < 0 ||
	    area->right > surface_width || area->bottom > surface_height)
		return -EINVAL;

	mutex_lock(&qdev->update_area_mutex);
	qdev->ram_header->update_area = *area;
	qdev->ram_header->update_surface = surface_id;
	ret = wait_for_io_cmd_user(qdev, 0, QXL_IO_UPDATE_AREA_ASYNC, true);
	mutex_unlock(&qdev->update_area_mutex);
	return ret;
}

void qxl_io_notify_oom(struct qxl_device *qdev)
{
	outb(0, qdev->io_base + QXL_IO_NOTIFY_OOM);
}

void qxl_io_flush_release(struct qxl_device *qdev)
{
	outb(0, qdev->io_base + QXL_IO_FLUSH_RELEASE);
}

void qxl_io_flush_surfaces(struct qxl_device *qdev)
{
	wait_for_io_cmd(qdev, 0, QXL_IO_FLUSH_SURFACES_ASYNC);
}

void qxl_io_destroy_primary(struct qxl_device *qdev)
{
	wait_for_io_cmd(qdev, 0, QXL_IO_DESTROY_PRIMARY_ASYNC);
	qdev->primary_bo->is_primary = false;
	drm_gem_object_put(&qdev->primary_bo->tbo.base);
	qdev->primary_bo = NULL;
}

void qxl_io_create_primary(struct qxl_device *qdev, struct qxl_bo *bo)
{
	struct qxl_surface_create *create;

	if (WARN_ON(qdev->primary_bo))
		return;

	DRM_DEBUG_DRIVER("qdev %p, ram_header %p\n", qdev, qdev->ram_header);
	create = &qdev->ram_header->create_surface;
	create->format = bo->surf.format;
	create->width = bo->surf.width;
	create->height = bo->surf.height;
	create->stride = bo->surf.stride;
	create->mem = qxl_bo_physical_address(qdev, bo, 0);

	DRM_DEBUG_DRIVER("mem = %llx, from %p\n", create->mem, bo->kptr);

	create->flags = QXL_SURF_FLAG_KEEP_DATA;
	create->type = QXL_SURF_TYPE_PRIMARY;

	wait_for_io_cmd(qdev, 0, QXL_IO_CREATE_PRIMARY_ASYNC);
	qdev->primary_bo = bo;
	qdev->primary_bo->is_primary = true;
	drm_gem_object_get(&qdev->primary_bo->tbo.base);
}

void qxl_io_memslot_add(struct qxl_device *qdev, uint8_t id)
{
	DRM_DEBUG_DRIVER("qxl_memslot_add %d\n", id);
	wait_for_io_cmd(qdev, id, QXL_IO_MEMSLOT_ADD_ASYNC);
}

void qxl_io_reset(struct qxl_device *qdev)
{
	outb(0, qdev->io_base + QXL_IO_RESET);
}

void qxl_io_monitors_config(struct qxl_device *qdev)
{
	wait_for_io_cmd(qdev, 0, QXL_IO_MONITORS_CONFIG_ASYNC);
}

int qxl_surface_id_alloc(struct qxl_device *qdev,
		      struct qxl_bo *surf)
{
	uint32_t handle;
	int idr_ret;
	int count = 0;
again:
	idr_preload(GFP_ATOMIC);
	spin_lock(&qdev->surf_id_idr_lock);
	idr_ret = idr_alloc(&qdev->surf_id_idr, NULL, 1, 0, GFP_NOWAIT);
	spin_unlock(&qdev->surf_id_idr_lock);
	idr_preload_end();
	if (idr_ret < 0)
		return idr_ret;
	handle = idr_ret;

	if (handle >= qdev->rom->n_surfaces) {
		count++;
		spin_lock(&qdev->surf_id_idr_lock);
		idr_remove(&qdev->surf_id_idr, handle);
		spin_unlock(&qdev->surf_id_idr_lock);
		qxl_reap_surface_id(qdev, 2);
		goto again;
	}
	surf->surface_id = handle;

	spin_lock(&qdev->surf_id_idr_lock);
	qdev->last_alloced_surf_id = handle;
	spin_unlock(&qdev->surf_id_idr_lock);
	return 0;
}

void qxl_surface_id_dealloc(struct qxl_device *qdev,
			    uint32_t surface_id)
{
	spin_lock(&qdev->surf_id_idr_lock);
	idr_remove(&qdev->surf_id_idr, surface_id);
	spin_unlock(&qdev->surf_id_idr_lock);
}

int qxl_hw_surface_alloc(struct qxl_device *qdev,
			 struct qxl_bo *surf)
{
	struct qxl_surface_cmd *cmd;
	struct qxl_release *release;
	int ret;

	if (surf->hw_surf_alloc)
		return 0;

	ret = qxl_alloc_surface_release_reserved(qdev, QXL_SURFACE_CMD_CREATE,
						 NULL,
						 &release);
	if (ret)
		return ret;

	ret = qxl_release_reserve_list(release, true);
	if (ret) {
		qxl_release_free(qdev, release);
		return ret;
	}
	cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release);
	cmd->type = QXL_SURFACE_CMD_CREATE;
	cmd->flags = QXL_SURF_FLAG_KEEP_DATA;
	cmd->u.surface_create.format = surf->surf.format;
	cmd->u.surface_create.width = surf->surf.width;
	cmd->u.surface_create.height = surf->surf.height;
	cmd->u.surface_create.stride = surf->surf.stride;
	cmd->u.surface_create.data = qxl_bo_physical_address(qdev, surf, 0);
	cmd->surface_id = surf->surface_id;
	qxl_release_unmap(qdev, release, &cmd->release_info);

	surf->surf_create = release;

	/* no need to add a release to the fence for this surface bo,
	   since it is only released when we ask to destroy the surface
	   and it would never signal otherwise */
	qxl_release_fence_buffer_objects(release);
	qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);

	surf->hw_surf_alloc = true;
	spin_lock(&qdev->surf_id_idr_lock);
	idr_replace(&qdev->surf_id_idr, surf, surf->surface_id);
	spin_unlock(&qdev->surf_id_idr_lock);
	return 0;
}

int qxl_hw_surface_dealloc(struct qxl_device *qdev,
			   struct qxl_bo *surf)
{
	struct qxl_surface_cmd *cmd;
	struct qxl_release *release;
	int ret;
	int id;

	if (!surf->hw_surf_alloc)
		return 0;

	ret = qxl_alloc_surface_release_reserved(qdev, QXL_SURFACE_CMD_DESTROY,
						 surf->surf_create,
						 &release);
	if (ret)
		return ret;

	surf->surf_create = NULL;
	/* remove the surface from the idr, but not the surface id yet */
	spin_lock(&qdev->surf_id_idr_lock);
	idr_replace(&qdev->surf_id_idr, NULL, surf->surface_id);
	spin_unlock(&qdev->surf_id_idr_lock);
	surf->hw_surf_alloc = false;

	id = surf->surface_id;
	surf->surface_id = 0;

	release->surface_release_id = id;
	cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release);
	cmd->type = QXL_SURFACE_CMD_DESTROY;
	cmd->surface_id = id;
	qxl_release_unmap(qdev, release, &cmd->release_info);

	qxl_release_fence_buffer_objects(release);
	qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);

	return 0;
}

static int qxl_update_surface(struct qxl_device *qdev, struct qxl_bo *surf)
{
	struct qxl_rect rect;
	int ret;

	/* if we are evicting, we need to make sure the surface is up
	   to date */
	rect.left = 0;
	rect.right = surf->surf.width;
	rect.top = 0;
	rect.bottom = surf->surf.height;
retry:
	ret = qxl_io_update_area(qdev, surf, &rect);
	if (ret == -ERESTARTSYS)
		goto retry;
	return ret;
}

static void qxl_surface_evict_locked(struct qxl_device *qdev, struct qxl_bo *surf, bool do_update_area)
{
	/* no need to update area if we are just freeing the surface normally */
	if (do_update_area)
		qxl_update_surface(qdev, surf);

	/* nuke the surface id at the hw */
	qxl_hw_surface_dealloc(qdev, surf);
}

void qxl_surface_evict(struct qxl_device *qdev, struct qxl_bo *surf, bool do_update_area)
{
	mutex_lock(&qdev->surf_evict_mutex);
	qxl_surface_evict_locked(qdev, surf, do_update_area);
	mutex_unlock(&qdev->surf_evict_mutex);
}

static int qxl_reap_surf(struct qxl_device *qdev, struct qxl_bo *surf, bool stall)
{
	int ret;

	ret = qxl_bo_reserve(surf);
	if (ret)
		return ret;

	if (stall)
		mutex_unlock(&qdev->surf_evict_mutex);

	ret = ttm_bo_wait(&surf->tbo, true, !stall);

	if (stall)
		mutex_lock(&qdev->surf_evict_mutex);
	if (ret) {
		qxl_bo_unreserve(surf);
		return ret;
	}

	qxl_surface_evict_locked(qdev, surf, true);
	qxl_bo_unreserve(surf);
	return 0;
}

static int qxl_reap_surface_id(struct qxl_device *qdev, int max_to_reap)
{
	int num_reaped = 0;
	int i, ret;
	bool stall = false;
	int start = 0;

	mutex_lock(&qdev->surf_evict_mutex);
again:

	spin_lock(&qdev->surf_id_idr_lock);
	start = qdev->last_alloced_surf_id + 1;
	spin_unlock(&qdev->surf_id_idr_lock);

	for (i = start; i < start + qdev->rom->n_surfaces; i++) {
		void *objptr;
		int surfid = i % qdev->rom->n_surfaces;

		/* this avoids the case where the objects is in the
		   idr but has been evicted half way - its makes
		   the idr lookup atomic with the eviction */
		spin_lock(&qdev->surf_id_idr_lock);
		objptr = idr_find(&qdev->surf_id_idr, surfid);
		spin_unlock(&qdev->surf_id_idr_lock);

		if (!objptr)
			continue;

		ret = qxl_reap_surf(qdev, objptr, stall);
		if (ret == 0)
			num_reaped++;
		if (num_reaped >= max_to_reap)
			break;
	}
	if (num_reaped == 0 && stall == false) {
		stall = true;
		goto again;
	}

	mutex_unlock(&qdev->surf_evict_mutex);
	if (num_reaped) {
		usleep_range(500, 1000);
		qxl_queue_garbage_collect(qdev, true);
	}

	return 0;
}
Commit	Line	Data
f64122c1 DA	1	/*
	2	* Copyright 2013 Red Hat Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: Dave Airlie
	23	* Alon Levy
	24	*/
	25
	26	/* QXL cmd/ring handling */
	27
c0f4b75c SR	28	#include <linux/delay.h>
c0f4b75c SR	29
e9eafcb5 SR	30	#include <drm/drm_util.h>
e9eafcb5 SR	31
f64122c1 DA	32	#include "qxl_drv.h"
	33	#include "qxl_object.h"
	34
	35	static int qxl_reap_surface_id(struct qxl_device *qdev, int max_to_reap);
	36
	37	struct ring {
	38	struct qxl_ring_header header;
0f065863	39	uint8_t elements[];
f64122c1 DA	40	};
	41
	42	struct qxl_ring {
	43	struct ring *ring;
	44	int element_size;
	45	int n_elements;
	46	int prod_notify;
	47	wait_queue_head_t *push_event;
	48	spinlock_t lock;
	49	};
	50
	51	void qxl_ring_free(struct qxl_ring *ring)
	52	{
	53	kfree(ring);
	54	}
	55
1e209117 DA	56	void qxl_ring_init_hdr(struct qxl_ring *ring)
	57	{
	58	ring->ring->header.notify_on_prod = ring->n_elements;
	59	}
	60
f64122c1 DA	61	struct qxl_ring *
	62	qxl_ring_create(struct qxl_ring_header *header,
	63	int element_size,
	64	int n_elements,
	65	int prod_notify,
	66	bool set_prod_notify,
	67	wait_queue_head_t *push_event)
	68	{
	69	struct qxl_ring *ring;
	70
	71	ring = kmalloc(sizeof(*ring), GFP_KERNEL);
	72	if (!ring)
	73	return NULL;
	74
	75	ring->ring = (struct ring *)header;
	76	ring->element_size = element_size;
	77	ring->n_elements = n_elements;
	78	ring->prod_notify = prod_notify;
	79	ring->push_event = push_event;
	80	if (set_prod_notify)
1e209117	81	qxl_ring_init_hdr(ring);
f64122c1 DA	82	spin_lock_init(&ring->lock);
	83	return ring;
	84	}
	85
	86	static int qxl_check_header(struct qxl_ring *ring)
	87	{
	88	int ret;
	89	struct qxl_ring_header *header = &(ring->ring->header);
	90	unsigned long flags;
408799eb	91
f64122c1 DA	92	spin_lock_irqsave(&ring->lock, flags);
	93	ret = header->prod - header->cons < header->num_items;
	94	if (ret == 0)
	95	header->notify_on_cons = header->cons + 1;
	96	spin_unlock_irqrestore(&ring->lock, flags);
	97	return ret;
	98	}
	99
1e209117	100	int qxl_check_idle(struct qxl_ring *ring)
f64122c1 DA	101	{
	102	int ret;
	103	struct qxl_ring_header *header = &(ring->ring->header);
	104	unsigned long flags;
408799eb	105
f64122c1 DA	106	spin_lock_irqsave(&ring->lock, flags);
	107	ret = header->prod == header->cons;
	108	spin_unlock_irqrestore(&ring->lock, flags);
	109	return ret;
	110	}
	111
	112	int qxl_ring_push(struct qxl_ring *ring,
	113	const void *new_elt, bool interruptible)
	114	{
	115	struct qxl_ring_header *header = &(ring->ring->header);
	116	uint8_t *elt;
	117	int idx, ret;
	118	unsigned long flags;
408799eb	119
f64122c1 DA	120	spin_lock_irqsave(&ring->lock, flags);
	121	if (header->prod - header->cons == header->num_items) {
	122	header->notify_on_cons = header->cons + 1;
	123	mb();
	124	spin_unlock_irqrestore(&ring->lock, flags);
	125	if (!drm_can_sleep()) {
	126	while (!qxl_check_header(ring))
	127	udelay(1);
	128	} else {
	129	if (interruptible) {
	130	ret = wait_event_interruptible(*ring->push_event,
	131	qxl_check_header(ring));
	132	if (ret)
	133	return ret;
	134	} else {
	135	wait_event(*ring->push_event,
	136	qxl_check_header(ring));
	137	}
	138
	139	}
	140	spin_lock_irqsave(&ring->lock, flags);
	141	}
	142
	143	idx = header->prod & (ring->n_elements - 1);
	144	elt = ring->ring->elements + idx * ring->element_size;
	145
	146	memcpy((void *)elt, new_elt, ring->element_size);
	147
	148	header->prod++;
	149
	150	mb();
	151
	152	if (header->prod == header->notify_on_prod)
	153	outb(0, ring->prod_notify);
	154
	155	spin_unlock_irqrestore(&ring->lock, flags);
	156	return 0;
	157	}
	158
6d01f1f5 DA	159	static bool qxl_ring_pop(struct qxl_ring *ring,
6d01f1f5 DA	160	void *element)
f64122c1 DA	161	{
	162	volatile struct qxl_ring_header *header = &(ring->ring->header);
	163	volatile uint8_t *ring_elt;
	164	int idx;
	165	unsigned long flags;
408799eb	166
f64122c1 DA	167	spin_lock_irqsave(&ring->lock, flags);
	168	if (header->cons == header->prod) {
	169	header->notify_on_prod = header->cons + 1;
	170	spin_unlock_irqrestore(&ring->lock, flags);
	171	return false;
	172	}
	173
	174	idx = header->cons & (ring->n_elements - 1);
	175	ring_elt = ring->ring->elements + idx * ring->element_size;
	176
	177	memcpy(element, (void *)ring_elt, ring->element_size);
	178
	179	header->cons++;
	180
	181	spin_unlock_irqrestore(&ring->lock, flags);
	182	return true;
	183	}
	184
f64122c1 DA	185	int
	186	qxl_push_command_ring_release(struct qxl_device qdev, struct qxl_release release,
	187	uint32_t type, bool interruptible)
	188	{
	189	struct qxl_command cmd;
	190
	191	cmd.type = type;
7a31805b	192	cmd.data = qxl_bo_physical_address(qdev, release->release_bo, release->release_offset);
f64122c1 DA	193
	194	return qxl_ring_push(qdev->command_ring, &cmd, interruptible);
	195	}
	196
	197	int
	198	qxl_push_cursor_ring_release(struct qxl_device qdev, struct qxl_release release,
	199	uint32_t type, bool interruptible)
	200	{
	201	struct qxl_command cmd;
	202
	203	cmd.type = type;
7a31805b	204	cmd.data = qxl_bo_physical_address(qdev, release->release_bo, release->release_offset);
f64122c1 DA	205
	206	return qxl_ring_push(qdev->cursor_ring, &cmd, interruptible);
	207	}
	208
	209	bool qxl_queue_garbage_collect(struct qxl_device *qdev, bool flush)
	210	{
	211	if (!qxl_check_idle(qdev->release_ring)) {
7b2d16f5	212	schedule_work(&qdev->gc_work);
f64122c1 DA	213	if (flush)
	214	flush_work(&qdev->gc_work);
	215	return true;
	216	}
	217	return false;
	218	}
	219
	220	int qxl_garbage_collect(struct qxl_device *qdev)
	221	{
	222	struct qxl_release *release;
	223	uint64_t id, next_id;
	224	int i = 0;
f64122c1 DA	225	union qxl_release_info *info;
	226
	227	while (qxl_ring_pop(qdev->release_ring, &id)) {
56cbcb6c	228	DRM_DEBUG_DRIVER("popped %lld\n", id);
f64122c1 DA	229	while (id) {
	230	release = qxl_release_from_id_locked(qdev, id);
	231	if (release == NULL)
	232	break;
	233
f64122c1 DA	234	info = qxl_release_map(qdev, release);
	235	next_id = info->next;
	236	qxl_release_unmap(qdev, release, info);
	237
56cbcb6c GH	238	DRM_DEBUG_DRIVER("popped %lld, next %lld\n", id,
56cbcb6c GH	239	next_id);
f64122c1 DA	240
	241	switch (release->type) {
	242	case QXL_RELEASE_DRAWABLE:
	243	case QXL_RELEASE_SURFACE_CMD:
	244	case QXL_RELEASE_CURSOR_CMD:
	245	break;
	246	default:
	247	DRM_ERROR("unexpected release type\n");
	248	break;
	249	}
	250	id = next_id;
	251
	252	qxl_release_free(qdev, release);
	253	++i;
	254	}
	255	}
	256
5f6c871f	257	wake_up_all(&qdev->release_event);
56cbcb6c	258	DRM_DEBUG_DRIVER("%d\n", i);
f64122c1 DA	259
	260	return i;
	261	}
	262
8002db63 DA	263	int qxl_alloc_bo_reserved(struct qxl_device *qdev,
	264	struct qxl_release *release,
	265	unsigned long size,
f64122c1 DA	266	struct qxl_bo **_bo)
	267	{
	268	struct qxl_bo *bo;
	269	int ret;
	270
	271	ret = qxl_bo_create(qdev, size, false /* not kernel - device */,
4fff19ae	272	false, QXL_GEM_DOMAIN_VRAM, 0, NULL, &bo);
f64122c1 DA	273	if (ret) {
	274	DRM_ERROR("failed to allocate VRAM BO\n");
	275	return ret;
	276	}
8002db63 DA	277	ret = qxl_release_list_add(release, bo);
8002db63 DA	278	if (ret)
f64122c1 DA	279	goto out_unref;
	280
	281	*_bo = bo;
	282	return 0;
	283	out_unref:
	284	qxl_bo_unref(&bo);
8002db63	285	return ret;
f64122c1 DA	286	}
f64122c1 DA	287
a6ac1bc3	288	static int wait_for_io_cmd_user(struct qxl_device *qdev, uint8_t val, long port, bool intr)
f64122c1 DA	289	{
	290	int irq_num;
	291	long addr = qdev->io_base + port;
	292	int ret;
	293
	294	mutex_lock(&qdev->async_io_mutex);
	295	irq_num = atomic_read(&qdev->irq_received_io_cmd);
f64122c1	296	if (qdev->last_sent_io_cmd > irq_num) {
a6ac1bc3 DA	297	if (intr)
	298	ret = wait_event_interruptible_timeout(qdev->io_cmd_event,
	299	atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
	300	else
	301	ret = wait_event_timeout(qdev->io_cmd_event,
	302	atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
	303	/* 0 is timeout, just bail the "hw" has gone away */
	304	if (ret <= 0)
f64122c1 DA	305	goto out;
	306	irq_num = atomic_read(&qdev->irq_received_io_cmd);
	307	}
	308	outb(val, addr);
	309	qdev->last_sent_io_cmd = irq_num + 1;
a6ac1bc3 DA	310	if (intr)
	311	ret = wait_event_interruptible_timeout(qdev->io_cmd_event,
	312	atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
	313	else
	314	ret = wait_event_timeout(qdev->io_cmd_event,
	315	atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
f64122c1	316	out:
a6ac1bc3 DA	317	if (ret > 0)
a6ac1bc3 DA	318	ret = 0;
f64122c1 DA	319	mutex_unlock(&qdev->async_io_mutex);
	320	return ret;
	321	}
	322
	323	static void wait_for_io_cmd(struct qxl_device *qdev, uint8_t val, long port)
	324	{
	325	int ret;
	326
	327	restart:
a6ac1bc3	328	ret = wait_for_io_cmd_user(qdev, val, port, false);
f64122c1 DA	329	if (ret == -ERESTARTSYS)
	330	goto restart;
	331	}
	332
	333	int qxl_io_update_area(struct qxl_device qdev, struct qxl_bo surf,
	334	const struct qxl_rect *area)
	335	{
	336	int surface_id;
	337	uint32_t surface_width, surface_height;
	338	int ret;
	339
	340	if (!surf->hw_surf_alloc)
	341	DRM_ERROR("got io update area with no hw surface\n");
	342
	343	if (surf->is_primary)
	344	surface_id = 0;
	345	else
	346	surface_id = surf->surface_id;
	347	surface_width = surf->surf.width;
	348	surface_height = surf->surf.height;
	349
	350	if (area->left < 0 \|\| area->top < 0 \|\|
735581a0	351	area->right > surface_width \|\| area->bottom > surface_height)
f64122c1	352	return -EINVAL;
735581a0	353
f64122c1 DA	354	mutex_lock(&qdev->update_area_mutex);
	355	qdev->ram_header->update_area = *area;
	356	qdev->ram_header->update_surface = surface_id;
a6ac1bc3	357	ret = wait_for_io_cmd_user(qdev, 0, QXL_IO_UPDATE_AREA_ASYNC, true);
f64122c1 DA	358	mutex_unlock(&qdev->update_area_mutex);
	359	return ret;
	360	}
	361
	362	void qxl_io_notify_oom(struct qxl_device *qdev)
	363	{
	364	outb(0, qdev->io_base + QXL_IO_NOTIFY_OOM);
	365	}
	366
	367	void qxl_io_flush_release(struct qxl_device *qdev)
	368	{
	369	outb(0, qdev->io_base + QXL_IO_FLUSH_RELEASE);
	370	}
	371
	372	void qxl_io_flush_surfaces(struct qxl_device *qdev)
	373	{
	374	wait_for_io_cmd(qdev, 0, QXL_IO_FLUSH_SURFACES_ASYNC);
	375	}
	376
f64122c1 DA	377	void qxl_io_destroy_primary(struct qxl_device *qdev)
	378	{
	379	wait_for_io_cmd(qdev, 0, QXL_IO_DESTROY_PRIMARY_ASYNC);
4979904c	380	qdev->primary_bo->is_primary = false;
9c86fb18	381	drm_gem_object_put(&qdev->primary_bo->tbo.base);
16620544	382	qdev->primary_bo = NULL;
f64122c1 DA	383	}
f64122c1 DA	384
fb7ebc01	385	void qxl_io_create_primary(struct qxl_device qdev, struct qxl_bo bo)
f64122c1 DA	386	{
	387	struct qxl_surface_create *create;
	388
16620544 GH	389	if (WARN_ON(qdev->primary_bo))
	390	return;
	391
56cbcb6c	392	DRM_DEBUG_DRIVER("qdev %p, ram_header %p\n", qdev, qdev->ram_header);
f64122c1 DA	393	create = &qdev->ram_header->create_surface;
f64122c1 DA	394	create->format = bo->surf.format;
07f8d9bd DA	395	create->width = bo->surf.width;
07f8d9bd DA	396	create->height = bo->surf.height;
f64122c1	397	create->stride = bo->surf.stride;
4979904c	398	create->mem = qxl_bo_physical_address(qdev, bo, 0);
f64122c1	399
56cbcb6c	400	DRM_DEBUG_DRIVER("mem = %llx, from %p\n", create->mem, bo->kptr);
f64122c1 DA	401
	402	create->flags = QXL_SURF_FLAG_KEEP_DATA;
	403	create->type = QXL_SURF_TYPE_PRIMARY;
	404
	405	wait_for_io_cmd(qdev, 0, QXL_IO_CREATE_PRIMARY_ASYNC);
16620544	406	qdev->primary_bo = bo;
4979904c	407	qdev->primary_bo->is_primary = true;
e0828d54	408	drm_gem_object_get(&qdev->primary_bo->tbo.base);
f64122c1 DA	409	}
	410
	411	void qxl_io_memslot_add(struct qxl_device *qdev, uint8_t id)
	412	{
56cbcb6c	413	DRM_DEBUG_DRIVER("qxl_memslot_add %d\n", id);
f64122c1 DA	414	wait_for_io_cmd(qdev, id, QXL_IO_MEMSLOT_ADD_ASYNC);
	415	}
	416
f64122c1 DA	417	void qxl_io_reset(struct qxl_device *qdev)
	418	{
	419	outb(0, qdev->io_base + QXL_IO_RESET);
	420	}
	421
	422	void qxl_io_monitors_config(struct qxl_device *qdev)
	423	{
f64122c1 DA	424	wait_for_io_cmd(qdev, 0, QXL_IO_MONITORS_CONFIG_ASYNC);
	425	}
	426
	427	int qxl_surface_id_alloc(struct qxl_device *qdev,
	428	struct qxl_bo *surf)
	429	{
307b9c02	430	uint32_t handle;
f64122c1 DA	431	int idr_ret;
	432	int count = 0;
	433	again:
307b9c02	434	idr_preload(GFP_ATOMIC);
f64122c1	435	spin_lock(&qdev->surf_id_idr_lock);
307b9c02	436	idr_ret = idr_alloc(&qdev->surf_id_idr, NULL, 1, 0, GFP_NOWAIT);
f64122c1	437	spin_unlock(&qdev->surf_id_idr_lock);
307b9c02 DA	438	idr_preload_end();
	439	if (idr_ret < 0)
	440	return idr_ret;
	441	handle = idr_ret;
f64122c1 DA	442
	443	if (handle >= qdev->rom->n_surfaces) {
	444	count++;
	445	spin_lock(&qdev->surf_id_idr_lock);
	446	idr_remove(&qdev->surf_id_idr, handle);
	447	spin_unlock(&qdev->surf_id_idr_lock);
	448	qxl_reap_surface_id(qdev, 2);
	449	goto again;
	450	}
	451	surf->surface_id = handle;
	452
	453	spin_lock(&qdev->surf_id_idr_lock);
	454	qdev->last_alloced_surf_id = handle;
	455	spin_unlock(&qdev->surf_id_idr_lock);
f64122c1 DA	456	return 0;
	457	}
	458
	459	void qxl_surface_id_dealloc(struct qxl_device *qdev,
	460	uint32_t surface_id)
	461	{
	462	spin_lock(&qdev->surf_id_idr_lock);
	463	idr_remove(&qdev->surf_id_idr, surface_id);
	464	spin_unlock(&qdev->surf_id_idr_lock);
	465	}
	466
	467	int qxl_hw_surface_alloc(struct qxl_device *qdev,
edd38a1e	468	struct qxl_bo *surf)
f64122c1 DA	469	{
	470	struct qxl_surface_cmd *cmd;
	471	struct qxl_release *release;
	472	int ret;
	473
	474	if (surf->hw_surf_alloc)
	475	return 0;
	476
	477	ret = qxl_alloc_surface_release_reserved(qdev, QXL_SURFACE_CMD_CREATE,
	478	NULL,
	479	&release);
	480	if (ret)
	481	return ret;
	482
8002db63	483	ret = qxl_release_reserve_list(release, true);
a65aa9c3 VA	484	if (ret) {
a65aa9c3 VA	485	qxl_release_free(qdev, release);
8002db63	486	return ret;
a65aa9c3	487	}
f64122c1 DA	488	cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release);
f64122c1 DA	489	cmd->type = QXL_SURFACE_CMD_CREATE;
2fa19535	490	cmd->flags = QXL_SURF_FLAG_KEEP_DATA;
f64122c1 DA	491	cmd->u.surface_create.format = surf->surf.format;
	492	cmd->u.surface_create.width = surf->surf.width;
	493	cmd->u.surface_create.height = surf->surf.height;
	494	cmd->u.surface_create.stride = surf->surf.stride;
edd38a1e	495	cmd->u.surface_create.data = qxl_bo_physical_address(qdev, surf, 0);
f64122c1 DA	496	cmd->surface_id = surf->surface_id;
	497	qxl_release_unmap(qdev, release, &cmd->release_info);
	498
	499	surf->surf_create = release;
	500
8002db63	501	/* no need to add a release to the fence for this surface bo,
f64122c1 DA	502	since it is only released when we ask to destroy the surface
f64122c1 DA	503	and it would never signal otherwise */
8002db63	504	qxl_release_fence_buffer_objects(release);
933db733	505	qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);
f64122c1 DA	506
	507	surf->hw_surf_alloc = true;
	508	spin_lock(&qdev->surf_id_idr_lock);
	509	idr_replace(&qdev->surf_id_idr, surf, surf->surface_id);
	510	spin_unlock(&qdev->surf_id_idr_lock);
	511	return 0;
	512	}
	513
	514	int qxl_hw_surface_dealloc(struct qxl_device *qdev,
	515	struct qxl_bo *surf)
	516	{
	517	struct qxl_surface_cmd *cmd;
	518	struct qxl_release *release;
	519	int ret;
	520	int id;
	521
	522	if (!surf->hw_surf_alloc)
	523	return 0;
	524
	525	ret = qxl_alloc_surface_release_reserved(qdev, QXL_SURFACE_CMD_DESTROY,
	526	surf->surf_create,
	527	&release);
	528	if (ret)
	529	return ret;
	530
	531	surf->surf_create = NULL;
	532	/* remove the surface from the idr, but not the surface id yet */
	533	spin_lock(&qdev->surf_id_idr_lock);
	534	idr_replace(&qdev->surf_id_idr, NULL, surf->surface_id);
	535	spin_unlock(&qdev->surf_id_idr_lock);
	536	surf->hw_surf_alloc = false;
	537
	538	id = surf->surface_id;
	539	surf->surface_id = 0;
	540
	541	release->surface_release_id = id;
	542	cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release);
	543	cmd->type = QXL_SURFACE_CMD_DESTROY;
	544	cmd->surface_id = id;
	545	qxl_release_unmap(qdev, release, &cmd->release_info);
	546
8002db63	547	qxl_release_fence_buffer_objects(release);
933db733	548	qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);
f64122c1 DA	549
	550	return 0;
	551	}
	552
e4a76442	553	static int qxl_update_surface(struct qxl_device qdev, struct qxl_bo surf)
f64122c1 DA	554	{
	555	struct qxl_rect rect;
	556	int ret;
	557
	558	/* if we are evicting, we need to make sure the surface is up
	559	to date */
	560	rect.left = 0;
	561	rect.right = surf->surf.width;
	562	rect.top = 0;
	563	rect.bottom = surf->surf.height;
	564	retry:
	565	ret = qxl_io_update_area(qdev, surf, &rect);
	566	if (ret == -ERESTARTSYS)
	567	goto retry;
	568	return ret;
	569	}
	570
6d01f1f5	571	static void qxl_surface_evict_locked(struct qxl_device qdev, struct qxl_bo surf, bool do_update_area)
f64122c1 DA	572	{
	573	/* no need to update area if we are just freeing the surface normally */
	574	if (do_update_area)
	575	qxl_update_surface(qdev, surf);
	576
	577	/* nuke the surface id at the hw */
	578	qxl_hw_surface_dealloc(qdev, surf);
	579	}
	580
	581	void qxl_surface_evict(struct qxl_device qdev, struct qxl_bo surf, bool do_update_area)
	582	{
	583	mutex_lock(&qdev->surf_evict_mutex);
	584	qxl_surface_evict_locked(qdev, surf, do_update_area);
	585	mutex_unlock(&qdev->surf_evict_mutex);
	586	}
	587
	588	static int qxl_reap_surf(struct qxl_device qdev, struct qxl_bo surf, bool stall)
	589	{
	590	int ret;
	591
9c4cbb3a	592	ret = qxl_bo_reserve(surf);
c610c713 FZ	593	if (ret)
c610c713 FZ	594	return ret;
f64122c1	595
f64122c1 DA	596	if (stall)
	597	mutex_unlock(&qdev->surf_evict_mutex);
	598
8aa6d4fc	599	ret = ttm_bo_wait(&surf->tbo, true, !stall);
f64122c1 DA	600
	601	if (stall)
	602	mutex_lock(&qdev->surf_evict_mutex);
c610c713	603	if (ret) {
f64122c1	604	qxl_bo_unreserve(surf);
c610c713	605	return ret;
f64122c1 DA	606	}
	607
	608	qxl_surface_evict_locked(qdev, surf, true);
	609	qxl_bo_unreserve(surf);
	610	return 0;
	611	}
	612
	613	static int qxl_reap_surface_id(struct qxl_device *qdev, int max_to_reap)
	614	{
	615	int num_reaped = 0;
	616	int i, ret;
	617	bool stall = false;
	618	int start = 0;
	619
	620	mutex_lock(&qdev->surf_evict_mutex);
	621	again:
	622
	623	spin_lock(&qdev->surf_id_idr_lock);
	624	start = qdev->last_alloced_surf_id + 1;
	625	spin_unlock(&qdev->surf_id_idr_lock);
	626
	627	for (i = start; i < start + qdev->rom->n_surfaces; i++) {
	628	void *objptr;
	629	int surfid = i % qdev->rom->n_surfaces;
	630
	631	/* this avoids the case where the objects is in the
	632	idr but has been evicted half way - its makes
	633	the idr lookup atomic with the eviction */
	634	spin_lock(&qdev->surf_id_idr_lock);
	635	objptr = idr_find(&qdev->surf_id_idr, surfid);
	636	spin_unlock(&qdev->surf_id_idr_lock);
	637
	638	if (!objptr)
	639	continue;
	640
	641	ret = qxl_reap_surf(qdev, objptr, stall);
	642	if (ret == 0)
	643	num_reaped++;
	644	if (num_reaped >= max_to_reap)
	645	break;
	646	}
	647	if (num_reaped == 0 && stall == false) {
	648	stall = true;
	649	goto again;
	650	}
	651
	652	mutex_unlock(&qdev->surf_evict_mutex);
	653	if (num_reaped) {
	654	usleep_range(500, 1000);
	655	qxl_queue_garbage_collect(qdev, true);
	656	}
	657
	658	return 0;
	659	}