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f3ba9122 RH |
1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2 | /* Copyright 2018 Marty E. Plummer <hanetzer@startmail.com> */ | |
3 | /* Copyright 2019 Linaro, Ltd, Rob Herring <robh@kernel.org> */ | |
4 | ||
5 | #ifndef __PANFROST_DEVICE_H__ | |
6 | #define __PANFROST_DEVICE_H__ | |
7 | ||
7282f764 RH |
8 | #include <linux/atomic.h> |
9 | #include <linux/io-pgtable.h> | |
3e1399bc | 10 | #include <linux/regulator/consumer.h> |
f3ba9122 RH |
11 | #include <linux/spinlock.h> |
12 | #include <drm/drm_device.h> | |
13 | #include <drm/drm_mm.h> | |
14 | #include <drm/gpu_scheduler.h> | |
15 | ||
9bfacfc8 CP |
16 | #include "panfrost_devfreq.h" |
17 | ||
f3ba9122 RH |
18 | struct panfrost_device; |
19 | struct panfrost_mmu; | |
20 | struct panfrost_job_slot; | |
21 | struct panfrost_job; | |
7786fd10 | 22 | struct panfrost_perfcnt; |
f3ba9122 RH |
23 | |
24 | #define NUM_JOB_SLOTS 3 | |
506629c8 | 25 | #define MAX_PM_DOMAINS 3 |
f3ba9122 RH |
26 | |
27 | struct panfrost_features { | |
28 | u16 id; | |
29 | u16 revision; | |
30 | ||
31 | u64 shader_present; | |
32 | u64 tiler_present; | |
33 | u64 l2_present; | |
34 | u64 stack_present; | |
35 | u32 as_present; | |
36 | u32 js_present; | |
37 | ||
38 | u32 l2_features; | |
39 | u32 core_features; | |
40 | u32 tiler_features; | |
41 | u32 mem_features; | |
42 | u32 mmu_features; | |
43 | u32 thread_features; | |
44 | u32 max_threads; | |
45 | u32 thread_max_workgroup_sz; | |
46 | u32 thread_max_barrier_sz; | |
47 | u32 coherency_features; | |
48 | u32 texture_features[4]; | |
49 | u32 js_features[16]; | |
50 | ||
51 | u32 nr_core_groups; | |
4bced8be | 52 | u32 thread_tls_alloc; |
f3ba9122 RH |
53 | |
54 | unsigned long hw_features[64 / BITS_PER_LONG]; | |
55 | unsigned long hw_issues[64 / BITS_PER_LONG]; | |
56 | }; | |
57 | ||
3e1399bc NB |
58 | /* |
59 | * Features that cannot be automatically detected and need matching using the | |
60 | * compatible string, typically SoC-specific. | |
61 | */ | |
62 | struct panfrost_compatible { | |
63 | /* Supplies count and names. */ | |
64 | int num_supplies; | |
65 | const char * const *supply_names; | |
506629c8 NB |
66 | /* |
67 | * Number of power domains required, note that values 0 and 1 are | |
68 | * handled identically, as only values > 1 need special handling. | |
69 | */ | |
70 | int num_pm_domains; | |
71 | /* Only required if num_pm_domains > 1. */ | |
72 | const char * const *pm_domain_names; | |
91e89097 NA |
73 | |
74 | /* Vendor implementation quirks callback */ | |
75 | void (*vendor_quirk)(struct panfrost_device *pfdev); | |
3e1399bc NB |
76 | }; |
77 | ||
f3ba9122 RH |
78 | struct panfrost_device { |
79 | struct device *dev; | |
80 | struct drm_device *ddev; | |
81 | struct platform_device *pdev; | |
82 | ||
f3ba9122 RH |
83 | void __iomem *iomem; |
84 | struct clk *clock; | |
b681af0b | 85 | struct clk *bus_clock; |
512f2122 | 86 | struct regulator_bulk_data *regulators; |
f3ba9122 | 87 | struct reset_control *rstc; |
506629c8 NB |
88 | /* pm_domains for devices with more than one. */ |
89 | struct device *pm_domain_devs[MAX_PM_DOMAINS]; | |
90 | struct device_link *pm_domain_links[MAX_PM_DOMAINS]; | |
268af50f | 91 | bool coherent; |
f3ba9122 RH |
92 | |
93 | struct panfrost_features features; | |
3e1399bc | 94 | const struct panfrost_compatible *comp; |
f3ba9122 | 95 | |
7282f764 RH |
96 | spinlock_t as_lock; |
97 | unsigned long as_in_use_mask; | |
98 | unsigned long as_alloc_mask; | |
99 | struct list_head as_lru_list; | |
100 | ||
f3ba9122 RH |
101 | struct panfrost_job_slot *js; |
102 | ||
103 | struct panfrost_job *jobs[NUM_JOB_SLOTS]; | |
104 | struct list_head scheduled_jobs; | |
105 | ||
7786fd10 BB |
106 | struct panfrost_perfcnt *perfcnt; |
107 | ||
f3ba9122 | 108 | struct mutex sched_lock; |
5bc5cc28 BB |
109 | |
110 | struct { | |
111 | struct work_struct work; | |
112 | atomic_t pending; | |
113 | } reset; | |
f3ba9122 | 114 | |
013b6510 RH |
115 | struct mutex shrinker_lock; |
116 | struct list_head shrinker_list; | |
117 | struct shrinker shrinker; | |
118 | ||
9bfacfc8 | 119 | struct panfrost_devfreq pfdevfreq; |
f3ba9122 RH |
120 | }; |
121 | ||
7282f764 RH |
122 | struct panfrost_mmu { |
123 | struct io_pgtable_cfg pgtbl_cfg; | |
124 | struct io_pgtable_ops *pgtbl_ops; | |
7282f764 RH |
125 | int as; |
126 | atomic_t as_count; | |
127 | struct list_head list; | |
128 | }; | |
129 | ||
f3ba9122 RH |
130 | struct panfrost_file_priv { |
131 | struct panfrost_device *pfdev; | |
132 | ||
133 | struct drm_sched_entity sched_entity[NUM_JOB_SLOTS]; | |
7282f764 RH |
134 | |
135 | struct panfrost_mmu mmu; | |
136 | struct drm_mm mm; | |
137 | spinlock_t mm_lock; | |
f3ba9122 RH |
138 | }; |
139 | ||
140 | static inline struct panfrost_device *to_panfrost_device(struct drm_device *ddev) | |
141 | { | |
142 | return ddev->dev_private; | |
143 | } | |
144 | ||
145 | static inline int panfrost_model_cmp(struct panfrost_device *pfdev, s32 id) | |
146 | { | |
147 | s32 match_id = pfdev->features.id; | |
148 | ||
149 | if (match_id & 0xf000) | |
150 | match_id &= 0xf00f; | |
151 | return match_id - id; | |
152 | } | |
153 | ||
1e513480 BB |
154 | static inline bool panfrost_model_is_bifrost(struct panfrost_device *pfdev) |
155 | { | |
156 | return panfrost_model_cmp(pfdev, 0x1000) >= 0; | |
157 | } | |
158 | ||
f3ba9122 RH |
159 | static inline bool panfrost_model_eq(struct panfrost_device *pfdev, s32 id) |
160 | { | |
161 | return !panfrost_model_cmp(pfdev, id); | |
162 | } | |
163 | ||
92f0ad0b BB |
164 | int panfrost_unstable_ioctl_check(void); |
165 | ||
f3ba9122 RH |
166 | int panfrost_device_init(struct panfrost_device *pfdev); |
167 | void panfrost_device_fini(struct panfrost_device *pfdev); | |
73e467f6 | 168 | void panfrost_device_reset(struct panfrost_device *pfdev); |
f3ba9122 RH |
169 | |
170 | int panfrost_device_resume(struct device *dev); | |
171 | int panfrost_device_suspend(struct device *dev); | |
172 | ||
173 | const char *panfrost_exception_name(struct panfrost_device *pfdev, u32 exception_code); | |
174 | ||
175 | #endif |