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drm/panel: simple: Add support for Hitachi TX23D38VM0CAA
[linux-2.6-block.git] / drivers / gpu / drm / panel / panel-simple.c
CommitLineData
280921de
TR		 1/*
2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24#include <linux/backlight.h>
cfdf0549 25#include <linux/gpio/consumer.h>
280921de 26#include <linux/module.h>
280921de
TR		 27#include <linux/of_platform.h>
28#include <linux/platform_device.h>
29#include <linux/regulator/consumer.h>
30
31#include <drm/drmP.h>
32#include <drm/drm_crtc.h>
210fcd9d 33#include <drm/drm_mipi_dsi.h>
280921de
TR		 34#include <drm/drm_panel.h>
35
36struct panel_desc {
37 const struct drm_display_mode *modes;
38 unsigned int num_modes;
39
0208d511
SM		 40 unsigned int bpc;
41
280921de
TR		 42 struct {
43 unsigned int width;
44 unsigned int height;
45 } size;
f673c37e
AK		 46
47 /**
48 * @prepare: the time (in milliseconds) that it takes for the panel to
49 * become ready and start receiving video data
50 * @enable: the time (in milliseconds) that it takes for the panel to
51 * display the first valid frame after starting to receive
52 * video data
53 * @disable: the time (in milliseconds) that it takes for the panel to
54 * turn the display off (no content is visible)
55 * @unprepare: the time (in milliseconds) that it takes for the panel
56 * to power itself down completely
57 */
58 struct {
59 unsigned int prepare;
60 unsigned int enable;
61 unsigned int disable;
62 unsigned int unprepare;
63 } delay;
280921de
TR		 64};
65
280921de
TR		 66struct panel_simple {
67 struct drm_panel base;
613a633e 68 bool prepared;
280921de
TR		 69 bool enabled;
70
71 const struct panel_desc *desc;
72
73 struct backlight_device *backlight;
74 struct regulator *supply;
75 struct i2c_adapter *ddc;
76
cfdf0549 77 struct gpio_desc *enable_gpio;
280921de
TR		 78};
79
80static inline struct panel_simple *to_panel_simple(struct drm_panel *panel)
81{
82 return container_of(panel, struct panel_simple, base);
83}
84
85static int panel_simple_get_fixed_modes(struct panel_simple *panel)
86{
87 struct drm_connector *connector = panel->base.connector;
88 struct drm_device *drm = panel->base.drm;
89 struct drm_display_mode *mode;
90 unsigned int i, num = 0;
91
92 if (!panel->desc)
93 return 0;
94
95 for (i = 0; i < panel->desc->num_modes; i++) {
96 const struct drm_display_mode *m = &panel->desc->modes[i];
97
98 mode = drm_mode_duplicate(drm, m);
99 if (!mode) {
100 dev_err(drm->dev, "failed to add mode %ux%u@%u\n",
101 m->hdisplay, m->vdisplay, m->vrefresh);
102 continue;
103 }
104
105 drm_mode_set_name(mode);
106
107 drm_mode_probed_add(connector, mode);
108 num++;
109 }
110
0208d511 111 connector->display_info.bpc = panel->desc->bpc;
280921de
TR		 112 connector->display_info.width_mm = panel->desc->size.width;
113 connector->display_info.height_mm = panel->desc->size.height;
114
115 return num;
116}
117
118static int panel_simple_disable(struct drm_panel *panel)
119{
120 struct panel_simple *p = to_panel_simple(panel);
121
122 if (!p->enabled)
123 return 0;
124
125 if (p->backlight) {
126 p->backlight->props.power = FB_BLANK_POWERDOWN;
127 backlight_update_status(p->backlight);
128 }
129
f673c37e
AK		 130 if (p->desc->delay.disable)
131 msleep(p->desc->delay.disable);
132
280921de
TR		 133 p->enabled = false;
134
135 return 0;
136}
137
c0e1d170
AK		 138static int panel_simple_unprepare(struct drm_panel *panel)
139{
613a633e
AK		 140 struct panel_simple *p = to_panel_simple(panel);
141
142 if (!p->prepared)
143 return 0;
144
145 if (p->enable_gpio)
146 gpiod_set_value_cansleep(p->enable_gpio, 0);
147
148 regulator_disable(p->supply);
149
f673c37e
AK		 150 if (p->desc->delay.unprepare)
151 msleep(p->desc->delay.unprepare);
152
613a633e 153 p->prepared = false;
c0e1d170 154
c0e1d170
AK		 155 return 0;
156}
157
613a633e 158static int panel_simple_prepare(struct drm_panel *panel)
280921de
TR		 159{
160 struct panel_simple *p = to_panel_simple(panel);
161 int err;
162
613a633e 163 if (p->prepared)
280921de
TR		 164 return 0;
165
166 err = regulator_enable(p->supply);
167 if (err < 0) {
168 dev_err(panel->dev, "failed to enable supply: %d\n", err);
169 return err;
170 }
171
cfdf0549 172 if (p->enable_gpio)
15c1a919 173 gpiod_set_value_cansleep(p->enable_gpio, 1);
280921de 174
f673c37e
AK		 175 if (p->desc->delay.prepare)
176 msleep(p->desc->delay.prepare);
177
613a633e
AK		 178 p->prepared = true;
179
180 return 0;
181}
182
183static int panel_simple_enable(struct drm_panel *panel)
184{
185 struct panel_simple *p = to_panel_simple(panel);
186
187 if (p->enabled)
188 return 0;
189
f673c37e
AK		 190 if (p->desc->delay.enable)
191 msleep(p->desc->delay.enable);
192
280921de
TR		 193 if (p->backlight) {
194 p->backlight->props.power = FB_BLANK_UNBLANK;
195 backlight_update_status(p->backlight);
196 }
197
198 p->enabled = true;
199
200 return 0;
201}
202
203static int panel_simple_get_modes(struct drm_panel *panel)
204{
205 struct panel_simple *p = to_panel_simple(panel);
206 int num = 0;
207
208 /* probe EDID if a DDC bus is available */
209 if (p->ddc) {
210 struct edid *edid = drm_get_edid(panel->connector, p->ddc);
70bf6878 211 drm_mode_connector_update_edid_property(panel->connector, edid);
280921de
TR		 212 if (edid) {
213 num += drm_add_edid_modes(panel->connector, edid);
214 kfree(edid);
215 }
216 }
217
218 /* add hard-coded panel modes */
219 num += panel_simple_get_fixed_modes(p);
220
221 return num;
222}
223
224static const struct drm_panel_funcs panel_simple_funcs = {
225 .disable = panel_simple_disable,
c0e1d170
AK		 226 .unprepare = panel_simple_unprepare,
227 .prepare = panel_simple_prepare,
280921de
TR		 228 .enable = panel_simple_enable,
229 .get_modes = panel_simple_get_modes,
230};
231
232static int panel_simple_probe(struct device *dev, const struct panel_desc *desc)
233{
234 struct device_node *backlight, *ddc;
235 struct panel_simple *panel;
280921de
TR		 236 int err;
237
238 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
239 if (!panel)
240 return -ENOMEM;
241
242 panel->enabled = false;
613a633e 243 panel->prepared = false;
280921de
TR		 244 panel->desc = desc;
245
246 panel->supply = devm_regulator_get(dev, "power");
247 if (IS_ERR(panel->supply))
248 return PTR_ERR(panel->supply);
249
a61400d8
AC		 250 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable",
251 GPIOD_OUT_LOW);
cfdf0549
AC		 252 if (IS_ERR(panel->enable_gpio)) {
253 err = PTR_ERR(panel->enable_gpio);
9746c619
AC		 254 dev_err(dev, "failed to request GPIO: %d\n", err);
255 return err;
256 }
280921de 257
280921de
TR		 258 backlight = of_parse_phandle(dev->of_node, "backlight", 0);
259 if (backlight) {
260 panel->backlight = of_find_backlight_by_node(backlight);
261 of_node_put(backlight);
262
cfdf0549
AC		 263 if (!panel->backlight)
264 return -EPROBE_DEFER;
280921de
TR		 265 }
266
267 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
268 if (ddc) {
269 panel->ddc = of_find_i2c_adapter_by_node(ddc);
270 of_node_put(ddc);
271
272 if (!panel->ddc) {
273 err = -EPROBE_DEFER;
274 goto free_backlight;
275 }
276 }
277
278 drm_panel_init(&panel->base);
279 panel->base.dev = dev;
280 panel->base.funcs = &panel_simple_funcs;
281
282 err = drm_panel_add(&panel->base);
283 if (err < 0)
284 goto free_ddc;
285
286 dev_set_drvdata(dev, panel);
287
288 return 0;
289
290free_ddc:
291 if (panel->ddc)
292 put_device(&panel->ddc->dev);
293free_backlight:
294 if (panel->backlight)
295 put_device(&panel->backlight->dev);
280921de
TR		 296
297 return err;
298}
299
300static int panel_simple_remove(struct device *dev)
301{
302 struct panel_simple *panel = dev_get_drvdata(dev);
303
304 drm_panel_detach(&panel->base);
305 drm_panel_remove(&panel->base);
306
307 panel_simple_disable(&panel->base);
308
309 if (panel->ddc)
310 put_device(&panel->ddc->dev);
311
312 if (panel->backlight)
313 put_device(&panel->backlight->dev);
314
280921de
TR		 315 return 0;
316}
317
d02fd93e
TR		 318static void panel_simple_shutdown(struct device *dev)
319{
320 struct panel_simple *panel = dev_get_drvdata(dev);
321
322 panel_simple_disable(&panel->base);
323}
324
280921de
TR		 325static const struct drm_display_mode auo_b101aw03_mode = {
326 .clock = 51450,
327 .hdisplay = 1024,
328 .hsync_start = 1024 + 156,
329 .hsync_end = 1024 + 156 + 8,
330 .htotal = 1024 + 156 + 8 + 156,
331 .vdisplay = 600,
332 .vsync_start = 600 + 16,
333 .vsync_end = 600 + 16 + 6,
334 .vtotal = 600 + 16 + 6 + 16,
335 .vrefresh = 60,
336};
337
338static const struct panel_desc auo_b101aw03 = {
339 .modes = &auo_b101aw03_mode,
340 .num_modes = 1,
0208d511 341 .bpc = 6,
280921de
TR		 342 .size = {
343 .width = 223,
344 .height = 125,
345 },
346};
347
dac746e0
RC		 348static const struct drm_display_mode auo_b101xtn01_mode = {
349 .clock = 72000,
350 .hdisplay = 1366,
351 .hsync_start = 1366 + 20,
352 .hsync_end = 1366 + 20 + 70,
353 .htotal = 1366 + 20 + 70,
354 .vdisplay = 768,
355 .vsync_start = 768 + 14,
356 .vsync_end = 768 + 14 + 42,
357 .vtotal = 768 + 14 + 42,
358 .vrefresh = 60,
359 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
360};
361
362static const struct panel_desc auo_b101xtn01 = {
363 .modes = &auo_b101xtn01_mode,
364 .num_modes = 1,
365 .bpc = 6,
366 .size = {
367 .width = 223,
368 .height = 125,
369 },
370};
371
e35e305e
AK		 372static const struct drm_display_mode auo_b116xw03_mode = {
373 .clock = 70589,
374 .hdisplay = 1366,
375 .hsync_start = 1366 + 40,
376 .hsync_end = 1366 + 40 + 40,
377 .htotal = 1366 + 40 + 40 + 32,
378 .vdisplay = 768,
379 .vsync_start = 768 + 10,
380 .vsync_end = 768 + 10 + 12,
381 .vtotal = 768 + 10 + 12 + 6,
382 .vrefresh = 60,
383};
384
385static const struct panel_desc auo_b116xw03 = {
386 .modes = &auo_b116xw03_mode,
387 .num_modes = 1,
388 .bpc = 6,
389 .size = {
390 .width = 256,
391 .height = 144,
392 },
393};
394
a333f7ad
SM		 395static const struct drm_display_mode auo_b133xtn01_mode = {
396 .clock = 69500,
397 .hdisplay = 1366,
398 .hsync_start = 1366 + 48,
399 .hsync_end = 1366 + 48 + 32,
400 .htotal = 1366 + 48 + 32 + 20,
401 .vdisplay = 768,
402 .vsync_start = 768 + 3,
403 .vsync_end = 768 + 3 + 6,
404 .vtotal = 768 + 3 + 6 + 13,
405 .vrefresh = 60,
406};
407
408static const struct panel_desc auo_b133xtn01 = {
409 .modes = &auo_b133xtn01_mode,
410 .num_modes = 1,
0208d511 411 .bpc = 6,
a333f7ad
SM		 412 .size = {
413 .width = 293,
414 .height = 165,
415 },
416};
417
3e51d609
AK		 418static const struct drm_display_mode auo_b133htn01_mode = {
419 .clock = 150660,
420 .hdisplay = 1920,
421 .hsync_start = 1920 + 172,
422 .hsync_end = 1920 + 172 + 80,
423 .htotal = 1920 + 172 + 80 + 60,
424 .vdisplay = 1080,
425 .vsync_start = 1080 + 25,
426 .vsync_end = 1080 + 25 + 10,
427 .vtotal = 1080 + 25 + 10 + 10,
428 .vrefresh = 60,
429};
430
431static const struct panel_desc auo_b133htn01 = {
432 .modes = &auo_b133htn01_mode,
433 .num_modes = 1,
d7a839cd 434 .bpc = 6,
3e51d609
AK		 435 .size = {
436 .width = 293,
437 .height = 165,
438 },
439 .delay = {
440 .prepare = 105,
441 .enable = 20,
442 .unprepare = 50,
443 },
444};
445
4c930757
SW		 446static const struct drm_display_mode chunghwa_claa101wa01a_mode = {
447 .clock = 72070,
448 .hdisplay = 1366,
449 .hsync_start = 1366 + 58,
450 .hsync_end = 1366 + 58 + 58,
451 .htotal = 1366 + 58 + 58 + 58,
452 .vdisplay = 768,
453 .vsync_start = 768 + 4,
454 .vsync_end = 768 + 4 + 4,
455 .vtotal = 768 + 4 + 4 + 4,
456 .vrefresh = 60,
457};
458
459static const struct panel_desc chunghwa_claa101wa01a = {
460 .modes = &chunghwa_claa101wa01a_mode,
461 .num_modes = 1,
0208d511 462 .bpc = 6,
4c930757
SW		 463 .size = {
464 .width = 220,
465 .height = 120,
466 },
467};
468
280921de
TR		 469static const struct drm_display_mode chunghwa_claa101wb01_mode = {
470 .clock = 69300,
471 .hdisplay = 1366,
472 .hsync_start = 1366 + 48,
473 .hsync_end = 1366 + 48 + 32,
474 .htotal = 1366 + 48 + 32 + 20,
475 .vdisplay = 768,
476 .vsync_start = 768 + 16,
477 .vsync_end = 768 + 16 + 8,
478 .vtotal = 768 + 16 + 8 + 16,
479 .vrefresh = 60,
480};
481
482static const struct panel_desc chunghwa_claa101wb01 = {
483 .modes = &chunghwa_claa101wb01_mode,
484 .num_modes = 1,
0208d511 485 .bpc = 6,
280921de
TR		 486 .size = {
487 .width = 223,
488 .height = 125,
489 },
490};
491
26ab0065
SA		 492static const struct drm_display_mode edt_et057090dhu_mode = {
493 .clock = 25175,
494 .hdisplay = 640,
495 .hsync_start = 640 + 16,
496 .hsync_end = 640 + 16 + 30,
497 .htotal = 640 + 16 + 30 + 114,
498 .vdisplay = 480,
499 .vsync_start = 480 + 10,
500 .vsync_end = 480 + 10 + 3,
501 .vtotal = 480 + 10 + 3 + 32,
502 .vrefresh = 60,
503 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
504};
505
506static const struct panel_desc edt_et057090dhu = {
507 .modes = &edt_et057090dhu_mode,
508 .num_modes = 1,
0208d511 509 .bpc = 6,
26ab0065
SA		 510 .size = {
511 .width = 115,
512 .height = 86,
513 },
514};
515
fff5de45
PZ		 516static const struct drm_display_mode edt_etm0700g0dh6_mode = {
517 .clock = 33260,
518 .hdisplay = 800,
519 .hsync_start = 800 + 40,
520 .hsync_end = 800 + 40 + 128,
521 .htotal = 800 + 40 + 128 + 88,
522 .vdisplay = 480,
523 .vsync_start = 480 + 10,
524 .vsync_end = 480 + 10 + 2,
525 .vtotal = 480 + 10 + 2 + 33,
526 .vrefresh = 60,
527 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
528};
529
530static const struct panel_desc edt_etm0700g0dh6 = {
531 .modes = &edt_etm0700g0dh6_mode,
532 .num_modes = 1,
0208d511 533 .bpc = 6,
fff5de45
PZ		 534 .size = {
535 .width = 152,
536 .height = 91,
537 },
538};
539
102932b0
BB		 540static const struct drm_display_mode foxlink_fl500wvr00_a0t_mode = {
541 .clock = 32260,
542 .hdisplay = 800,
543 .hsync_start = 800 + 168,
544 .hsync_end = 800 + 168 + 64,
545 .htotal = 800 + 168 + 64 + 88,
546 .vdisplay = 480,
547 .vsync_start = 480 + 37,
548 .vsync_end = 480 + 37 + 2,
549 .vtotal = 480 + 37 + 2 + 8,
550 .vrefresh = 60,
551};
552
553static const struct panel_desc foxlink_fl500wvr00_a0t = {
554 .modes = &foxlink_fl500wvr00_a0t_mode,
555 .num_modes = 1,
d7a839cd 556 .bpc = 8,
102932b0
BB		 557 .size = {
558 .width = 108,
559 .height = 65,
560 },
561};
562
a853205e
PZ		 563static const struct drm_display_mode hannstar_hsd070pww1_mode = {
564 .clock = 71100,
565 .hdisplay = 1280,
566 .hsync_start = 1280 + 1,
567 .hsync_end = 1280 + 1 + 158,
568 .htotal = 1280 + 1 + 158 + 1,
569 .vdisplay = 800,
570 .vsync_start = 800 + 1,
571 .vsync_end = 800 + 1 + 21,
572 .vtotal = 800 + 1 + 21 + 1,
573 .vrefresh = 60,
574};
575
576static const struct panel_desc hannstar_hsd070pww1 = {
577 .modes = &hannstar_hsd070pww1_mode,
578 .num_modes = 1,
579 .bpc = 6,
580 .size = {
581 .width = 151,
582 .height = 94,
583 },
584};
585
61ac0bf8
LS		 586static const struct drm_display_mode hitachi_tx23d38vm0caa_mode = {
587 .clock = 33333,
588 .hdisplay = 800,
589 .hsync_start = 800 + 85,
590 .hsync_end = 800 + 85 + 86,
591 .htotal = 800 + 85 + 86 + 85,
592 .vdisplay = 480,
593 .vsync_start = 480 + 16,
594 .vsync_end = 480 + 16 + 13,
595 .vtotal = 480 + 16 + 13 + 16,
596 .vrefresh = 60,
597};
598
599static const struct panel_desc hitachi_tx23d38vm0caa = {
600 .modes = &hitachi_tx23d38vm0caa_mode,
601 .num_modes = 1,
602 .bpc = 6,
603 .size = {
604 .width = 195,
605 .height = 117,
606 },
607};
608
d731f661
LS		 609static const struct drm_display_mode innolux_g121i1_l01_mode = {
610 .clock = 71000,
611 .hdisplay = 1280,
612 .hsync_start = 1280 + 64,
613 .hsync_end = 1280 + 64 + 32,
614 .htotal = 1280 + 64 + 32 + 64,
615 .vdisplay = 800,
616 .vsync_start = 800 + 9,
617 .vsync_end = 800 + 9 + 6,
618 .vtotal = 800 + 9 + 6 + 9,
619 .vrefresh = 60,
620};
621
622static const struct panel_desc innolux_g121i1_l01 = {
623 .modes = &innolux_g121i1_l01_mode,
624 .num_modes = 1,
625 .bpc = 6,
626 .size = {
627 .width = 261,
628 .height = 163,
629 },
630};
631
0a2288c0
TR		 632static const struct drm_display_mode innolux_n116bge_mode = {
633 .clock = 71000,
634 .hdisplay = 1366,
635 .hsync_start = 1366 + 64,
636 .hsync_end = 1366 + 64 + 6,
637 .htotal = 1366 + 64 + 6 + 64,
638 .vdisplay = 768,
639 .vsync_start = 768 + 8,
640 .vsync_end = 768 + 8 + 4,
641 .vtotal = 768 + 8 + 4 + 8,
642 .vrefresh = 60,
643 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
644};
645
646static const struct panel_desc innolux_n116bge = {
647 .modes = &innolux_n116bge_mode,
648 .num_modes = 1,
649 .bpc = 6,
650 .size = {
651 .width = 256,
652 .height = 144,
653 },
654};
655
ea44739d
AB		 656static const struct drm_display_mode innolux_n156bge_l21_mode = {
657 .clock = 69300,
658 .hdisplay = 1366,
659 .hsync_start = 1366 + 16,
660 .hsync_end = 1366 + 16 + 34,
661 .htotal = 1366 + 16 + 34 + 50,
662 .vdisplay = 768,
663 .vsync_start = 768 + 2,
664 .vsync_end = 768 + 2 + 6,
665 .vtotal = 768 + 2 + 6 + 12,
666 .vrefresh = 60,
667};
668
669static const struct panel_desc innolux_n156bge_l21 = {
670 .modes = &innolux_n156bge_l21_mode,
671 .num_modes = 1,
0208d511 672 .bpc = 6,
ea44739d
AB		 673 .size = {
674 .width = 344,
675 .height = 193,
676 },
677};
678
ec7c5653
TR		 679static const struct drm_display_mode lg_lp129qe_mode = {
680 .clock = 285250,
681 .hdisplay = 2560,
682 .hsync_start = 2560 + 48,
683 .hsync_end = 2560 + 48 + 32,
684 .htotal = 2560 + 48 + 32 + 80,
685 .vdisplay = 1700,
686 .vsync_start = 1700 + 3,
687 .vsync_end = 1700 + 3 + 10,
688 .vtotal = 1700 + 3 + 10 + 36,
689 .vrefresh = 60,
690};
691
692static const struct panel_desc lg_lp129qe = {
693 .modes = &lg_lp129qe_mode,
694 .num_modes = 1,
0208d511 695 .bpc = 8,
ec7c5653
TR		 696 .size = {
697 .width = 272,
698 .height = 181,
699 },
700};
701
6d54e3d2
MD		 702static const struct drm_display_mode samsung_ltn101nt05_mode = {
703 .clock = 54030,
704 .hdisplay = 1024,
705 .hsync_start = 1024 + 24,
706 .hsync_end = 1024 + 24 + 136,
707 .htotal = 1024 + 24 + 136 + 160,
708 .vdisplay = 600,
709 .vsync_start = 600 + 3,
710 .vsync_end = 600 + 3 + 6,
711 .vtotal = 600 + 3 + 6 + 61,
712 .vrefresh = 60,
713};
714
715static const struct panel_desc samsung_ltn101nt05 = {
716 .modes = &samsung_ltn101nt05_mode,
717 .num_modes = 1,
0208d511 718 .bpc = 6,
6d54e3d2
MD		 719 .size = {
720 .width = 1024,
721 .height = 600,
722 },
723};
724
280921de
TR		 725static const struct of_device_id platform_of_match[] = {
726 {
727 .compatible = "auo,b101aw03",
728 .data = &auo_b101aw03,
dac746e0
RC		 729 }, {
730 .compatible = "auo,b101xtn01",
731 .data = &auo_b101xtn01,
e35e305e
AK		 732 }, {
733 .compatible = "auo,b116xw03",
734 .data = &auo_b116xw03,
3e51d609
AK		 735 }, {
736 .compatible = "auo,b133htn01",
737 .data = &auo_b133htn01,
a333f7ad
SM		 738 }, {
739 .compatible = "auo,b133xtn01",
740 .data = &auo_b133xtn01,
4c930757
SW		 741 }, {
742 .compatible = "chunghwa,claa101wa01a",
743 .data = &chunghwa_claa101wa01a
280921de
TR		 744 }, {
745 .compatible = "chunghwa,claa101wb01",
746 .data = &chunghwa_claa101wb01
26ab0065
SA		 747 }, {
748 .compatible = "edt,et057090dhu",
749 .data = &edt_et057090dhu,
fff5de45
PZ		 750 }, {
751 .compatible = "edt,et070080dh6",
752 .data = &edt_etm0700g0dh6,
753 }, {
754 .compatible = "edt,etm0700g0dh6",
755 .data = &edt_etm0700g0dh6,
102932b0
BB		 756 }, {
757 .compatible = "foxlink,fl500wvr00-a0t",
758 .data = &foxlink_fl500wvr00_a0t,
a853205e
PZ		 759 }, {
760 .compatible = "hannstar,hsd070pww1",
761 .data = &hannstar_hsd070pww1,
61ac0bf8
LS		 762 }, {
763 .compatible = "hit,tx23d38vm0caa",
764 .data = &hitachi_tx23d38vm0caa
d731f661
LS		 765 }, {
766 .compatible ="innolux,g121i1-l01",
767 .data = &innolux_g121i1_l01
0a2288c0
TR		 768 }, {
769 .compatible = "innolux,n116bge",
770 .data = &innolux_n116bge,
ea44739d
AB		 771 }, {
772 .compatible = "innolux,n156bge-l21",
773 .data = &innolux_n156bge_l21,
ec7c5653
TR		 774 }, {
775 .compatible = "lg,lp129qe",
776 .data = &lg_lp129qe,
6d54e3d2
MD		 777 }, {
778 .compatible = "samsung,ltn101nt05",
779 .data = &samsung_ltn101nt05,
280921de
TR		 780 }, {
781 /* sentinel */
782 }
783};
784MODULE_DEVICE_TABLE(of, platform_of_match);
785
786static int panel_simple_platform_probe(struct platform_device *pdev)
787{
788 const struct of_device_id *id;
789
790 id = of_match_node(platform_of_match, pdev->dev.of_node);
791 if (!id)
792 return -ENODEV;
793
794 return panel_simple_probe(&pdev->dev, id->data);
795}
796
797static int panel_simple_platform_remove(struct platform_device *pdev)
798{
799 return panel_simple_remove(&pdev->dev);
800}
801
d02fd93e
TR		 802static void panel_simple_platform_shutdown(struct platform_device *pdev)
803{
804 panel_simple_shutdown(&pdev->dev);
805}
806
280921de
TR		 807static struct platform_driver panel_simple_platform_driver = {
808 .driver = {
809 .name = "panel-simple",
810 .owner = THIS_MODULE,
811 .of_match_table = platform_of_match,
812 },
813 .probe = panel_simple_platform_probe,
814 .remove = panel_simple_platform_remove,
d02fd93e 815 .shutdown = panel_simple_platform_shutdown,
280921de
TR		 816};
817
210fcd9d
TR		 818struct panel_desc_dsi {
819 struct panel_desc desc;
820
462658b8 821 unsigned long flags;
210fcd9d
TR		 822 enum mipi_dsi_pixel_format format;
823 unsigned int lanes;
824};
825
712ac1ba
AC		 826static const struct drm_display_mode lg_ld070wx3_sl01_mode = {
827 .clock = 71000,
828 .hdisplay = 800,
829 .hsync_start = 800 + 32,
830 .hsync_end = 800 + 32 + 1,
831 .htotal = 800 + 32 + 1 + 57,
832 .vdisplay = 1280,
833 .vsync_start = 1280 + 28,
834 .vsync_end = 1280 + 28 + 1,
835 .vtotal = 1280 + 28 + 1 + 14,
836 .vrefresh = 60,
837};
838
839static const struct panel_desc_dsi lg_ld070wx3_sl01 = {
840 .desc = {
841 .modes = &lg_ld070wx3_sl01_mode,
842 .num_modes = 1,
d7a839cd 843 .bpc = 8,
712ac1ba
AC		 844 .size = {
845 .width = 94,
846 .height = 151,
847 },
848 },
5e4cc278 849 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_CLOCK_NON_CONTINUOUS,
712ac1ba
AC		 850 .format = MIPI_DSI_FMT_RGB888,
851 .lanes = 4,
852};
853
499ce85a
AC		 854static const struct drm_display_mode lg_lh500wx1_sd03_mode = {
855 .clock = 67000,
856 .hdisplay = 720,
857 .hsync_start = 720 + 12,
858 .hsync_end = 720 + 12 + 4,
859 .htotal = 720 + 12 + 4 + 112,
860 .vdisplay = 1280,
861 .vsync_start = 1280 + 8,
862 .vsync_end = 1280 + 8 + 4,
863 .vtotal = 1280 + 8 + 4 + 12,
864 .vrefresh = 60,
865};
866
867static const struct panel_desc_dsi lg_lh500wx1_sd03 = {
868 .desc = {
869 .modes = &lg_lh500wx1_sd03_mode,
870 .num_modes = 1,
d7a839cd 871 .bpc = 8,
499ce85a
AC		 872 .size = {
873 .width = 62,
874 .height = 110,
875 },
876 },
877 .flags = MIPI_DSI_MODE_VIDEO,
878 .format = MIPI_DSI_FMT_RGB888,
879 .lanes = 4,
880};
881
280921de
TR		 882static const struct drm_display_mode panasonic_vvx10f004b00_mode = {
883 .clock = 157200,
884 .hdisplay = 1920,
885 .hsync_start = 1920 + 154,
886 .hsync_end = 1920 + 154 + 16,
887 .htotal = 1920 + 154 + 16 + 32,
888 .vdisplay = 1200,
889 .vsync_start = 1200 + 17,
890 .vsync_end = 1200 + 17 + 2,
891 .vtotal = 1200 + 17 + 2 + 16,
892 .vrefresh = 60,
893};
894
210fcd9d
TR		 895static const struct panel_desc_dsi panasonic_vvx10f004b00 = {
896 .desc = {
897 .modes = &panasonic_vvx10f004b00_mode,
898 .num_modes = 1,
d7a839cd 899 .bpc = 8,
210fcd9d
TR		 900 .size = {
901 .width = 217,
902 .height = 136,
903 },
280921de 904 },
5e4cc278
AC		 905 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE |
906 MIPI_DSI_CLOCK_NON_CONTINUOUS,
210fcd9d
TR		 907 .format = MIPI_DSI_FMT_RGB888,
908 .lanes = 4,
909};
910
911static const struct of_device_id dsi_of_match[] = {
912 {
712ac1ba
AC		 913 .compatible = "lg,ld070wx3-sl01",
914 .data = &lg_ld070wx3_sl01
915 }, {
499ce85a
AC		 916 .compatible = "lg,lh500wx1-sd03",
917 .data = &lg_lh500wx1_sd03
918 }, {
210fcd9d
TR		 919 .compatible = "panasonic,vvx10f004b00",
920 .data = &panasonic_vvx10f004b00
921 }, {
922 /* sentinel */
923 }
924};
925MODULE_DEVICE_TABLE(of, dsi_of_match);
926
927static int panel_simple_dsi_probe(struct mipi_dsi_device *dsi)
928{
929 const struct panel_desc_dsi *desc;
930 const struct of_device_id *id;
931 int err;
932
933 id = of_match_node(dsi_of_match, dsi->dev.of_node);
934 if (!id)
935 return -ENODEV;
936
937 desc = id->data;
938
939 err = panel_simple_probe(&dsi->dev, &desc->desc);
940 if (err < 0)
941 return err;
942
462658b8 943 dsi->mode_flags = desc->flags;
210fcd9d
TR		 944 dsi->format = desc->format;
945 dsi->lanes = desc->lanes;
946
947 return mipi_dsi_attach(dsi);
948}
949
950static int panel_simple_dsi_remove(struct mipi_dsi_device *dsi)
951{
952 int err;
953
954 err = mipi_dsi_detach(dsi);
955 if (err < 0)
956 dev_err(&dsi->dev, "failed to detach from DSI host: %d\n", err);
957
958 return panel_simple_remove(&dsi->dev);
959}
960
d02fd93e
TR		 961static void panel_simple_dsi_shutdown(struct mipi_dsi_device *dsi)
962{
963 panel_simple_shutdown(&dsi->dev);
964}
965
210fcd9d
TR		 966static struct mipi_dsi_driver panel_simple_dsi_driver = {
967 .driver = {
968 .name = "panel-simple-dsi",
969 .owner = THIS_MODULE,
970 .of_match_table = dsi_of_match,
971 },
972 .probe = panel_simple_dsi_probe,
973 .remove = panel_simple_dsi_remove,
d02fd93e 974 .shutdown = panel_simple_dsi_shutdown,
280921de
TR		 975};
976
977static int __init panel_simple_init(void)
978{
210fcd9d
TR		 979 int err;
980
981 err = platform_driver_register(&panel_simple_platform_driver);
982 if (err < 0)
983 return err;
984
985 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI)) {
986 err = mipi_dsi_driver_register(&panel_simple_dsi_driver);
987 if (err < 0)
988 return err;
989 }
990
991 return 0;
280921de
TR		 992}
993module_init(panel_simple_init);
994
995static void __exit panel_simple_exit(void)
996{
210fcd9d
TR		 997 if (IS_ENABLED(CONFIG_DRM_MIPI_DSI))
998 mipi_dsi_driver_unregister(&panel_simple_dsi_driver);
999
280921de
TR		 1000 platform_driver_unregister(&panel_simple_platform_driver);
1001}
1002module_exit(panel_simple_exit);
1003
1004MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
1005MODULE_DESCRIPTION("DRM Driver for Simple Panels");
1006MODULE_LICENSE("GPL and additional rights");
Linux 6.x block layer and io_uring tree(s)