Merge branches 'pm-devfreq', 'pm-qos', 'pm-tools' and 'pm-docs'
[linux-2.6-block.git] / drivers / gpu / drm / panel / panel-edp.c
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1/*
2 * Copyright (C) 2013, NVIDIA Corporation. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
6ed19359 24#include <linux/debugfs.h>
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25#include <linux/delay.h>
26#include <linux/gpio/consumer.h>
27#include <linux/iopoll.h>
28#include <linux/module.h>
29#include <linux/of_platform.h>
30#include <linux/platform_device.h>
31#include <linux/pm_runtime.h>
32#include <linux/regulator/consumer.h>
33
34#include <video/display_timing.h>
35#include <video/of_display_timing.h>
36#include <video/videomode.h>
37
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38#include <drm/display/drm_dp_aux_bus.h>
39#include <drm/display/drm_dp_helper.h>
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40#include <drm/drm_crtc.h>
41#include <drm/drm_device.h>
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42#include <drm/drm_panel.h>
43
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44/**
45 * struct panel_delay - Describes delays for a simple panel.
46 */
47struct panel_delay {
48 /**
52824ca4 49 * @hpd_reliable: Time for HPD to be reliable
9ea10a50 50 *
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51 * The time (in milliseconds) that it takes after powering the panel
52 * before the HPD signal is reliable. Ideally this is 0 but some panels,
53 * board designs, or bad pulldown configs can cause a glitch here.
54 *
55 * NOTE: on some old panel data this number appers to be much too big.
56 * Presumably some old panels simply didn't have HPD hooked up and put
57 * the hpd_absent here because this field predates the
58 * hpd_absent. While that works, it's non-ideal.
9ea10a50 59 */
52824ca4 60 unsigned int hpd_reliable;
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61
62 /**
52824ca4 63 * @hpd_absent: Time to wait if HPD isn't hooked up.
9ea10a50 64 *
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65 * Add this to the prepare delay if we know Hot Plug Detect isn't used.
66 *
67 * This is T3-max on eDP timing diagrams or the delay from power on
68 * until HPD is guaranteed to be asserted.
9ea10a50 69 */
52824ca4 70 unsigned int hpd_absent;
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71
72 /**
73 * @prepare_to_enable: Time between prepare and enable.
74 *
75 * The minimum time, in milliseconds, that needs to have passed
76 * between when prepare finished and enable may begin. If at
77 * enable time less time has passed since prepare finished,
78 * the driver waits for the remaining time.
79 *
80 * If a fixed enable delay is also specified, we'll start
81 * counting before delaying for the fixed delay.
82 *
83 * If a fixed prepare delay is also specified, we won't start
84 * counting until after the fixed delay. We can't overlap this
85 * fixed delay with the min time because the fixed delay
86 * doesn't happen at the end of the function if a HPD GPIO was
87 * specified.
88 *
89 * In other words:
90 * prepare()
91 * ...
92 * // do fixed prepare delay
93 * // wait for HPD GPIO if applicable
94 * // start counting for prepare_to_enable
95 *
96 * enable()
97 * // do fixed enable delay
98 * // enforce prepare_to_enable min time
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99 *
100 * This is not specified in a standard way on eDP timing diagrams.
101 * It is effectively the time from HPD going high till you can
102 * turn on the backlight.
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103 */
104 unsigned int prepare_to_enable;
105
106 /**
107 * @enable: Time for the panel to display a valid frame.
108 *
109 * The time (in milliseconds) that it takes for the panel to
110 * display the first valid frame after starting to receive
111 * video data.
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112 *
113 * This is (T6-min + max(T7-max, T8-min)) on eDP timing diagrams or
114 * the delay after link training finishes until we can turn the
115 * backlight on and see valid data.
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116 */
117 unsigned int enable;
118
119 /**
120 * @disable: Time for the panel to turn the display off.
121 *
122 * The time (in milliseconds) that it takes for the panel to
123 * turn the display off (no content is visible).
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124 *
125 * This is T9-min (delay from backlight off to end of valid video
126 * data) on eDP timing diagrams. It is not common to set.
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127 */
128 unsigned int disable;
129
130 /**
131 * @unprepare: Time to power down completely.
132 *
133 * The time (in milliseconds) that it takes for the panel
134 * to power itself down completely.
135 *
136 * This time is used to prevent a future "prepare" from
137 * starting until at least this many milliseconds has passed.
138 * If at prepare time less time has passed since unprepare
139 * finished, the driver waits for the remaining time.
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140 *
141 * This is T12-min on eDP timing diagrams.
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142 */
143 unsigned int unprepare;
144};
145
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146/**
147 * struct panel_desc - Describes a simple panel.
148 */
149struct panel_desc {
150 /**
151 * @modes: Pointer to array of fixed modes appropriate for this panel.
152 *
153 * If only one mode then this can just be the address of the mode.
154 * NOTE: cannot be used with "timings" and also if this is specified
155 * then you cannot override the mode in the device tree.
156 */
157 const struct drm_display_mode *modes;
158
159 /** @num_modes: Number of elements in modes array. */
160 unsigned int num_modes;
161
162 /**
163 * @timings: Pointer to array of display timings
164 *
165 * NOTE: cannot be used with "modes" and also these will be used to
166 * validate a device tree override if one is present.
167 */
168 const struct display_timing *timings;
169
170 /** @num_timings: Number of elements in timings array. */
171 unsigned int num_timings;
172
173 /** @bpc: Bits per color. */
174 unsigned int bpc;
175
176 /** @size: Structure containing the physical size of this panel. */
177 struct {
178 /**
179 * @size.width: Width (in mm) of the active display area.
180 */
181 unsigned int width;
182
183 /**
184 * @size.height: Height (in mm) of the active display area.
185 */
186 unsigned int height;
187 } size;
188
189 /** @delay: Structure containing various delay values for this panel. */
9ea10a50 190 struct panel_delay delay;
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191};
192
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193/**
194 * struct edp_panel_entry - Maps panel ID to delay / panel name.
195 */
196struct edp_panel_entry {
197 /** @panel_id: 32-bit ID for panel, encoded with drm_edid_encode_panel_id(). */
198 u32 panel_id;
199
1e66f04c 200 /** @delay: The power sequencing delays needed for this panel. */
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201 const struct panel_delay *delay;
202
1e66f04c 203 /** @name: Name of this panel (for printing to logs). */
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204 const char *name;
205};
206
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207struct panel_edp {
208 struct drm_panel base;
209 bool enabled;
210 bool no_hpd;
211
212 bool prepared;
213
214 ktime_t prepared_time;
215 ktime_t unprepared_time;
216
217 const struct panel_desc *desc;
218
219 struct regulator *supply;
220 struct i2c_adapter *ddc;
221 struct drm_dp_aux *aux;
222
223 struct gpio_desc *enable_gpio;
224 struct gpio_desc *hpd_gpio;
225
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226 const struct edp_panel_entry *detected_panel;
227
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228 struct edid *edid;
229
230 struct drm_display_mode override_mode;
231
232 enum drm_panel_orientation orientation;
233};
234
235static inline struct panel_edp *to_panel_edp(struct drm_panel *panel)
236{
237 return container_of(panel, struct panel_edp, base);
238}
239
240static unsigned int panel_edp_get_timings_modes(struct panel_edp *panel,
241 struct drm_connector *connector)
242{
243 struct drm_display_mode *mode;
244 unsigned int i, num = 0;
245
246 for (i = 0; i < panel->desc->num_timings; i++) {
247 const struct display_timing *dt = &panel->desc->timings[i];
248 struct videomode vm;
249
250 videomode_from_timing(dt, &vm);
251 mode = drm_mode_create(connector->dev);
252 if (!mode) {
253 dev_err(panel->base.dev, "failed to add mode %ux%u\n",
254 dt->hactive.typ, dt->vactive.typ);
255 continue;
256 }
257
258 drm_display_mode_from_videomode(&vm, mode);
259
260 mode->type |= DRM_MODE_TYPE_DRIVER;
261
262 if (panel->desc->num_timings == 1)
263 mode->type |= DRM_MODE_TYPE_PREFERRED;
264
265 drm_mode_probed_add(connector, mode);
266 num++;
267 }
268
269 return num;
270}
271
272static unsigned int panel_edp_get_display_modes(struct panel_edp *panel,
273 struct drm_connector *connector)
274{
275 struct drm_display_mode *mode;
276 unsigned int i, num = 0;
277
278 for (i = 0; i < panel->desc->num_modes; i++) {
279 const struct drm_display_mode *m = &panel->desc->modes[i];
280
281 mode = drm_mode_duplicate(connector->dev, m);
282 if (!mode) {
283 dev_err(panel->base.dev, "failed to add mode %ux%u@%u\n",
284 m->hdisplay, m->vdisplay,
285 drm_mode_vrefresh(m));
286 continue;
287 }
288
289 mode->type |= DRM_MODE_TYPE_DRIVER;
290
291 if (panel->desc->num_modes == 1)
292 mode->type |= DRM_MODE_TYPE_PREFERRED;
293
294 drm_mode_set_name(mode);
295
296 drm_mode_probed_add(connector, mode);
297 num++;
298 }
299
300 return num;
301}
302
303static int panel_edp_get_non_edid_modes(struct panel_edp *panel,
304 struct drm_connector *connector)
305{
306 struct drm_display_mode *mode;
307 bool has_override = panel->override_mode.type;
308 unsigned int num = 0;
309
310 if (!panel->desc)
311 return 0;
312
313 if (has_override) {
314 mode = drm_mode_duplicate(connector->dev,
315 &panel->override_mode);
316 if (mode) {
317 drm_mode_probed_add(connector, mode);
318 num = 1;
319 } else {
320 dev_err(panel->base.dev, "failed to add override mode\n");
321 }
322 }
323
324 /* Only add timings if override was not there or failed to validate */
325 if (num == 0 && panel->desc->num_timings)
326 num = panel_edp_get_timings_modes(panel, connector);
327
328 /*
329 * Only add fixed modes if timings/override added no mode.
330 *
331 * We should only ever have either the display timings specified
332 * or a fixed mode. Anything else is rather bogus.
333 */
334 WARN_ON(panel->desc->num_timings && panel->desc->num_modes);
335 if (num == 0)
336 num = panel_edp_get_display_modes(panel, connector);
337
338 connector->display_info.bpc = panel->desc->bpc;
339 connector->display_info.width_mm = panel->desc->size.width;
340 connector->display_info.height_mm = panel->desc->size.height;
341
342 return num;
343}
344
345static void panel_edp_wait(ktime_t start_ktime, unsigned int min_ms)
346{
347 ktime_t now_ktime, min_ktime;
348
349 if (!min_ms)
350 return;
351
352 min_ktime = ktime_add(start_ktime, ms_to_ktime(min_ms));
353 now_ktime = ktime_get();
354
355 if (ktime_before(now_ktime, min_ktime))
356 msleep(ktime_to_ms(ktime_sub(min_ktime, now_ktime)) + 1);
357}
358
359static int panel_edp_disable(struct drm_panel *panel)
360{
361 struct panel_edp *p = to_panel_edp(panel);
362
363 if (!p->enabled)
364 return 0;
365
366 if (p->desc->delay.disable)
367 msleep(p->desc->delay.disable);
368
369 p->enabled = false;
370
371 return 0;
372}
373
374static int panel_edp_suspend(struct device *dev)
375{
376 struct panel_edp *p = dev_get_drvdata(dev);
377
378 gpiod_set_value_cansleep(p->enable_gpio, 0);
379 regulator_disable(p->supply);
380 p->unprepared_time = ktime_get();
381
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382 return 0;
383}
384
385static int panel_edp_unprepare(struct drm_panel *panel)
386{
387 struct panel_edp *p = to_panel_edp(panel);
388 int ret;
389
390 /* Unpreparing when already unprepared is a no-op */
391 if (!p->prepared)
392 return 0;
393
394 pm_runtime_mark_last_busy(panel->dev);
395 ret = pm_runtime_put_autosuspend(panel->dev);
396 if (ret < 0)
397 return ret;
398 p->prepared = false;
399
400 return 0;
401}
402
403static int panel_edp_get_hpd_gpio(struct device *dev, struct panel_edp *p)
404{
405 int err;
406
407 p->hpd_gpio = devm_gpiod_get_optional(dev, "hpd", GPIOD_IN);
408 if (IS_ERR(p->hpd_gpio)) {
409 err = PTR_ERR(p->hpd_gpio);
410
411 if (err != -EPROBE_DEFER)
412 dev_err(dev, "failed to get 'hpd' GPIO: %d\n", err);
413
414 return err;
415 }
416
417 return 0;
418}
419
420static int panel_edp_prepare_once(struct panel_edp *p)
421{
422 struct device *dev = p->base.dev;
423 unsigned int delay;
424 int err;
425 int hpd_asserted;
426 unsigned long hpd_wait_us;
427
428 panel_edp_wait(p->unprepared_time, p->desc->delay.unprepare);
429
430 err = regulator_enable(p->supply);
431 if (err < 0) {
432 dev_err(dev, "failed to enable supply: %d\n", err);
433 return err;
434 }
435
436 gpiod_set_value_cansleep(p->enable_gpio, 1);
437
52824ca4 438 delay = p->desc->delay.hpd_reliable;
5f04e7ce 439 if (p->no_hpd)
c46a4cc1 440 delay = max(delay, p->desc->delay.hpd_absent);
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441 if (delay)
442 msleep(delay);
443
444 if (p->hpd_gpio) {
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445 if (p->desc->delay.hpd_absent)
446 hpd_wait_us = p->desc->delay.hpd_absent * 1000UL;
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447 else
448 hpd_wait_us = 2000000;
449
450 err = readx_poll_timeout(gpiod_get_value_cansleep, p->hpd_gpio,
451 hpd_asserted, hpd_asserted,
452 1000, hpd_wait_us);
453 if (hpd_asserted < 0)
454 err = hpd_asserted;
455
456 if (err) {
457 if (err != -ETIMEDOUT)
458 dev_err(dev,
459 "error waiting for hpd GPIO: %d\n", err);
460 goto error;
461 }
462 }
463
464 p->prepared_time = ktime_get();
465
466 return 0;
467
468error:
469 gpiod_set_value_cansleep(p->enable_gpio, 0);
470 regulator_disable(p->supply);
471 p->unprepared_time = ktime_get();
472
473 return err;
474}
475
476/*
477 * Some panels simply don't always come up and need to be power cycled to
478 * work properly. We'll allow for a handful of retries.
479 */
480#define MAX_PANEL_PREPARE_TRIES 5
481
482static int panel_edp_resume(struct device *dev)
483{
484 struct panel_edp *p = dev_get_drvdata(dev);
485 int ret;
486 int try;
487
488 for (try = 0; try < MAX_PANEL_PREPARE_TRIES; try++) {
489 ret = panel_edp_prepare_once(p);
490 if (ret != -ETIMEDOUT)
491 break;
492 }
493
494 if (ret == -ETIMEDOUT)
495 dev_err(dev, "Prepare timeout after %d tries\n", try);
496 else if (try)
497 dev_warn(dev, "Prepare needed %d retries\n", try);
498
499 return ret;
500}
501
502static int panel_edp_prepare(struct drm_panel *panel)
503{
504 struct panel_edp *p = to_panel_edp(panel);
505 int ret;
506
507 /* Preparing when already prepared is a no-op */
508 if (p->prepared)
509 return 0;
510
511 ret = pm_runtime_get_sync(panel->dev);
512 if (ret < 0) {
513 pm_runtime_put_autosuspend(panel->dev);
514 return ret;
515 }
516
517 p->prepared = true;
518
519 return 0;
520}
521
522static int panel_edp_enable(struct drm_panel *panel)
523{
524 struct panel_edp *p = to_panel_edp(panel);
a64ad9c3 525 unsigned int delay;
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526
527 if (p->enabled)
528 return 0;
529
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530 delay = p->desc->delay.enable;
531
532 /*
533 * If there is a "prepare_to_enable" delay then that's supposed to be
534 * the delay from HPD going high until we can turn the backlight on.
535 * However, we can only count this if HPD is handled by the panel
536 * driver, not if it goes to a dedicated pin on the controller.
537 * If we aren't handling the HPD pin ourselves then the best we
538 * can do is assume that HPD went high immediately before we were
539 * called (and link training took zero time).
540 *
541 * NOTE: if we ever end up in this "if" statement then we're
542 * guaranteed that the panel_edp_wait() call below will do no delay.
543 * It already handles that case, though, so we don't need any special
544 * code for it.
545 */
546 if (p->desc->delay.prepare_to_enable && !p->hpd_gpio && !p->no_hpd)
547 delay = max(delay, p->desc->delay.prepare_to_enable);
548
549 if (delay)
550 msleep(delay);
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551
552 panel_edp_wait(p->prepared_time, p->desc->delay.prepare_to_enable);
553
554 p->enabled = true;
555
556 return 0;
557}
558
559static int panel_edp_get_modes(struct drm_panel *panel,
560 struct drm_connector *connector)
561{
562 struct panel_edp *p = to_panel_edp(panel);
563 int num = 0;
564
565 /* probe EDID if a DDC bus is available */
566 if (p->ddc) {
567 pm_runtime_get_sync(panel->dev);
568
569 if (!p->edid)
570 p->edid = drm_get_edid(connector, p->ddc);
571
572 if (p->edid)
573 num += drm_add_edid_modes(connector, p->edid);
574
575 pm_runtime_mark_last_busy(panel->dev);
576 pm_runtime_put_autosuspend(panel->dev);
577 }
578
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579 /*
580 * Add hard-coded panel modes. Don't call this if there are no timings
581 * and no modes (the generic edp-panel case) because it will clobber
582 * the display_info that was already set by drm_add_edid_modes().
583 */
584 if (p->desc->num_timings || p->desc->num_modes)
585 num += panel_edp_get_non_edid_modes(p, connector);
586 else if (!num)
587 dev_warn(p->base.dev, "No display modes\n");
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588
589 /* set up connector's "panel orientation" property */
590 drm_connector_set_panel_orientation(connector, p->orientation);
591
592 return num;
593}
594
595static int panel_edp_get_timings(struct drm_panel *panel,
596 unsigned int num_timings,
597 struct display_timing *timings)
598{
599 struct panel_edp *p = to_panel_edp(panel);
600 unsigned int i;
601
602 if (p->desc->num_timings < num_timings)
603 num_timings = p->desc->num_timings;
604
605 if (timings)
606 for (i = 0; i < num_timings; i++)
607 timings[i] = p->desc->timings[i];
608
609 return p->desc->num_timings;
610}
611
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612static int detected_panel_show(struct seq_file *s, void *data)
613{
614 struct drm_panel *panel = s->private;
615 struct panel_edp *p = to_panel_edp(panel);
616
617 if (IS_ERR(p->detected_panel))
618 seq_puts(s, "UNKNOWN\n");
619 else if (!p->detected_panel)
620 seq_puts(s, "HARDCODED\n");
621 else
622 seq_printf(s, "%s\n", p->detected_panel->name);
623
624 return 0;
625}
626
627DEFINE_SHOW_ATTRIBUTE(detected_panel);
628
629static void panel_edp_debugfs_init(struct drm_panel *panel, struct dentry *root)
630{
631 debugfs_create_file("detected_panel", 0600, root, panel, &detected_panel_fops);
632}
633
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634static const struct drm_panel_funcs panel_edp_funcs = {
635 .disable = panel_edp_disable,
636 .unprepare = panel_edp_unprepare,
637 .prepare = panel_edp_prepare,
638 .enable = panel_edp_enable,
639 .get_modes = panel_edp_get_modes,
640 .get_timings = panel_edp_get_timings,
6ed19359 641 .debugfs_init = panel_edp_debugfs_init,
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642};
643
644#define PANEL_EDP_BOUNDS_CHECK(to_check, bounds, field) \
645 (to_check->field.typ >= bounds->field.min && \
646 to_check->field.typ <= bounds->field.max)
647static void panel_edp_parse_panel_timing_node(struct device *dev,
648 struct panel_edp *panel,
649 const struct display_timing *ot)
650{
651 const struct panel_desc *desc = panel->desc;
652 struct videomode vm;
653 unsigned int i;
654
655 if (WARN_ON(desc->num_modes)) {
656 dev_err(dev, "Reject override mode: panel has a fixed mode\n");
657 return;
658 }
659 if (WARN_ON(!desc->num_timings)) {
660 dev_err(dev, "Reject override mode: no timings specified\n");
661 return;
662 }
663
664 for (i = 0; i < panel->desc->num_timings; i++) {
665 const struct display_timing *dt = &panel->desc->timings[i];
666
667 if (!PANEL_EDP_BOUNDS_CHECK(ot, dt, hactive) ||
668 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hfront_porch) ||
669 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hback_porch) ||
670 !PANEL_EDP_BOUNDS_CHECK(ot, dt, hsync_len) ||
671 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vactive) ||
672 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vfront_porch) ||
673 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vback_porch) ||
674 !PANEL_EDP_BOUNDS_CHECK(ot, dt, vsync_len))
675 continue;
676
677 if (ot->flags != dt->flags)
678 continue;
679
680 videomode_from_timing(ot, &vm);
681 drm_display_mode_from_videomode(&vm, &panel->override_mode);
682 panel->override_mode.type |= DRM_MODE_TYPE_DRIVER |
683 DRM_MODE_TYPE_PREFERRED;
684 break;
685 }
686
687 if (WARN_ON(!panel->override_mode.type))
688 dev_err(dev, "Reject override mode: No display_timing found\n");
689}
690
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691static const struct edp_panel_entry *find_edp_panel(u32 panel_id);
692
693static int generic_edp_panel_probe(struct device *dev, struct panel_edp *panel)
694{
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695 struct panel_desc *desc;
696 u32 panel_id;
697 char vend[4];
698 u16 product_id;
699 u32 reliable_ms = 0;
700 u32 absent_ms = 0;
701 int ret;
702
703 desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL);
704 if (!desc)
705 return -ENOMEM;
706 panel->desc = desc;
707
708 /*
709 * Read the dts properties for the initial probe. These are used by
710 * the runtime resume code which will get called by the
711 * pm_runtime_get_sync() call below.
712 */
713 of_property_read_u32(dev->of_node, "hpd-reliable-delay-ms", &reliable_ms);
714 desc->delay.hpd_reliable = reliable_ms;
715 of_property_read_u32(dev->of_node, "hpd-absent-delay-ms", &absent_ms);
ef2084a8 716 desc->delay.hpd_absent = absent_ms;
5540cf8f
DA
717
718 /* Power the panel on so we can read the EDID */
719 ret = pm_runtime_get_sync(dev);
720 if (ret < 0) {
721 dev_err(dev, "Couldn't power on panel to read EDID: %d\n", ret);
722 goto exit;
723 }
724
725 panel_id = drm_edid_get_panel_id(panel->ddc);
726 if (!panel_id) {
727 dev_err(dev, "Couldn't identify panel via EDID\n");
728 ret = -EIO;
729 goto exit;
730 }
731 drm_edid_decode_panel_id(panel_id, vend, &product_id);
732
6ed19359 733 panel->detected_panel = find_edp_panel(panel_id);
5540cf8f
DA
734
735 /*
736 * We're using non-optimized timings and want it really obvious that
737 * someone needs to add an entry to the table, so we'll do a WARN_ON
738 * splat.
739 */
6ed19359 740 if (WARN_ON(!panel->detected_panel)) {
5540cf8f
DA
741 dev_warn(dev,
742 "Unknown panel %s %#06x, using conservative timings\n",
743 vend, product_id);
744
745 /*
746 * It's highly likely that the panel will work if we use very
747 * conservative timings, so let's do that. We already know that
748 * the HPD-related delays must have worked since we got this
749 * far, so we really just need the "unprepare" / "enable"
750 * delays. We don't need "prepare_to_enable" since that
751 * overlaps the "enable" delay anyway.
752 *
753 * Nearly all panels have a "unprepare" delay of 500 ms though
754 * there are a few with 1000. Let's stick 2000 in just to be
755 * super conservative.
756 *
757 * An "enable" delay of 80 ms seems the most common, but we'll
758 * throw in 200 ms to be safe.
759 */
760 desc->delay.unprepare = 2000;
761 desc->delay.enable = 200;
6ed19359
DA
762
763 panel->detected_panel = ERR_PTR(-EINVAL);
5540cf8f
DA
764 } else {
765 dev_info(dev, "Detected %s %s (%#06x)\n",
6ed19359 766 vend, panel->detected_panel->name, product_id);
5540cf8f
DA
767
768 /* Update the delay; everything else comes from EDID */
6ed19359 769 desc->delay = *panel->detected_panel->delay;
5540cf8f
DA
770 }
771
772 ret = 0;
773exit:
774 pm_runtime_mark_last_busy(dev);
775 pm_runtime_put_autosuspend(dev);
776
777 return ret;
778}
779
5f04e7ce
DA
780static int panel_edp_probe(struct device *dev, const struct panel_desc *desc,
781 struct drm_dp_aux *aux)
782{
783 struct panel_edp *panel;
784 struct display_timing dt;
785 struct device_node *ddc;
786 int err;
787
788 panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
789 if (!panel)
790 return -ENOMEM;
791
792 panel->enabled = false;
793 panel->prepared_time = 0;
794 panel->desc = desc;
795 panel->aux = aux;
796
797 panel->no_hpd = of_property_read_bool(dev->of_node, "no-hpd");
798 if (!panel->no_hpd) {
799 err = panel_edp_get_hpd_gpio(dev, panel);
800 if (err)
801 return err;
802 }
803
804 panel->supply = devm_regulator_get(dev, "power");
805 if (IS_ERR(panel->supply))
806 return PTR_ERR(panel->supply);
807
808 panel->enable_gpio = devm_gpiod_get_optional(dev, "enable",
809 GPIOD_OUT_LOW);
810 if (IS_ERR(panel->enable_gpio)) {
811 err = PTR_ERR(panel->enable_gpio);
812 if (err != -EPROBE_DEFER)
813 dev_err(dev, "failed to request GPIO: %d\n", err);
814 return err;
815 }
816
817 err = of_drm_get_panel_orientation(dev->of_node, &panel->orientation);
818 if (err) {
819 dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, err);
820 return err;
821 }
822
823 ddc = of_parse_phandle(dev->of_node, "ddc-i2c-bus", 0);
824 if (ddc) {
825 panel->ddc = of_find_i2c_adapter_by_node(ddc);
826 of_node_put(ddc);
827
828 if (!panel->ddc)
829 return -EPROBE_DEFER;
830 } else if (aux) {
831 panel->ddc = &aux->ddc;
832 }
833
834 if (!of_get_display_timing(dev->of_node, "panel-timing", &dt))
835 panel_edp_parse_panel_timing_node(dev, panel, &dt);
836
5f04e7ce
DA
837 dev_set_drvdata(dev, panel);
838
5540cf8f
DA
839 drm_panel_init(&panel->base, dev, &panel_edp_funcs, DRM_MODE_CONNECTOR_eDP);
840
841 err = drm_panel_of_backlight(&panel->base);
842 if (err)
843 goto err_finished_ddc_init;
844
5f04e7ce
DA
845 /*
846 * We use runtime PM for prepare / unprepare since those power the panel
847 * on and off and those can be very slow operations. This is important
848 * to optimize powering the panel on briefly to read the EDID before
849 * fully enabling the panel.
850 */
851 pm_runtime_enable(dev);
852 pm_runtime_set_autosuspend_delay(dev, 1000);
853 pm_runtime_use_autosuspend(dev);
854
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DA
855 if (of_device_is_compatible(dev->of_node, "edp-panel")) {
856 err = generic_edp_panel_probe(dev, panel);
857 if (err) {
858 dev_err_probe(dev, err,
859 "Couldn't detect panel nor find a fallback\n");
860 goto err_finished_pm_runtime;
861 }
862 /* generic_edp_panel_probe() replaces desc in the panel */
863 desc = panel->desc;
864 } else if (desc->bpc != 6 && desc->bpc != 8 && desc->bpc != 10) {
865 dev_warn(dev, "Expected bpc in {6,8,10} but got: %u\n", desc->bpc);
866 }
5f04e7ce
DA
867
868 if (!panel->base.backlight && panel->aux) {
869 pm_runtime_get_sync(dev);
870 err = drm_panel_dp_aux_backlight(&panel->base, panel->aux);
871 pm_runtime_mark_last_busy(dev);
872 pm_runtime_put_autosuspend(dev);
873 if (err)
5540cf8f 874 goto err_finished_pm_runtime;
5f04e7ce
DA
875 }
876
877 drm_panel_add(&panel->base);
878
879 return 0;
880
5540cf8f 881err_finished_pm_runtime:
5f04e7ce
DA
882 pm_runtime_dont_use_autosuspend(dev);
883 pm_runtime_disable(dev);
5540cf8f 884err_finished_ddc_init:
5f04e7ce
DA
885 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))
886 put_device(&panel->ddc->dev);
887
888 return err;
889}
890
891static int panel_edp_remove(struct device *dev)
892{
893 struct panel_edp *panel = dev_get_drvdata(dev);
894
895 drm_panel_remove(&panel->base);
896 drm_panel_disable(&panel->base);
897 drm_panel_unprepare(&panel->base);
898
899 pm_runtime_dont_use_autosuspend(dev);
900 pm_runtime_disable(dev);
901 if (panel->ddc && (!panel->aux || panel->ddc != &panel->aux->ddc))
902 put_device(&panel->ddc->dev);
903
24e27de1
DA
904 kfree(panel->edid);
905 panel->edid = NULL;
906
5f04e7ce
DA
907 return 0;
908}
909
910static void panel_edp_shutdown(struct device *dev)
911{
912 struct panel_edp *panel = dev_get_drvdata(dev);
913
914 drm_panel_disable(&panel->base);
915 drm_panel_unprepare(&panel->base);
916}
917
3fd68b7b
DA
918static const struct display_timing auo_b101ean01_timing = {
919 .pixelclock = { 65300000, 72500000, 75000000 },
920 .hactive = { 1280, 1280, 1280 },
921 .hfront_porch = { 18, 119, 119 },
922 .hback_porch = { 21, 21, 21 },
923 .hsync_len = { 32, 32, 32 },
924 .vactive = { 800, 800, 800 },
925 .vfront_porch = { 4, 4, 4 },
926 .vback_porch = { 8, 8, 8 },
927 .vsync_len = { 18, 20, 20 },
928};
929
930static const struct panel_desc auo_b101ean01 = {
931 .timings = &auo_b101ean01_timing,
932 .num_timings = 1,
933 .bpc = 6,
934 .size = {
935 .width = 217,
936 .height = 136,
937 },
938};
939
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DA
940static const struct drm_display_mode auo_b116xak01_mode = {
941 .clock = 69300,
942 .hdisplay = 1366,
943 .hsync_start = 1366 + 48,
944 .hsync_end = 1366 + 48 + 32,
945 .htotal = 1366 + 48 + 32 + 10,
946 .vdisplay = 768,
947 .vsync_start = 768 + 4,
948 .vsync_end = 768 + 4 + 6,
949 .vtotal = 768 + 4 + 6 + 15,
950 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
951};
952
953static const struct panel_desc auo_b116xak01 = {
954 .modes = &auo_b116xak01_mode,
955 .num_modes = 1,
956 .bpc = 6,
957 .size = {
958 .width = 256,
959 .height = 144,
960 },
961 .delay = {
52824ca4 962 .hpd_absent = 200,
5f04e7ce
DA
963 },
964};
965
966static const struct drm_display_mode auo_b116xw03_mode = {
967 .clock = 70589,
968 .hdisplay = 1366,
969 .hsync_start = 1366 + 40,
970 .hsync_end = 1366 + 40 + 40,
971 .htotal = 1366 + 40 + 40 + 32,
972 .vdisplay = 768,
973 .vsync_start = 768 + 10,
974 .vsync_end = 768 + 10 + 12,
975 .vtotal = 768 + 10 + 12 + 6,
976 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
977};
978
979static const struct panel_desc auo_b116xw03 = {
980 .modes = &auo_b116xw03_mode,
981 .num_modes = 1,
982 .bpc = 6,
983 .size = {
984 .width = 256,
985 .height = 144,
986 },
987 .delay = {
988 .enable = 400,
989 },
990};
991
992static const struct drm_display_mode auo_b133han05_mode = {
993 .clock = 142600,
994 .hdisplay = 1920,
995 .hsync_start = 1920 + 58,
996 .hsync_end = 1920 + 58 + 42,
997 .htotal = 1920 + 58 + 42 + 60,
998 .vdisplay = 1080,
999 .vsync_start = 1080 + 3,
1000 .vsync_end = 1080 + 3 + 5,
1001 .vtotal = 1080 + 3 + 5 + 54,
1002};
1003
1004static const struct panel_desc auo_b133han05 = {
1005 .modes = &auo_b133han05_mode,
1006 .num_modes = 1,
1007 .bpc = 8,
1008 .size = {
1009 .width = 293,
1010 .height = 165,
1011 },
1012 .delay = {
52824ca4 1013 .hpd_reliable = 100,
5f04e7ce
DA
1014 .enable = 20,
1015 .unprepare = 50,
1016 },
1017};
1018
3fd68b7b
DA
1019static const struct drm_display_mode auo_b133htn01_mode = {
1020 .clock = 150660,
1021 .hdisplay = 1920,
1022 .hsync_start = 1920 + 172,
1023 .hsync_end = 1920 + 172 + 80,
1024 .htotal = 1920 + 172 + 80 + 60,
1025 .vdisplay = 1080,
1026 .vsync_start = 1080 + 25,
1027 .vsync_end = 1080 + 25 + 10,
1028 .vtotal = 1080 + 25 + 10 + 10,
1029};
1030
1031static const struct panel_desc auo_b133htn01 = {
1032 .modes = &auo_b133htn01_mode,
1033 .num_modes = 1,
1034 .bpc = 6,
1035 .size = {
1036 .width = 293,
1037 .height = 165,
1038 },
1039 .delay = {
52824ca4 1040 .hpd_reliable = 105,
3fd68b7b
DA
1041 .enable = 20,
1042 .unprepare = 50,
1043 },
1044};
1045
1046static const struct drm_display_mode auo_b133xtn01_mode = {
1047 .clock = 69500,
1048 .hdisplay = 1366,
1049 .hsync_start = 1366 + 48,
1050 .hsync_end = 1366 + 48 + 32,
1051 .htotal = 1366 + 48 + 32 + 20,
1052 .vdisplay = 768,
1053 .vsync_start = 768 + 3,
1054 .vsync_end = 768 + 3 + 6,
1055 .vtotal = 768 + 3 + 6 + 13,
1056};
1057
1058static const struct panel_desc auo_b133xtn01 = {
1059 .modes = &auo_b133xtn01_mode,
1060 .num_modes = 1,
1061 .bpc = 6,
1062 .size = {
1063 .width = 293,
1064 .height = 165,
1065 },
1066};
1067
5f04e7ce
DA
1068static const struct drm_display_mode auo_b140han06_mode = {
1069 .clock = 141000,
1070 .hdisplay = 1920,
1071 .hsync_start = 1920 + 16,
1072 .hsync_end = 1920 + 16 + 16,
1073 .htotal = 1920 + 16 + 16 + 152,
1074 .vdisplay = 1080,
1075 .vsync_start = 1080 + 3,
1076 .vsync_end = 1080 + 3 + 14,
1077 .vtotal = 1080 + 3 + 14 + 19,
1078};
1079
1080static const struct panel_desc auo_b140han06 = {
1081 .modes = &auo_b140han06_mode,
1082 .num_modes = 1,
1083 .bpc = 8,
1084 .size = {
1085 .width = 309,
1086 .height = 174,
1087 },
1088 .delay = {
52824ca4 1089 .hpd_reliable = 100,
5f04e7ce
DA
1090 .enable = 20,
1091 .unprepare = 50,
1092 },
1093};
1094
3fd68b7b
DA
1095static const struct drm_display_mode boe_nv101wxmn51_modes[] = {
1096 {
1097 .clock = 71900,
1098 .hdisplay = 1280,
1099 .hsync_start = 1280 + 48,
1100 .hsync_end = 1280 + 48 + 32,
1101 .htotal = 1280 + 48 + 32 + 80,
1102 .vdisplay = 800,
1103 .vsync_start = 800 + 3,
1104 .vsync_end = 800 + 3 + 5,
1105 .vtotal = 800 + 3 + 5 + 24,
1106 },
1107 {
1108 .clock = 57500,
1109 .hdisplay = 1280,
1110 .hsync_start = 1280 + 48,
1111 .hsync_end = 1280 + 48 + 32,
1112 .htotal = 1280 + 48 + 32 + 80,
1113 .vdisplay = 800,
1114 .vsync_start = 800 + 3,
1115 .vsync_end = 800 + 3 + 5,
1116 .vtotal = 800 + 3 + 5 + 24,
1117 },
1118};
1119
1120static const struct panel_desc boe_nv101wxmn51 = {
1121 .modes = boe_nv101wxmn51_modes,
1122 .num_modes = ARRAY_SIZE(boe_nv101wxmn51_modes),
1123 .bpc = 8,
1124 .size = {
1125 .width = 217,
1126 .height = 136,
1127 },
1128 .delay = {
52824ca4
DA
1129 /* TODO: should be hpd-absent and no-hpd should be set? */
1130 .hpd_reliable = 210,
3fd68b7b
DA
1131 .enable = 50,
1132 .unprepare = 160,
1133 },
1134};
1135
5f04e7ce
DA
1136static const struct drm_display_mode boe_nv110wtm_n61_modes[] = {
1137 {
1138 .clock = 207800,
1139 .hdisplay = 2160,
1140 .hsync_start = 2160 + 48,
1141 .hsync_end = 2160 + 48 + 32,
1142 .htotal = 2160 + 48 + 32 + 100,
1143 .vdisplay = 1440,
1144 .vsync_start = 1440 + 3,
1145 .vsync_end = 1440 + 3 + 6,
1146 .vtotal = 1440 + 3 + 6 + 31,
1147 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1148 },
1149 {
1150 .clock = 138500,
1151 .hdisplay = 2160,
1152 .hsync_start = 2160 + 48,
1153 .hsync_end = 2160 + 48 + 32,
1154 .htotal = 2160 + 48 + 32 + 100,
1155 .vdisplay = 1440,
1156 .vsync_start = 1440 + 3,
1157 .vsync_end = 1440 + 3 + 6,
1158 .vtotal = 1440 + 3 + 6 + 31,
1159 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1160 },
1161};
1162
1163static const struct panel_desc boe_nv110wtm_n61 = {
1164 .modes = boe_nv110wtm_n61_modes,
1165 .num_modes = ARRAY_SIZE(boe_nv110wtm_n61_modes),
1166 .bpc = 8,
1167 .size = {
1168 .width = 233,
1169 .height = 155,
1170 },
1171 .delay = {
52824ca4 1172 .hpd_absent = 200,
5f04e7ce
DA
1173 .prepare_to_enable = 80,
1174 .enable = 50,
1175 .unprepare = 500,
1176 },
1177};
1178
1179/* Also used for boe_nv133fhm_n62 */
1180static const struct drm_display_mode boe_nv133fhm_n61_modes = {
1181 .clock = 147840,
1182 .hdisplay = 1920,
1183 .hsync_start = 1920 + 48,
1184 .hsync_end = 1920 + 48 + 32,
1185 .htotal = 1920 + 48 + 32 + 200,
1186 .vdisplay = 1080,
1187 .vsync_start = 1080 + 3,
1188 .vsync_end = 1080 + 3 + 6,
1189 .vtotal = 1080 + 3 + 6 + 31,
1190 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC,
1191};
1192
1193/* Also used for boe_nv133fhm_n62 */
1194static const struct panel_desc boe_nv133fhm_n61 = {
1195 .modes = &boe_nv133fhm_n61_modes,
1196 .num_modes = 1,
1197 .bpc = 6,
1198 .size = {
1199 .width = 294,
1200 .height = 165,
1201 },
1202 .delay = {
1203 /*
1204 * When power is first given to the panel there's a short
1205 * spike on the HPD line. It was explained that this spike
1206 * was until the TCON data download was complete. On
1207 * one system this was measured at 8 ms. We'll put 15 ms
c46a4cc1 1208 * in the prepare delay just to be safe. That means:
5f04e7ce
DA
1209 * - If HPD isn't hooked up you still have 200 ms delay.
1210 * - If HPD is hooked up we won't try to look at it for the
1211 * first 15 ms.
1212 */
52824ca4 1213 .hpd_reliable = 15,
c46a4cc1 1214 .hpd_absent = 200,
5f04e7ce
DA
1215
1216 .unprepare = 500,
1217 },
1218};
1219
1220static const struct drm_display_mode boe_nv140fhmn49_modes[] = {
1221 {
1222 .clock = 148500,
1223 .hdisplay = 1920,
1224 .hsync_start = 1920 + 48,
1225 .hsync_end = 1920 + 48 + 32,
1226 .htotal = 2200,
1227 .vdisplay = 1080,
1228 .vsync_start = 1080 + 3,
1229 .vsync_end = 1080 + 3 + 5,
1230 .vtotal = 1125,
1231 },
1232};
1233
1234static const struct panel_desc boe_nv140fhmn49 = {
1235 .modes = boe_nv140fhmn49_modes,
1236 .num_modes = ARRAY_SIZE(boe_nv140fhmn49_modes),
1237 .bpc = 6,
1238 .size = {
1239 .width = 309,
1240 .height = 174,
1241 },
1242 .delay = {
52824ca4
DA
1243 /* TODO: should be hpd-absent and no-hpd should be set? */
1244 .hpd_reliable = 210,
5f04e7ce
DA
1245 .enable = 50,
1246 .unprepare = 160,
1247 },
1248};
1249
1250static const struct drm_display_mode innolux_n116bca_ea1_mode = {
1251 .clock = 76420,
1252 .hdisplay = 1366,
1253 .hsync_start = 1366 + 136,
1254 .hsync_end = 1366 + 136 + 30,
1255 .htotal = 1366 + 136 + 30 + 60,
1256 .vdisplay = 768,
1257 .vsync_start = 768 + 8,
1258 .vsync_end = 768 + 8 + 12,
1259 .vtotal = 768 + 8 + 12 + 12,
1260 .flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC,
1261};
1262
1263static const struct panel_desc innolux_n116bca_ea1 = {
1264 .modes = &innolux_n116bca_ea1_mode,
1265 .num_modes = 1,
1266 .bpc = 6,
1267 .size = {
1268 .width = 256,
1269 .height = 144,
1270 },
1271 .delay = {
52824ca4 1272 .hpd_absent = 200,
5f04e7ce
DA
1273 .prepare_to_enable = 80,
1274 .unprepare = 500,
1275 },
1276};
1277
1278/*
1279 * Datasheet specifies that at 60 Hz refresh rate:
1280 * - total horizontal time: { 1506, 1592, 1716 }
1281 * - total vertical time: { 788, 800, 868 }
1282 *
1283 * ...but doesn't go into exactly how that should be split into a front
1284 * porch, back porch, or sync length. For now we'll leave a single setting
1285 * here which allows a bit of tweaking of the pixel clock at the expense of
1286 * refresh rate.
1287 */
1288static const struct display_timing innolux_n116bge_timing = {
1289 .pixelclock = { 72600000, 76420000, 80240000 },
1290 .hactive = { 1366, 1366, 1366 },
1291 .hfront_porch = { 136, 136, 136 },
1292 .hback_porch = { 60, 60, 60 },
1293 .hsync_len = { 30, 30, 30 },
1294 .vactive = { 768, 768, 768 },
1295 .vfront_porch = { 8, 8, 8 },
1296 .vback_porch = { 12, 12, 12 },
1297 .vsync_len = { 12, 12, 12 },
1298 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
1299};
1300
1301static const struct panel_desc innolux_n116bge = {
1302 .timings = &innolux_n116bge_timing,
1303 .num_timings = 1,
1304 .bpc = 6,
1305 .size = {
1306 .width = 256,
1307 .height = 144,
1308 },
1309};
1310
1311static const struct drm_display_mode innolux_n125hce_gn1_mode = {
1312 .clock = 162000,
1313 .hdisplay = 1920,
1314 .hsync_start = 1920 + 40,
1315 .hsync_end = 1920 + 40 + 40,
1316 .htotal = 1920 + 40 + 40 + 80,
1317 .vdisplay = 1080,
1318 .vsync_start = 1080 + 4,
1319 .vsync_end = 1080 + 4 + 4,
1320 .vtotal = 1080 + 4 + 4 + 24,
1321};
1322
1323static const struct panel_desc innolux_n125hce_gn1 = {
1324 .modes = &innolux_n125hce_gn1_mode,
1325 .num_modes = 1,
1326 .bpc = 8,
1327 .size = {
1328 .width = 276,
1329 .height = 155,
1330 },
1331};
1332
3fd68b7b
DA
1333static const struct drm_display_mode innolux_p120zdg_bf1_mode = {
1334 .clock = 206016,
1335 .hdisplay = 2160,
1336 .hsync_start = 2160 + 48,
1337 .hsync_end = 2160 + 48 + 32,
1338 .htotal = 2160 + 48 + 32 + 80,
1339 .vdisplay = 1440,
1340 .vsync_start = 1440 + 3,
1341 .vsync_end = 1440 + 3 + 10,
1342 .vtotal = 1440 + 3 + 10 + 27,
1343 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
1344};
1345
1346static const struct panel_desc innolux_p120zdg_bf1 = {
1347 .modes = &innolux_p120zdg_bf1_mode,
1348 .num_modes = 1,
1349 .bpc = 8,
1350 .size = {
1351 .width = 254,
1352 .height = 169,
1353 },
1354 .delay = {
52824ca4 1355 .hpd_absent = 200,
3fd68b7b
DA
1356 .unprepare = 500,
1357 },
1358};
1359
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DA
1360static const struct drm_display_mode ivo_m133nwf4_r0_mode = {
1361 .clock = 138778,
1362 .hdisplay = 1920,
1363 .hsync_start = 1920 + 24,
1364 .hsync_end = 1920 + 24 + 48,
1365 .htotal = 1920 + 24 + 48 + 88,
1366 .vdisplay = 1080,
1367 .vsync_start = 1080 + 3,
1368 .vsync_end = 1080 + 3 + 12,
1369 .vtotal = 1080 + 3 + 12 + 17,
1370 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
1371};
1372
1373static const struct panel_desc ivo_m133nwf4_r0 = {
1374 .modes = &ivo_m133nwf4_r0_mode,
1375 .num_modes = 1,
1376 .bpc = 8,
1377 .size = {
1378 .width = 294,
1379 .height = 165,
1380 },
1381 .delay = {
52824ca4 1382 .hpd_absent = 200,
5f04e7ce
DA
1383 .unprepare = 500,
1384 },
1385};
1386
1387static const struct drm_display_mode kingdisplay_kd116n21_30nv_a010_mode = {
1388 .clock = 81000,
1389 .hdisplay = 1366,
1390 .hsync_start = 1366 + 40,
1391 .hsync_end = 1366 + 40 + 32,
1392 .htotal = 1366 + 40 + 32 + 62,
1393 .vdisplay = 768,
1394 .vsync_start = 768 + 5,
1395 .vsync_end = 768 + 5 + 5,
1396 .vtotal = 768 + 5 + 5 + 122,
1397 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1398};
1399
1400static const struct panel_desc kingdisplay_kd116n21_30nv_a010 = {
1401 .modes = &kingdisplay_kd116n21_30nv_a010_mode,
1402 .num_modes = 1,
1403 .bpc = 6,
1404 .size = {
1405 .width = 256,
1406 .height = 144,
1407 },
1408 .delay = {
52824ca4 1409 .hpd_absent = 200,
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DA
1410 },
1411};
1412
3fd68b7b
DA
1413static const struct drm_display_mode lg_lp079qx1_sp0v_mode = {
1414 .clock = 200000,
1415 .hdisplay = 1536,
1416 .hsync_start = 1536 + 12,
1417 .hsync_end = 1536 + 12 + 16,
1418 .htotal = 1536 + 12 + 16 + 48,
1419 .vdisplay = 2048,
1420 .vsync_start = 2048 + 8,
1421 .vsync_end = 2048 + 8 + 4,
1422 .vtotal = 2048 + 8 + 4 + 8,
1423 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1424};
1425
1426static const struct panel_desc lg_lp079qx1_sp0v = {
1427 .modes = &lg_lp079qx1_sp0v_mode,
1428 .num_modes = 1,
1429 .size = {
1430 .width = 129,
1431 .height = 171,
1432 },
1433};
1434
1435static const struct drm_display_mode lg_lp097qx1_spa1_mode = {
1436 .clock = 205210,
1437 .hdisplay = 2048,
1438 .hsync_start = 2048 + 150,
1439 .hsync_end = 2048 + 150 + 5,
1440 .htotal = 2048 + 150 + 5 + 5,
1441 .vdisplay = 1536,
1442 .vsync_start = 1536 + 3,
1443 .vsync_end = 1536 + 3 + 1,
1444 .vtotal = 1536 + 3 + 1 + 9,
1445};
1446
1447static const struct panel_desc lg_lp097qx1_spa1 = {
1448 .modes = &lg_lp097qx1_spa1_mode,
1449 .num_modes = 1,
1450 .size = {
1451 .width = 208,
1452 .height = 147,
1453 },
1454};
1455
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DA
1456static const struct drm_display_mode lg_lp120up1_mode = {
1457 .clock = 162300,
1458 .hdisplay = 1920,
1459 .hsync_start = 1920 + 40,
1460 .hsync_end = 1920 + 40 + 40,
1461 .htotal = 1920 + 40 + 40 + 80,
1462 .vdisplay = 1280,
1463 .vsync_start = 1280 + 4,
1464 .vsync_end = 1280 + 4 + 4,
1465 .vtotal = 1280 + 4 + 4 + 12,
1466};
1467
1468static const struct panel_desc lg_lp120up1 = {
1469 .modes = &lg_lp120up1_mode,
1470 .num_modes = 1,
1471 .bpc = 8,
1472 .size = {
1473 .width = 267,
1474 .height = 183,
1475 },
1476};
1477
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DA
1478static const struct drm_display_mode lg_lp129qe_mode = {
1479 .clock = 285250,
1480 .hdisplay = 2560,
1481 .hsync_start = 2560 + 48,
1482 .hsync_end = 2560 + 48 + 32,
1483 .htotal = 2560 + 48 + 32 + 80,
1484 .vdisplay = 1700,
1485 .vsync_start = 1700 + 3,
1486 .vsync_end = 1700 + 3 + 10,
1487 .vtotal = 1700 + 3 + 10 + 36,
1488};
1489
1490static const struct panel_desc lg_lp129qe = {
1491 .modes = &lg_lp129qe_mode,
1492 .num_modes = 1,
1493 .bpc = 8,
1494 .size = {
1495 .width = 272,
1496 .height = 181,
1497 },
1498};
1499
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DA
1500static const struct drm_display_mode neweast_wjfh116008a_modes[] = {
1501 {
1502 .clock = 138500,
1503 .hdisplay = 1920,
1504 .hsync_start = 1920 + 48,
1505 .hsync_end = 1920 + 48 + 32,
1506 .htotal = 1920 + 48 + 32 + 80,
1507 .vdisplay = 1080,
1508 .vsync_start = 1080 + 3,
1509 .vsync_end = 1080 + 3 + 5,
1510 .vtotal = 1080 + 3 + 5 + 23,
1511 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1512 }, {
1513 .clock = 110920,
1514 .hdisplay = 1920,
1515 .hsync_start = 1920 + 48,
1516 .hsync_end = 1920 + 48 + 32,
1517 .htotal = 1920 + 48 + 32 + 80,
1518 .vdisplay = 1080,
1519 .vsync_start = 1080 + 3,
1520 .vsync_end = 1080 + 3 + 5,
1521 .vtotal = 1080 + 3 + 5 + 23,
1522 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1523 }
1524};
1525
1526static const struct panel_desc neweast_wjfh116008a = {
1527 .modes = neweast_wjfh116008a_modes,
1528 .num_modes = 2,
1529 .bpc = 6,
1530 .size = {
1531 .width = 260,
1532 .height = 150,
1533 },
1534 .delay = {
52824ca4 1535 .hpd_reliable = 110,
5f04e7ce
DA
1536 .enable = 20,
1537 .unprepare = 500,
1538 },
1539};
1540
3fd68b7b
DA
1541static const struct drm_display_mode samsung_lsn122dl01_c01_mode = {
1542 .clock = 271560,
1543 .hdisplay = 2560,
1544 .hsync_start = 2560 + 48,
1545 .hsync_end = 2560 + 48 + 32,
1546 .htotal = 2560 + 48 + 32 + 80,
1547 .vdisplay = 1600,
1548 .vsync_start = 1600 + 2,
1549 .vsync_end = 1600 + 2 + 5,
1550 .vtotal = 1600 + 2 + 5 + 57,
1551};
1552
1553static const struct panel_desc samsung_lsn122dl01_c01 = {
1554 .modes = &samsung_lsn122dl01_c01_mode,
1555 .num_modes = 1,
1556 .size = {
1557 .width = 263,
1558 .height = 164,
1559 },
1560};
1561
1562static const struct drm_display_mode samsung_ltn140at29_301_mode = {
1563 .clock = 76300,
1564 .hdisplay = 1366,
1565 .hsync_start = 1366 + 64,
1566 .hsync_end = 1366 + 64 + 48,
1567 .htotal = 1366 + 64 + 48 + 128,
1568 .vdisplay = 768,
1569 .vsync_start = 768 + 2,
1570 .vsync_end = 768 + 2 + 5,
1571 .vtotal = 768 + 2 + 5 + 17,
1572};
1573
1574static const struct panel_desc samsung_ltn140at29_301 = {
1575 .modes = &samsung_ltn140at29_301_mode,
1576 .num_modes = 1,
1577 .bpc = 6,
1578 .size = {
1579 .width = 320,
1580 .height = 187,
1581 },
1582};
1583
1584static const struct drm_display_mode sharp_ld_d5116z01b_mode = {
1585 .clock = 168480,
1586 .hdisplay = 1920,
1587 .hsync_start = 1920 + 48,
1588 .hsync_end = 1920 + 48 + 32,
1589 .htotal = 1920 + 48 + 32 + 80,
1590 .vdisplay = 1280,
1591 .vsync_start = 1280 + 3,
1592 .vsync_end = 1280 + 3 + 10,
1593 .vtotal = 1280 + 3 + 10 + 57,
1594 .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC,
1595};
1596
1597static const struct panel_desc sharp_ld_d5116z01b = {
1598 .modes = &sharp_ld_d5116z01b_mode,
1599 .num_modes = 1,
1600 .bpc = 8,
1601 .size = {
1602 .width = 260,
1603 .height = 120,
1604 },
1605};
1606
1607static const struct display_timing sharp_lq123p1jx31_timing = {
1608 .pixelclock = { 252750000, 252750000, 266604720 },
1609 .hactive = { 2400, 2400, 2400 },
1610 .hfront_porch = { 48, 48, 48 },
1611 .hback_porch = { 80, 80, 84 },
1612 .hsync_len = { 32, 32, 32 },
1613 .vactive = { 1600, 1600, 1600 },
1614 .vfront_porch = { 3, 3, 3 },
1615 .vback_porch = { 33, 33, 120 },
1616 .vsync_len = { 10, 10, 10 },
1617 .flags = DISPLAY_FLAGS_VSYNC_LOW | DISPLAY_FLAGS_HSYNC_LOW,
1618};
1619
1620static const struct panel_desc sharp_lq123p1jx31 = {
1621 .timings = &sharp_lq123p1jx31_timing,
1622 .num_timings = 1,
1623 .bpc = 8,
1624 .size = {
1625 .width = 259,
1626 .height = 173,
1627 },
1628 .delay = {
52824ca4 1629 .hpd_reliable = 110,
3fd68b7b
DA
1630 .enable = 50,
1631 .unprepare = 550,
1632 },
1633};
1634
a874aba8
SB
1635static const struct drm_display_mode sharp_lq140m1jw46_mode[] = {
1636 {
1637 .clock = 346500,
1638 .hdisplay = 1920,
1639 .hsync_start = 1920 + 48,
1640 .hsync_end = 1920 + 48 + 32,
1641 .htotal = 1920 + 48 + 32 + 80,
1642 .vdisplay = 1080,
1643 .vsync_start = 1080 + 3,
1644 .vsync_end = 1080 + 3 + 5,
1645 .vtotal = 1080 + 3 + 5 + 69,
1646 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1647 }, {
1648 .clock = 144370,
1649 .hdisplay = 1920,
1650 .hsync_start = 1920 + 48,
1651 .hsync_end = 1920 + 48 + 32,
1652 .htotal = 1920 + 48 + 32 + 80,
1653 .vdisplay = 1080,
1654 .vsync_start = 1080 + 3,
1655 .vsync_end = 1080 + 3 + 5,
1656 .vtotal = 1080 + 3 + 5 + 69,
1657 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1658 },
1659};
1660
1661static const struct panel_desc sharp_lq140m1jw46 = {
1662 .modes = sharp_lq140m1jw46_mode,
1663 .num_modes = ARRAY_SIZE(sharp_lq140m1jw46_mode),
1664 .bpc = 8,
1665 .size = {
1666 .width = 309,
1667 .height = 174,
1668 },
1669 .delay = {
1670 .hpd_absent = 80,
1671 .enable = 50,
1672 .unprepare = 500,
1673 },
1674};
1675
3fd68b7b
DA
1676static const struct drm_display_mode starry_kr122ea0sra_mode = {
1677 .clock = 147000,
1678 .hdisplay = 1920,
1679 .hsync_start = 1920 + 16,
1680 .hsync_end = 1920 + 16 + 16,
1681 .htotal = 1920 + 16 + 16 + 32,
1682 .vdisplay = 1200,
1683 .vsync_start = 1200 + 15,
1684 .vsync_end = 1200 + 15 + 2,
1685 .vtotal = 1200 + 15 + 2 + 18,
1686 .flags = DRM_MODE_FLAG_NVSYNC | DRM_MODE_FLAG_NHSYNC,
1687};
1688
1689static const struct panel_desc starry_kr122ea0sra = {
1690 .modes = &starry_kr122ea0sra_mode,
1691 .num_modes = 1,
1692 .size = {
1693 .width = 263,
1694 .height = 164,
1695 },
1696 .delay = {
52824ca4
DA
1697 /* TODO: should be hpd-absent and no-hpd should be set? */
1698 .hpd_reliable = 10 + 200,
3fd68b7b
DA
1699 .enable = 50,
1700 .unprepare = 10 + 500,
1701 },
1702};
1703
5f04e7ce
DA
1704static const struct of_device_id platform_of_match[] = {
1705 {
5540cf8f
DA
1706 /* Must be first */
1707 .compatible = "edp-panel",
1708 }, {
3fd68b7b
DA
1709 .compatible = "auo,b101ean01",
1710 .data = &auo_b101ean01,
1711 }, {
5f04e7ce
DA
1712 .compatible = "auo,b116xa01",
1713 .data = &auo_b116xak01,
1714 }, {
1715 .compatible = "auo,b116xw03",
1716 .data = &auo_b116xw03,
1717 }, {
1718 .compatible = "auo,b133han05",
1719 .data = &auo_b133han05,
3fd68b7b
DA
1720 }, {
1721 .compatible = "auo,b133htn01",
1722 .data = &auo_b133htn01,
1723 }, {
1724 .compatible = "auo,b133xtn01",
1725 .data = &auo_b133xtn01,
5f04e7ce
DA
1726 }, {
1727 .compatible = "auo,b140han06",
1728 .data = &auo_b140han06,
3fd68b7b
DA
1729 }, {
1730 .compatible = "boe,nv101wxmn51",
1731 .data = &boe_nv101wxmn51,
5f04e7ce
DA
1732 }, {
1733 .compatible = "boe,nv110wtm-n61",
1734 .data = &boe_nv110wtm_n61,
1735 }, {
1736 .compatible = "boe,nv133fhm-n61",
1737 .data = &boe_nv133fhm_n61,
1738 }, {
1739 .compatible = "boe,nv133fhm-n62",
1740 .data = &boe_nv133fhm_n61,
1741 }, {
1742 .compatible = "boe,nv140fhmn49",
1743 .data = &boe_nv140fhmn49,
1744 }, {
1745 .compatible = "innolux,n116bca-ea1",
1746 .data = &innolux_n116bca_ea1,
1747 }, {
1748 .compatible = "innolux,n116bge",
1749 .data = &innolux_n116bge,
1750 }, {
1751 .compatible = "innolux,n125hce-gn1",
1752 .data = &innolux_n125hce_gn1,
3fd68b7b
DA
1753 }, {
1754 .compatible = "innolux,p120zdg-bf1",
1755 .data = &innolux_p120zdg_bf1,
5f04e7ce
DA
1756 }, {
1757 .compatible = "ivo,m133nwf4-r0",
1758 .data = &ivo_m133nwf4_r0,
1759 }, {
1760 .compatible = "kingdisplay,kd116n21-30nv-a010",
1761 .data = &kingdisplay_kd116n21_30nv_a010,
3fd68b7b
DA
1762 }, {
1763 .compatible = "lg,lp079qx1-sp0v",
1764 .data = &lg_lp079qx1_sp0v,
1765 }, {
1766 .compatible = "lg,lp097qx1-spa1",
1767 .data = &lg_lp097qx1_spa1,
5f04e7ce
DA
1768 }, {
1769 .compatible = "lg,lp120up1",
1770 .data = &lg_lp120up1,
3fd68b7b
DA
1771 }, {
1772 .compatible = "lg,lp129qe",
1773 .data = &lg_lp129qe,
5f04e7ce
DA
1774 }, {
1775 .compatible = "neweast,wjfh116008a",
1776 .data = &neweast_wjfh116008a,
3fd68b7b
DA
1777 }, {
1778 .compatible = "samsung,lsn122dl01-c01",
1779 .data = &samsung_lsn122dl01_c01,
1780 }, {
1781 .compatible = "samsung,ltn140at29-301",
1782 .data = &samsung_ltn140at29_301,
1783 }, {
1784 .compatible = "sharp,ld-d5116z01b",
1785 .data = &sharp_ld_d5116z01b,
1786 }, {
1787 .compatible = "sharp,lq123p1jx31",
1788 .data = &sharp_lq123p1jx31,
a874aba8
SB
1789 }, {
1790 .compatible = "sharp,lq140m1jw46",
1791 .data = &sharp_lq140m1jw46,
3fd68b7b
DA
1792 }, {
1793 .compatible = "starry,kr122ea0sra",
1794 .data = &starry_kr122ea0sra,
5f04e7ce
DA
1795 }, {
1796 /* sentinel */
1797 }
1798};
1799MODULE_DEVICE_TABLE(of, platform_of_match);
1800
5540cf8f
DA
1801static const struct panel_delay delay_200_500_p2e80 = {
1802 .hpd_absent = 200,
1803 .unprepare = 500,
1804 .prepare_to_enable = 80,
1805};
1806
1807static const struct panel_delay delay_200_500_p2e100 = {
1808 .hpd_absent = 200,
1809 .unprepare = 500,
1810 .prepare_to_enable = 100,
1811};
1812
1813static const struct panel_delay delay_200_500_e50 = {
1814 .hpd_absent = 200,
1815 .unprepare = 500,
1816 .enable = 50,
1817};
1818
b889d89a
YJ
1819static const struct panel_delay delay_200_500_e80_d50 = {
1820 .hpd_absent = 200,
1821 .unprepare = 500,
1822 .enable = 80,
1823 .disable = 50,
1824};
1825
1826static const struct panel_delay delay_100_500_e200 = {
1827 .hpd_absent = 100,
1828 .unprepare = 500,
1829 .enable = 200,
1830};
1831
7d1be0a0 1832#define EDP_PANEL_ENTRY(vend_chr_0, vend_chr_1, vend_chr_2, product_id, _delay, _name) \
5540cf8f
DA
1833{ \
1834 .name = _name, \
7d1be0a0
DA
1835 .panel_id = drm_edid_encode_panel_id(vend_chr_0, vend_chr_1, vend_chr_2, \
1836 product_id), \
5540cf8f
DA
1837 .delay = _delay \
1838}
1839
1840/*
1841 * This table is used to figure out power sequencing delays for panels that
1842 * are detected by EDID. Entries here may point to entries in the
1843 * platform_of_match table (if a panel is listed in both places).
1844 *
1845 * Sort first by vendor, then by product ID.
1846 */
1847static const struct edp_panel_entry edp_panels[] = {
7d1be0a0
DA
1848 EDP_PANEL_ENTRY('A', 'U', 'O', 0x405c, &auo_b116xak01.delay, "B116XAK01"),
1849 EDP_PANEL_ENTRY('A', 'U', 'O', 0x615c, &delay_200_500_e50, "B116XAN06.1"),
d049a24b 1850 EDP_PANEL_ENTRY('A', 'U', 'O', 0x8594, &delay_200_500_e50, "B133UAN01.0"),
5540cf8f 1851
7d1be0a0
DA
1852 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0786, &delay_200_500_p2e80, "NV116WHM-T01"),
1853 EDP_PANEL_ENTRY('B', 'O', 'E', 0x07d1, &boe_nv133fhm_n61.delay, "NV133FHM-N61"),
1854 EDP_PANEL_ENTRY('B', 'O', 'E', 0x082d, &boe_nv133fhm_n61.delay, "NV133FHM-N62"),
1855 EDP_PANEL_ENTRY('B', 'O', 'E', 0x098d, &boe_nv110wtm_n61.delay, "NV110WTM-N61"),
b889d89a 1856 EDP_PANEL_ENTRY('B', 'O', 'E', 0x0a5d, &delay_200_500_e50, "NV116WHM-N45"),
5540cf8f 1857
7d1be0a0 1858 EDP_PANEL_ENTRY('C', 'M', 'N', 0x114c, &innolux_n116bca_ea1.delay, "N116BCA-EA1"),
5540cf8f 1859
7d1be0a0 1860 EDP_PANEL_ENTRY('K', 'D', 'B', 0x0624, &kingdisplay_kd116n21_30nv_a010.delay, "116N21-30NV-A010"),
b889d89a 1861 EDP_PANEL_ENTRY('K', 'D', 'B', 0x1120, &delay_200_500_e80_d50, "116N29-30NK-C007"),
5540cf8f 1862
9f493fd7 1863 EDP_PANEL_ENTRY('S', 'H', 'P', 0x1523, &sharp_lq140m1jw46.delay, "LQ140M1JW46"),
7d1be0a0 1864 EDP_PANEL_ENTRY('S', 'H', 'P', 0x154c, &delay_200_500_p2e100, "LQ116M1JW10"),
5540cf8f 1865
b889d89a
YJ
1866 EDP_PANEL_ENTRY('S', 'T', 'A', 0x0100, &delay_100_500_e200, "2081116HHD028001-51D"),
1867
5540cf8f
DA
1868 { /* sentinal */ }
1869};
1870
1871static const struct edp_panel_entry *find_edp_panel(u32 panel_id)
1872{
1873 const struct edp_panel_entry *panel;
1874
1875 if (!panel_id)
1876 return NULL;
1877
1878 for (panel = edp_panels; panel->panel_id; panel++)
1879 if (panel->panel_id == panel_id)
1880 return panel;
1881
1882 return NULL;
1883}
1884
5f04e7ce
DA
1885static int panel_edp_platform_probe(struct platform_device *pdev)
1886{
1887 const struct of_device_id *id;
1888
5540cf8f
DA
1889 /* Skip one since "edp-panel" is only supported on DP AUX bus */
1890 id = of_match_node(platform_of_match + 1, pdev->dev.of_node);
5f04e7ce
DA
1891 if (!id)
1892 return -ENODEV;
1893
1894 return panel_edp_probe(&pdev->dev, id->data, NULL);
1895}
1896
1897static int panel_edp_platform_remove(struct platform_device *pdev)
1898{
1899 return panel_edp_remove(&pdev->dev);
1900}
1901
1902static void panel_edp_platform_shutdown(struct platform_device *pdev)
1903{
1904 panel_edp_shutdown(&pdev->dev);
1905}
1906
1907static const struct dev_pm_ops panel_edp_pm_ops = {
1908 SET_RUNTIME_PM_OPS(panel_edp_suspend, panel_edp_resume, NULL)
1909 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
1910 pm_runtime_force_resume)
1911};
1912
1913static struct platform_driver panel_edp_platform_driver = {
1914 .driver = {
1915 .name = "panel-edp",
1916 .of_match_table = platform_of_match,
1917 .pm = &panel_edp_pm_ops,
1918 },
1919 .probe = panel_edp_platform_probe,
1920 .remove = panel_edp_platform_remove,
1921 .shutdown = panel_edp_platform_shutdown,
1922};
1923
1924static int panel_edp_dp_aux_ep_probe(struct dp_aux_ep_device *aux_ep)
1925{
1926 const struct of_device_id *id;
1927
1928 id = of_match_node(platform_of_match, aux_ep->dev.of_node);
1929 if (!id)
1930 return -ENODEV;
1931
1932 return panel_edp_probe(&aux_ep->dev, id->data, aux_ep->aux);
1933}
1934
1935static void panel_edp_dp_aux_ep_remove(struct dp_aux_ep_device *aux_ep)
1936{
1937 panel_edp_remove(&aux_ep->dev);
1938}
1939
1940static void panel_edp_dp_aux_ep_shutdown(struct dp_aux_ep_device *aux_ep)
1941{
1942 panel_edp_shutdown(&aux_ep->dev);
1943}
1944
1945static struct dp_aux_ep_driver panel_edp_dp_aux_ep_driver = {
1946 .driver = {
1947 .name = "panel-simple-dp-aux",
1948 .of_match_table = platform_of_match, /* Same as platform one! */
1949 .pm = &panel_edp_pm_ops,
1950 },
1951 .probe = panel_edp_dp_aux_ep_probe,
1952 .remove = panel_edp_dp_aux_ep_remove,
1953 .shutdown = panel_edp_dp_aux_ep_shutdown,
1954};
1955
1956static int __init panel_edp_init(void)
1957{
1958 int err;
1959
1960 err = platform_driver_register(&panel_edp_platform_driver);
1961 if (err < 0)
1962 return err;
1963
1964 err = dp_aux_dp_driver_register(&panel_edp_dp_aux_ep_driver);
1965 if (err < 0)
1966 goto err_did_platform_register;
1967
1968 return 0;
1969
1970err_did_platform_register:
1971 platform_driver_unregister(&panel_edp_platform_driver);
1972
1973 return err;
1974}
1975module_init(panel_edp_init);
1976
1977static void __exit panel_edp_exit(void)
1978{
1979 dp_aux_dp_driver_unregister(&panel_edp_dp_aux_ep_driver);
1980 platform_driver_unregister(&panel_edp_platform_driver);
1981}
1982module_exit(panel_edp_exit);
1983
1984MODULE_AUTHOR("Thierry Reding <treding@nvidia.com>");
1985MODULE_DESCRIPTION("DRM Driver for Simple eDP Panels");
1986MODULE_LICENSE("GPL and additional rights");