Commit | Line | Data |
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cd5351f4 | 1 | /* |
8bb0daff | 2 | * drivers/gpu/drm/omapdrm/omap_drv.h |
cd5351f4 RC |
3 | * |
4 | * Copyright (C) 2011 Texas Instruments | |
5 | * Author: Rob Clark <rob@ti.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify it | |
8 | * under the terms of the GNU General Public License version 2 as published by | |
9 | * the Free Software Foundation. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | |
14 | * more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License along with | |
17 | * this program. If not, see <http://www.gnu.org/licenses/>. | |
18 | */ | |
19 | ||
20 | #ifndef __OMAP_DRV_H__ | |
21 | #define __OMAP_DRV_H__ | |
22 | ||
cd5351f4 | 23 | #include <linux/module.h> |
2d278f54 | 24 | #include <linux/platform_data/omap_drm.h> |
cd5351f4 | 25 | #include <linux/types.h> |
748471a5 | 26 | #include <linux/wait.h> |
2d278f54 | 27 | |
cd5351f4 | 28 | #include <drm/drmP.h> |
ae43d7ca | 29 | #include <drm/drm_crtc_helper.h> |
d9fc9413 | 30 | #include <drm/drm_gem.h> |
2d278f54 | 31 | #include <drm/omap_drm.h> |
f5f9454c | 32 | |
35a339ac TV |
33 | #include "dss/omapdss.h" |
34 | ||
cd5351f4 RC |
35 | #define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__) |
36 | #define VERB(fmt, ...) if (0) DRM_DEBUG(fmt, ##__VA_ARGS__) /* verbose debug */ | |
37 | ||
38 | #define MODULE_NAME "omapdrm" | |
39 | ||
f4302747 LP |
40 | struct omap_drm_usergart; |
41 | ||
f5f9454c RC |
42 | /* parameters which describe (unrotated) coordinates of scanout within a fb: */ |
43 | struct omap_drm_window { | |
44 | uint32_t rotation; | |
45 | int32_t crtc_x, crtc_y; /* signed because can be offscreen */ | |
46 | uint32_t crtc_w, crtc_h; | |
47 | uint32_t src_x, src_y; | |
48 | uint32_t src_w, src_h; | |
49 | }; | |
50 | ||
f5f9454c RC |
51 | /* For KMS code that needs to wait for a certain # of IRQs: |
52 | */ | |
53 | struct omap_irq_wait; | |
54 | struct omap_irq_wait * omap_irq_wait_init(struct drm_device *dev, | |
55 | uint32_t irqmask, int count); | |
56 | int omap_irq_wait(struct drm_device *dev, struct omap_irq_wait *wait, | |
57 | unsigned long timeout); | |
58 | ||
cd5351f4 | 59 | struct omap_drm_private { |
5e3b0874 RC |
60 | uint32_t omaprev; |
61 | ||
cd5351f4 RC |
62 | unsigned int num_crtcs; |
63 | struct drm_crtc *crtcs[8]; | |
f6b6036e | 64 | |
bb5c2d9a RC |
65 | unsigned int num_planes; |
66 | struct drm_plane *planes[8]; | |
f6b6036e | 67 | |
cd5351f4 RC |
68 | unsigned int num_encoders; |
69 | struct drm_encoder *encoders[8]; | |
f6b6036e | 70 | |
cd5351f4 RC |
71 | unsigned int num_connectors; |
72 | struct drm_connector *connectors[8]; | |
73 | ||
74 | struct drm_fb_helper *fbdev; | |
a6a91827 | 75 | |
5609f7fe RC |
76 | struct workqueue_struct *wq; |
77 | ||
76c4055f TV |
78 | /* lock for obj_list below */ |
79 | spinlock_t list_lock; | |
80 | ||
f5f9454c | 81 | /* list of GEM objects: */ |
f6b6036e RC |
82 | struct list_head obj_list; |
83 | ||
f4302747 | 84 | struct omap_drm_usergart *usergart; |
a6a91827 | 85 | bool has_dmm; |
3c810c61 RC |
86 | |
87 | /* properties: */ | |
8451b5ad | 88 | struct drm_property *zorder_prop; |
f5f9454c RC |
89 | |
90 | /* irq handling: */ | |
84e1d457 LP |
91 | spinlock_t wait_lock; /* protects the wait_list */ |
92 | struct list_head wait_list; /* list of omap_irq_wait */ | |
80f91bff | 93 | uint32_t irq_mask; /* enabled irqs in addition to wait_list */ |
748471a5 LP |
94 | |
95 | /* atomic commit */ | |
96 | struct { | |
97 | wait_queue_head_t wait; | |
98 | u32 pending; | |
99 | spinlock_t lock; /* Protects commit.pending */ | |
100 | } commit; | |
3c810c61 RC |
101 | }; |
102 | ||
3c810c61 | 103 | |
6169a148 AG |
104 | #ifdef CONFIG_DEBUG_FS |
105 | int omap_debugfs_init(struct drm_minor *minor); | |
f6b6036e RC |
106 | void omap_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m); |
107 | void omap_gem_describe(struct drm_gem_object *obj, struct seq_file *m); | |
108 | void omap_gem_describe_objects(struct list_head *list, struct seq_file *m); | |
6169a148 AG |
109 | #endif |
110 | ||
4836d157 AG |
111 | #ifdef CONFIG_PM |
112 | int omap_gem_resume(struct device *dev); | |
113 | #endif | |
114 | ||
88e72717 TR |
115 | int omap_irq_enable_vblank(struct drm_device *dev, unsigned int pipe); |
116 | void omap_irq_disable_vblank(struct drm_device *dev, unsigned int pipe); | |
f13ab005 | 117 | void omap_drm_irq_uninstall(struct drm_device *dev); |
f5f9454c RC |
118 | int omap_drm_irq_install(struct drm_device *dev); |
119 | ||
e1c1174f | 120 | #ifdef CONFIG_DRM_FBDEV_EMULATION |
cd5351f4 RC |
121 | struct drm_fb_helper *omap_fbdev_init(struct drm_device *dev); |
122 | void omap_fbdev_free(struct drm_device *dev); | |
e1c1174f LP |
123 | #else |
124 | static inline struct drm_fb_helper *omap_fbdev_init(struct drm_device *dev) | |
125 | { | |
126 | return NULL; | |
127 | } | |
128 | static inline void omap_fbdev_free(struct drm_device *dev) | |
129 | { | |
130 | } | |
131 | #endif | |
cd5351f4 | 132 | |
4520ff28 | 133 | struct videomode *omap_crtc_timings(struct drm_crtc *crtc); |
f5f9454c | 134 | enum omap_channel omap_crtc_channel(struct drm_crtc *crtc); |
04b1fc02 | 135 | void omap_crtc_pre_init(void); |
3a01ab25 | 136 | void omap_crtc_pre_uninit(void); |
cd5351f4 | 137 | struct drm_crtc *omap_crtc_init(struct drm_device *dev, |
f5f9454c | 138 | struct drm_plane *plane, enum omap_channel channel, int id); |
5f741b39 | 139 | int omap_crtc_wait_pending(struct drm_crtc *crtc); |
e0519af7 | 140 | void omap_crtc_error_irq(struct drm_crtc *crtc, uint32_t irqstatus); |
14389a37 | 141 | void omap_crtc_vblank_irq(struct drm_crtc *crtc); |
bb5c2d9a RC |
142 | |
143 | struct drm_plane *omap_plane_init(struct drm_device *dev, | |
e43f2c33 TV |
144 | int id, enum drm_plane_type type, |
145 | u32 possible_crtcs); | |
3c810c61 RC |
146 | void omap_plane_install_properties(struct drm_plane *plane, |
147 | struct drm_mode_object *obj); | |
cd5351f4 RC |
148 | |
149 | struct drm_encoder *omap_encoder_init(struct drm_device *dev, | |
f5f9454c | 150 | struct omap_dss_device *dssdev); |
f5f9454c RC |
151 | |
152 | struct drm_connector *omap_connector_init(struct drm_device *dev, | |
153 | int connector_type, struct omap_dss_device *dssdev, | |
cd5351f4 RC |
154 | struct drm_encoder *encoder); |
155 | struct drm_encoder *omap_connector_attached_encoder( | |
156 | struct drm_connector *connector); | |
4f930c0f | 157 | bool omap_connector_get_hdmi_mode(struct drm_connector *connector); |
cd5351f4 | 158 | |
a890e662 RC |
159 | uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats, |
160 | uint32_t max_formats, enum omap_color_mode supported_modes); | |
cd5351f4 | 161 | struct drm_framebuffer *omap_framebuffer_create(struct drm_device *dev, |
1eb83451 | 162 | struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd); |
cd5351f4 | 163 | struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev, |
1eb83451 | 164 | const struct drm_mode_fb_cmd2 *mode_cmd, struct drm_gem_object **bos); |
5833bd2f | 165 | int omap_framebuffer_pin(struct drm_framebuffer *fb); |
9c368506 | 166 | void omap_framebuffer_unpin(struct drm_framebuffer *fb); |
3c810c61 RC |
167 | void omap_framebuffer_update_scanout(struct drm_framebuffer *fb, |
168 | struct omap_drm_window *win, struct omap_overlay_info *info); | |
cd5351f4 RC |
169 | struct drm_connector *omap_framebuffer_get_next_connector( |
170 | struct drm_framebuffer *fb, struct drm_connector *from); | |
bfeece55 | 171 | bool omap_framebuffer_supports_rotation(struct drm_framebuffer *fb); |
cd5351f4 | 172 | |
f7f9f453 RC |
173 | void omap_gem_init(struct drm_device *dev); |
174 | void omap_gem_deinit(struct drm_device *dev); | |
cd5351f4 RC |
175 | |
176 | struct drm_gem_object *omap_gem_new(struct drm_device *dev, | |
177 | union omap_gem_size gsize, uint32_t flags); | |
b22e6690 LP |
178 | struct drm_gem_object *omap_gem_new_dmabuf(struct drm_device *dev, size_t size, |
179 | struct sg_table *sgt); | |
cd5351f4 RC |
180 | int omap_gem_new_handle(struct drm_device *dev, struct drm_file *file, |
181 | union omap_gem_size gsize, uint32_t flags, uint32_t *handle); | |
182 | void omap_gem_free_object(struct drm_gem_object *obj); | |
cd5351f4 RC |
183 | void *omap_gem_vaddr(struct drm_gem_object *obj); |
184 | int omap_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev, | |
185 | uint32_t handle, uint64_t *offset); | |
cd5351f4 RC |
186 | int omap_gem_dumb_create(struct drm_file *file, struct drm_device *dev, |
187 | struct drm_mode_create_dumb *args); | |
188 | int omap_gem_mmap(struct file *filp, struct vm_area_struct *vma); | |
8b6b569e RC |
189 | int omap_gem_mmap_obj(struct drm_gem_object *obj, |
190 | struct vm_area_struct *vma); | |
11bac800 | 191 | int omap_gem_fault(struct vm_fault *vmf); |
cd5351f4 RC |
192 | int omap_gem_op_start(struct drm_gem_object *obj, enum omap_gem_op op); |
193 | int omap_gem_op_finish(struct drm_gem_object *obj, enum omap_gem_op op); | |
194 | int omap_gem_op_sync(struct drm_gem_object *obj, enum omap_gem_op op); | |
195 | int omap_gem_op_async(struct drm_gem_object *obj, enum omap_gem_op op, | |
196 | void (*fxn)(void *arg), void *arg); | |
a6a91827 | 197 | int omap_gem_roll(struct drm_gem_object *obj, uint32_t roll); |
8b6b569e RC |
198 | void omap_gem_cpu_sync(struct drm_gem_object *obj, int pgoff); |
199 | void omap_gem_dma_sync(struct drm_gem_object *obj, | |
200 | enum dma_data_direction dir); | |
cd5351f4 RC |
201 | int omap_gem_get_paddr(struct drm_gem_object *obj, |
202 | dma_addr_t *paddr, bool remap); | |
393a949f | 203 | void omap_gem_put_paddr(struct drm_gem_object *obj); |
6ad11bc3 RC |
204 | int omap_gem_get_pages(struct drm_gem_object *obj, struct page ***pages, |
205 | bool remap); | |
206 | int omap_gem_put_pages(struct drm_gem_object *obj); | |
207 | uint32_t omap_gem_flags(struct drm_gem_object *obj); | |
3c810c61 RC |
208 | int omap_gem_rotated_paddr(struct drm_gem_object *obj, uint32_t orient, |
209 | int x, int y, dma_addr_t *paddr); | |
cd5351f4 | 210 | uint64_t omap_gem_mmap_offset(struct drm_gem_object *obj); |
f7f9f453 | 211 | size_t omap_gem_mmap_size(struct drm_gem_object *obj); |
3c810c61 | 212 | int omap_gem_tiled_stride(struct drm_gem_object *obj, uint32_t orient); |
cd5351f4 | 213 | |
7ced63cf | 214 | struct dma_buf *omap_gem_prime_export(struct drm_device *dev, |
6ad11bc3 | 215 | struct drm_gem_object *obj, int flags); |
7ced63cf | 216 | struct drm_gem_object *omap_gem_prime_import(struct drm_device *dev, |
3080b838 | 217 | struct dma_buf *buffer); |
6ad11bc3 | 218 | |
f5f9454c | 219 | /* map crtc to vblank mask */ |
0d8f371f | 220 | struct omap_dss_device *omap_encoder_get_dssdev(struct drm_encoder *encoder); |
f5f9454c | 221 | |
cd5351f4 | 222 | #endif /* __OMAP_DRV_H__ */ |