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f92f168f TV |
1 | /* |
2 | * LG.Philips LB035Q02 LCD Panel driver | |
3 | * | |
4 | * Copyright (C) 2013 Texas Instruments | |
5 | * Author: Tomi Valkeinen <tomi.valkeinen@ti.com> | |
6 | * Based on a driver by: Steve Sakoman <steve@sakoman.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify it | |
9 | * under the terms of the GNU General Public License version 2 as published by | |
10 | * the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/spi/spi.h> | |
16 | #include <linux/mutex.h> | |
17 | #include <linux/gpio.h> | |
d9e32ecd | 18 | #include <linux/gpio/consumer.h> |
f92f168f TV |
19 | |
20 | #include <video/omapdss.h> | |
21 | #include <video/omap-panel-data.h> | |
22 | ||
23 | static struct omap_video_timings lb035q02_timings = { | |
24 | .x_res = 320, | |
25 | .y_res = 240, | |
26 | ||
d8d78941 | 27 | .pixelclock = 6500000, |
f92f168f TV |
28 | |
29 | .hsw = 2, | |
30 | .hfp = 20, | |
31 | .hbp = 68, | |
32 | ||
33 | .vsw = 2, | |
34 | .vfp = 4, | |
35 | .vbp = 18, | |
36 | ||
37 | .vsync_level = OMAPDSS_SIG_ACTIVE_LOW, | |
38 | .hsync_level = OMAPDSS_SIG_ACTIVE_LOW, | |
39 | .data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE, | |
40 | .de_level = OMAPDSS_SIG_ACTIVE_HIGH, | |
7a16360d | 41 | .sync_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE, |
f92f168f TV |
42 | }; |
43 | ||
44 | struct panel_drv_data { | |
45 | struct omap_dss_device dssdev; | |
46 | struct omap_dss_device *in; | |
47 | ||
48 | struct spi_device *spi; | |
49 | ||
50 | int data_lines; | |
51 | ||
52 | struct omap_video_timings videomode; | |
53 | ||
fbf73098 | 54 | /* used for non-DT boot, to be removed */ |
f92f168f | 55 | int backlight_gpio; |
fbf73098 TV |
56 | |
57 | struct gpio_desc *enable_gpio; | |
f92f168f TV |
58 | }; |
59 | ||
60 | #define to_panel_data(p) container_of(p, struct panel_drv_data, dssdev) | |
61 | ||
62 | static int lb035q02_write_reg(struct spi_device *spi, u8 reg, u16 val) | |
63 | { | |
64 | struct spi_message msg; | |
65 | struct spi_transfer index_xfer = { | |
66 | .len = 3, | |
67 | .cs_change = 1, | |
68 | }; | |
69 | struct spi_transfer value_xfer = { | |
70 | .len = 3, | |
71 | }; | |
72 | u8 buffer[16]; | |
73 | ||
74 | spi_message_init(&msg); | |
75 | ||
76 | /* register index */ | |
77 | buffer[0] = 0x70; | |
78 | buffer[1] = 0x00; | |
79 | buffer[2] = reg & 0x7f; | |
80 | index_xfer.tx_buf = buffer; | |
81 | spi_message_add_tail(&index_xfer, &msg); | |
82 | ||
83 | /* register value */ | |
84 | buffer[4] = 0x72; | |
85 | buffer[5] = val >> 8; | |
86 | buffer[6] = val; | |
87 | value_xfer.tx_buf = buffer + 4; | |
88 | spi_message_add_tail(&value_xfer, &msg); | |
89 | ||
90 | return spi_sync(spi, &msg); | |
91 | } | |
92 | ||
93 | static void init_lb035q02_panel(struct spi_device *spi) | |
94 | { | |
95 | /* Init sequence from page 28 of the lb035q02 spec */ | |
96 | lb035q02_write_reg(spi, 0x01, 0x6300); | |
97 | lb035q02_write_reg(spi, 0x02, 0x0200); | |
98 | lb035q02_write_reg(spi, 0x03, 0x0177); | |
99 | lb035q02_write_reg(spi, 0x04, 0x04c7); | |
100 | lb035q02_write_reg(spi, 0x05, 0xffc0); | |
101 | lb035q02_write_reg(spi, 0x06, 0xe806); | |
102 | lb035q02_write_reg(spi, 0x0a, 0x4008); | |
103 | lb035q02_write_reg(spi, 0x0b, 0x0000); | |
104 | lb035q02_write_reg(spi, 0x0d, 0x0030); | |
105 | lb035q02_write_reg(spi, 0x0e, 0x2800); | |
106 | lb035q02_write_reg(spi, 0x0f, 0x0000); | |
107 | lb035q02_write_reg(spi, 0x16, 0x9f80); | |
108 | lb035q02_write_reg(spi, 0x17, 0x0a0f); | |
109 | lb035q02_write_reg(spi, 0x1e, 0x00c1); | |
110 | lb035q02_write_reg(spi, 0x30, 0x0300); | |
111 | lb035q02_write_reg(spi, 0x31, 0x0007); | |
112 | lb035q02_write_reg(spi, 0x32, 0x0000); | |
113 | lb035q02_write_reg(spi, 0x33, 0x0000); | |
114 | lb035q02_write_reg(spi, 0x34, 0x0707); | |
115 | lb035q02_write_reg(spi, 0x35, 0x0004); | |
116 | lb035q02_write_reg(spi, 0x36, 0x0302); | |
117 | lb035q02_write_reg(spi, 0x37, 0x0202); | |
118 | lb035q02_write_reg(spi, 0x3a, 0x0a0d); | |
119 | lb035q02_write_reg(spi, 0x3b, 0x0806); | |
120 | } | |
121 | ||
122 | static int lb035q02_connect(struct omap_dss_device *dssdev) | |
123 | { | |
124 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
125 | struct omap_dss_device *in = ddata->in; | |
126 | int r; | |
127 | ||
128 | if (omapdss_device_is_connected(dssdev)) | |
129 | return 0; | |
130 | ||
131 | r = in->ops.dpi->connect(in, dssdev); | |
132 | if (r) | |
133 | return r; | |
134 | ||
135 | init_lb035q02_panel(ddata->spi); | |
136 | ||
137 | return 0; | |
138 | } | |
139 | ||
140 | static void lb035q02_disconnect(struct omap_dss_device *dssdev) | |
141 | { | |
142 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
143 | struct omap_dss_device *in = ddata->in; | |
144 | ||
145 | if (!omapdss_device_is_connected(dssdev)) | |
146 | return; | |
147 | ||
148 | in->ops.dpi->disconnect(in, dssdev); | |
149 | } | |
150 | ||
151 | static int lb035q02_enable(struct omap_dss_device *dssdev) | |
152 | { | |
153 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
154 | struct omap_dss_device *in = ddata->in; | |
155 | int r; | |
156 | ||
157 | if (!omapdss_device_is_connected(dssdev)) | |
158 | return -ENODEV; | |
159 | ||
160 | if (omapdss_device_is_enabled(dssdev)) | |
161 | return 0; | |
162 | ||
1b71f104 TV |
163 | if (ddata->data_lines) |
164 | in->ops.dpi->set_data_lines(in, ddata->data_lines); | |
f92f168f TV |
165 | in->ops.dpi->set_timings(in, &ddata->videomode); |
166 | ||
167 | r = in->ops.dpi->enable(in); | |
168 | if (r) | |
169 | return r; | |
170 | ||
fbf73098 TV |
171 | if (ddata->enable_gpio) |
172 | gpiod_set_value_cansleep(ddata->enable_gpio, 1); | |
f92f168f TV |
173 | |
174 | if (gpio_is_valid(ddata->backlight_gpio)) | |
175 | gpio_set_value_cansleep(ddata->backlight_gpio, 1); | |
176 | ||
177 | dssdev->state = OMAP_DSS_DISPLAY_ACTIVE; | |
178 | ||
179 | return 0; | |
180 | } | |
181 | ||
182 | static void lb035q02_disable(struct omap_dss_device *dssdev) | |
183 | { | |
184 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
185 | struct omap_dss_device *in = ddata->in; | |
186 | ||
187 | if (!omapdss_device_is_enabled(dssdev)) | |
188 | return; | |
189 | ||
fbf73098 TV |
190 | if (ddata->enable_gpio) |
191 | gpiod_set_value_cansleep(ddata->enable_gpio, 0); | |
f92f168f TV |
192 | |
193 | if (gpio_is_valid(ddata->backlight_gpio)) | |
194 | gpio_set_value_cansleep(ddata->backlight_gpio, 0); | |
195 | ||
196 | in->ops.dpi->disable(in); | |
197 | ||
198 | dssdev->state = OMAP_DSS_DISPLAY_DISABLED; | |
199 | } | |
200 | ||
201 | static void lb035q02_set_timings(struct omap_dss_device *dssdev, | |
202 | struct omap_video_timings *timings) | |
203 | { | |
204 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
205 | struct omap_dss_device *in = ddata->in; | |
206 | ||
207 | ddata->videomode = *timings; | |
208 | dssdev->panel.timings = *timings; | |
209 | ||
210 | in->ops.dpi->set_timings(in, timings); | |
211 | } | |
212 | ||
213 | static void lb035q02_get_timings(struct omap_dss_device *dssdev, | |
214 | struct omap_video_timings *timings) | |
215 | { | |
216 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
217 | ||
218 | *timings = ddata->videomode; | |
219 | } | |
220 | ||
221 | static int lb035q02_check_timings(struct omap_dss_device *dssdev, | |
222 | struct omap_video_timings *timings) | |
223 | { | |
224 | struct panel_drv_data *ddata = to_panel_data(dssdev); | |
225 | struct omap_dss_device *in = ddata->in; | |
226 | ||
227 | return in->ops.dpi->check_timings(in, timings); | |
228 | } | |
229 | ||
230 | static struct omap_dss_driver lb035q02_ops = { | |
231 | .connect = lb035q02_connect, | |
232 | .disconnect = lb035q02_disconnect, | |
233 | ||
234 | .enable = lb035q02_enable, | |
235 | .disable = lb035q02_disable, | |
236 | ||
237 | .set_timings = lb035q02_set_timings, | |
238 | .get_timings = lb035q02_get_timings, | |
239 | .check_timings = lb035q02_check_timings, | |
240 | ||
241 | .get_resolution = omapdss_default_get_resolution, | |
242 | }; | |
243 | ||
1b71f104 TV |
244 | static int lb035q02_probe_of(struct spi_device *spi) |
245 | { | |
246 | struct device_node *node = spi->dev.of_node; | |
247 | struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev); | |
248 | struct omap_dss_device *in; | |
249 | struct gpio_desc *gpio; | |
250 | ||
ca8c67da | 251 | gpio = devm_gpiod_get(&spi->dev, "enable", GPIOD_OUT_LOW); |
1b71f104 TV |
252 | if (IS_ERR(gpio)) { |
253 | dev_err(&spi->dev, "failed to parse enable gpio\n"); | |
254 | return PTR_ERR(gpio); | |
1b71f104 TV |
255 | } |
256 | ||
ca8c67da UKK |
257 | ddata->enable_gpio = gpio; |
258 | ||
1b71f104 TV |
259 | ddata->backlight_gpio = -ENOENT; |
260 | ||
261 | in = omapdss_of_find_source_for_first_ep(node); | |
262 | if (IS_ERR(in)) { | |
263 | dev_err(&spi->dev, "failed to find video source\n"); | |
264 | return PTR_ERR(in); | |
265 | } | |
266 | ||
267 | ddata->in = in; | |
268 | ||
269 | return 0; | |
270 | } | |
271 | ||
f92f168f TV |
272 | static int lb035q02_panel_spi_probe(struct spi_device *spi) |
273 | { | |
274 | struct panel_drv_data *ddata; | |
275 | struct omap_dss_device *dssdev; | |
276 | int r; | |
277 | ||
278 | ddata = devm_kzalloc(&spi->dev, sizeof(*ddata), GFP_KERNEL); | |
279 | if (ddata == NULL) | |
280 | return -ENOMEM; | |
281 | ||
282 | dev_set_drvdata(&spi->dev, ddata); | |
283 | ||
284 | ddata->spi = spi; | |
285 | ||
4e040ec7 | 286 | if (!spi->dev.of_node) |
f92f168f | 287 | return -ENODEV; |
4e040ec7 TV |
288 | |
289 | r = lb035q02_probe_of(spi); | |
290 | if (r) | |
291 | return r; | |
f92f168f | 292 | |
f92f168f TV |
293 | if (gpio_is_valid(ddata->backlight_gpio)) { |
294 | r = devm_gpio_request_one(&spi->dev, ddata->backlight_gpio, | |
295 | GPIOF_OUT_INIT_LOW, "panel backlight"); | |
296 | if (r) | |
297 | goto err_gpio; | |
298 | } | |
299 | ||
300 | ddata->videomode = lb035q02_timings; | |
301 | ||
302 | dssdev = &ddata->dssdev; | |
303 | dssdev->dev = &spi->dev; | |
304 | dssdev->driver = &lb035q02_ops; | |
305 | dssdev->type = OMAP_DISPLAY_TYPE_DPI; | |
306 | dssdev->owner = THIS_MODULE; | |
307 | dssdev->panel.timings = ddata->videomode; | |
308 | dssdev->phy.dpi.data_lines = ddata->data_lines; | |
309 | ||
310 | r = omapdss_register_display(dssdev); | |
311 | if (r) { | |
312 | dev_err(&spi->dev, "Failed to register panel\n"); | |
313 | goto err_reg; | |
314 | } | |
315 | ||
316 | return 0; | |
317 | ||
318 | err_reg: | |
319 | err_gpio: | |
320 | omap_dss_put_device(ddata->in); | |
321 | return r; | |
322 | } | |
323 | ||
324 | static int lb035q02_panel_spi_remove(struct spi_device *spi) | |
325 | { | |
326 | struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev); | |
327 | struct omap_dss_device *dssdev = &ddata->dssdev; | |
328 | struct omap_dss_device *in = ddata->in; | |
329 | ||
330 | omapdss_unregister_display(dssdev); | |
331 | ||
332 | lb035q02_disable(dssdev); | |
333 | lb035q02_disconnect(dssdev); | |
334 | ||
335 | omap_dss_put_device(in); | |
336 | ||
337 | return 0; | |
338 | } | |
339 | ||
1b71f104 TV |
340 | static const struct of_device_id lb035q02_of_match[] = { |
341 | { .compatible = "omapdss,lgphilips,lb035q02", }, | |
342 | {}, | |
343 | }; | |
344 | ||
345 | MODULE_DEVICE_TABLE(of, lb035q02_of_match); | |
346 | ||
f92f168f TV |
347 | static struct spi_driver lb035q02_spi_driver = { |
348 | .probe = lb035q02_panel_spi_probe, | |
349 | .remove = lb035q02_panel_spi_remove, | |
350 | .driver = { | |
351 | .name = "panel_lgphilips_lb035q02", | |
1b71f104 | 352 | .of_match_table = lb035q02_of_match, |
422ccbd5 | 353 | .suppress_bind_attrs = true, |
f92f168f TV |
354 | }, |
355 | }; | |
356 | ||
357 | module_spi_driver(lb035q02_spi_driver); | |
358 | ||
1b71f104 | 359 | MODULE_ALIAS("spi:lgphilips,lb035q02"); |
f92f168f TV |
360 | MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ti.com>"); |
361 | MODULE_DESCRIPTION("LG.Philips LB035Q02 LCD Panel driver"); | |
362 | MODULE_LICENSE("GPL"); |