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1 | /* |
2 | * Copyright 2013 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
a8c4362b | 24 | #include "nv50.h" |
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25 | |
26 | #include <subdev/bios.h> | |
27 | #include <subdev/bios/bit.h> | |
28 | #include <subdev/bios/pmu.h> | |
920c58a7 | 29 | #include <subdev/timer.h> |
ba6e34e6 | 30 | |
ba6e34e6 | 31 | static void |
266f8b5e | 32 | pmu_code(struct nv50_devinit *init, u32 pmu, u32 img, u32 len, bool sec) |
ba6e34e6 | 33 | { |
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34 | struct nvkm_device *device = init->base.subdev.device; |
35 | struct nvkm_bios *bios = device->bios; | |
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36 | int i; |
37 | ||
8ac3f64f | 38 | nvkm_wr32(device, 0x10a180, 0x01000000 | (sec ? 0x10000000 : 0) | pmu); |
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39 | for (i = 0; i < len; i += 4) { |
40 | if ((i & 0xff) == 0) | |
8ac3f64f | 41 | nvkm_wr32(device, 0x10a188, (pmu + i) >> 8); |
7f5f518f | 42 | nvkm_wr32(device, 0x10a184, nvbios_rd32(bios, img + i)); |
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43 | } |
44 | ||
45 | while (i & 0xff) { | |
8ac3f64f | 46 | nvkm_wr32(device, 0x10a184, 0x00000000); |
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47 | i += 4; |
48 | } | |
49 | } | |
50 | ||
51 | static void | |
266f8b5e | 52 | pmu_data(struct nv50_devinit *init, u32 pmu, u32 img, u32 len) |
ba6e34e6 | 53 | { |
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54 | struct nvkm_device *device = init->base.subdev.device; |
55 | struct nvkm_bios *bios = device->bios; | |
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56 | int i; |
57 | ||
8ac3f64f | 58 | nvkm_wr32(device, 0x10a1c0, 0x01000000 | pmu); |
ba6e34e6 | 59 | for (i = 0; i < len; i += 4) |
7f5f518f | 60 | nvkm_wr32(device, 0x10a1c4, nvbios_rd32(bios, img + i)); |
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61 | } |
62 | ||
63 | static u32 | |
266f8b5e | 64 | pmu_args(struct nv50_devinit *init, u32 argp, u32 argi) |
ba6e34e6 | 65 | { |
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66 | struct nvkm_device *device = init->base.subdev.device; |
67 | nvkm_wr32(device, 0x10a1c0, argp); | |
68 | nvkm_wr32(device, 0x10a1c0, nvkm_rd32(device, 0x10a1c4) + argi); | |
69 | return nvkm_rd32(device, 0x10a1c4); | |
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70 | } |
71 | ||
72 | static void | |
266f8b5e | 73 | pmu_exec(struct nv50_devinit *init, u32 init_addr) |
ba6e34e6 | 74 | { |
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75 | struct nvkm_device *device = init->base.subdev.device; |
76 | nvkm_wr32(device, 0x10a104, init_addr); | |
77 | nvkm_wr32(device, 0x10a10c, 0x00000000); | |
78 | nvkm_wr32(device, 0x10a100, 0x00000002); | |
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79 | } |
80 | ||
81 | static int | |
266f8b5e | 82 | pmu_load(struct nv50_devinit *init, u8 type, bool post, |
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83 | u32 *init_addr_pmu, u32 *args_addr_pmu) |
84 | { | |
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85 | struct nvkm_subdev *subdev = &init->base.subdev; |
86 | struct nvkm_bios *bios = subdev->device->bios; | |
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87 | struct nvbios_pmuR pmu; |
88 | ||
3483f081 | 89 | if (!nvbios_pmuRm(bios, type, &pmu)) |
ba6e34e6 | 90 | return -EINVAL; |
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91 | |
92 | if (!post) | |
93 | return 0; | |
94 | ||
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95 | pmu_code(init, pmu.boot_addr_pmu, pmu.boot_addr, pmu.boot_size, false); |
96 | pmu_code(init, pmu.code_addr_pmu, pmu.code_addr, pmu.code_size, true); | |
97 | pmu_data(init, pmu.data_addr_pmu, pmu.data_addr, pmu.data_size); | |
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98 | |
99 | if (init_addr_pmu) { | |
100 | *init_addr_pmu = pmu.init_addr_pmu; | |
101 | *args_addr_pmu = pmu.args_addr_pmu; | |
102 | return 0; | |
103 | } | |
104 | ||
266f8b5e | 105 | return pmu_exec(init, pmu.init_addr_pmu), 0; |
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106 | } |
107 | ||
8769dc98 | 108 | int |
db1eb528 | 109 | gm200_devinit_post(struct nvkm_devinit *base, bool post) |
ba6e34e6 | 110 | { |
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111 | struct nv50_devinit *init = nv50_devinit(base); |
112 | struct nvkm_subdev *subdev = &init->base.subdev; | |
aa860e4b | 113 | struct nvkm_device *device = subdev->device; |
8ac3f64f | 114 | struct nvkm_bios *bios = device->bios; |
ba6e34e6 | 115 | struct bit_entry bit_I; |
266f8b5e | 116 | u32 exec, args; |
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117 | int ret; |
118 | ||
119 | if (bit_entry(bios, 'I', &bit_I) || bit_I.version != 1 || | |
120 | bit_I.length < 0x1c) { | |
aa860e4b | 121 | nvkm_error(subdev, "VBIOS PMU init data not found\n"); |
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122 | return -EINVAL; |
123 | } | |
124 | ||
3483f081 | 125 | /* Upload DEVINIT application from VBIOS onto PMU. */ |
266f8b5e | 126 | ret = pmu_load(init, 0x04, post, &exec, &args); |
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127 | if (ret) { |
128 | nvkm_error(subdev, "VBIOS PMU/DEVINIT not found\n"); | |
ba6e34e6 | 129 | return ret; |
3483f081 | 130 | } |
ba6e34e6 | 131 | |
3483f081 | 132 | /* Upload tables required by opcodes in boot scripts. */ |
ba6e34e6 | 133 | if (post) { |
266f8b5e | 134 | u32 pmu = pmu_args(init, args + 0x08, 0x08); |
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135 | u32 img = nvbios_rd16(bios, bit_I.offset + 0x14); |
136 | u32 len = nvbios_rd16(bios, bit_I.offset + 0x16); | |
266f8b5e | 137 | pmu_data(init, pmu, img, len); |
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138 | } |
139 | ||
3483f081 | 140 | /* Upload boot scripts. */ |
ba6e34e6 | 141 | if (post) { |
266f8b5e | 142 | u32 pmu = pmu_args(init, args + 0x08, 0x10); |
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143 | u32 img = nvbios_rd16(bios, bit_I.offset + 0x18); |
144 | u32 len = nvbios_rd16(bios, bit_I.offset + 0x1a); | |
266f8b5e | 145 | pmu_data(init, pmu, img, len); |
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146 | } |
147 | ||
3483f081 | 148 | /* Execute DEVINIT. */ |
ba6e34e6 | 149 | if (post) { |
8ac3f64f | 150 | nvkm_wr32(device, 0x10a040, 0x00005000); |
266f8b5e | 151 | pmu_exec(init, exec); |
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152 | if (nvkm_msec(device, 2000, |
153 | if (nvkm_rd32(device, 0x10a040) & 0x00002000) | |
154 | break; | |
155 | ) < 0) | |
156 | return -ETIMEDOUT; | |
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157 | } |
158 | ||
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159 | /* Optional: Execute PRE_OS application on PMU, which should at |
160 | * least take care of fans until a full PMU has been loaded. | |
161 | */ | |
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162 | pmu_load(init, 0x01, post, NULL, NULL); |
163 | return 0; | |
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164 | } |
165 | ||
151abd44 | 166 | static const struct nvkm_devinit_func |
db1eb528 | 167 | gm200_devinit = { |
a6a0f67c | 168 | .preinit = gf100_devinit_preinit, |
151abd44 | 169 | .init = nv50_devinit_init, |
db1eb528 | 170 | .post = gm200_devinit_post, |
a8c4362b | 171 | .pll_set = gf100_devinit_pll_set, |
ba6e34e6 | 172 | .disable = gm107_devinit_disable, |
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173 | }; |
174 | ||
175 | int | |
db1eb528 | 176 | gm200_devinit_new(struct nvkm_device *device, int index, |
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177 | struct nvkm_devinit **pinit) |
178 | { | |
db1eb528 | 179 | return nv50_devinit_new_(&gm200_devinit, device, index, pinit); |
151abd44 | 180 | } |