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1 | /* |
2 | * Copyright 2018 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | */ | |
22 | #include "ior.h" | |
23 | ||
24 | #include <subdev/timer.h> | |
25 | ||
26 | static void | |
86037742 | 27 | tu102_sor_dp_vcpi(struct nvkm_ior *sor, int head, |
114b6556 BS |
28 | u8 slot, u8 slot_nr, u16 pbn, u16 aligned) |
29 | { | |
30 | struct nvkm_device *device = sor->disp->engine.subdev.device; | |
31 | const u32 hoff = head * 0x800; | |
32 | ||
33 | nvkm_mask(device, 0x61657c + hoff, 0xffffffff, (aligned << 16) | pbn); | |
34 | nvkm_mask(device, 0x616578 + hoff, 0x00003f3f, (slot_nr << 8) | slot); | |
35 | } | |
36 | ||
37 | static int | |
86037742 | 38 | tu102_sor_dp_links(struct nvkm_ior *sor, struct nvkm_i2c_aux *aux) |
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39 | { |
40 | struct nvkm_device *device = sor->disp->engine.subdev.device; | |
41 | const u32 soff = nv50_ior_base(sor); | |
42 | const u32 loff = nv50_sor_link(sor); | |
43 | u32 dpctrl = 0x00000000; | |
44 | u32 clksor = 0x00000000; | |
45 | ||
46 | clksor |= sor->dp.bw << 18; | |
47 | dpctrl |= ((1 << sor->dp.nr) - 1) << 16; | |
48 | if (sor->dp.mst) | |
49 | dpctrl |= 0x40000000; | |
50 | if (sor->dp.ef) | |
51 | dpctrl |= 0x00004000; | |
52 | ||
53 | nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor); | |
54 | ||
55 | /*XXX*/ | |
56 | nvkm_msec(device, 40, NVKM_DELAY); | |
57 | nvkm_mask(device, 0x612300 + soff, 0x00030000, 0x00010000); | |
58 | nvkm_mask(device, 0x61c10c + loff, 0x00000003, 0x00000001); | |
59 | ||
60 | nvkm_mask(device, 0x61c10c + loff, 0x401f4000, dpctrl); | |
61 | return 0; | |
62 | } | |
63 | ||
64 | static const struct nvkm_ior_func | |
86037742 | 65 | tu102_sor = { |
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66 | .route = { |
67 | .get = gm200_sor_route_get, | |
68 | .set = gm200_sor_route_set, | |
69 | }, | |
70 | .state = gv100_sor_state, | |
71 | .power = nv50_sor_power, | |
72 | .clock = gf119_sor_clock, | |
73 | .hdmi = { | |
74 | .ctrl = gv100_hdmi_ctrl, | |
3485b7b5 | 75 | .scdc = gm200_hdmi_scdc, |
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76 | }, |
77 | .dp = { | |
78 | .lanes = { 0, 1, 2, 3 }, | |
86037742 | 79 | .links = tu102_sor_dp_links, |
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80 | .power = g94_sor_dp_power, |
81 | .pattern = gm107_sor_dp_pattern, | |
82 | .drive = gm200_sor_dp_drive, | |
86037742 | 83 | .vcpi = tu102_sor_dp_vcpi, |
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84 | .audio = gv100_sor_dp_audio, |
85 | .audio_sym = gv100_sor_dp_audio_sym, | |
86 | .watermark = gv100_sor_dp_watermark, | |
87 | }, | |
88 | .hda = { | |
89 | .hpd = gf119_hda_hpd, | |
90 | .eld = gf119_hda_eld, | |
91 | }, | |
92 | }; | |
93 | ||
94 | int | |
86037742 | 95 | tu102_sor_new(struct nvkm_disp *disp, int id) |
114b6556 | 96 | { |
86037742 | 97 | return nvkm_ior_new_(&tu102_sor, disp, SOR, id); |
114b6556 | 98 | } |