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1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
a8f8b489 | 24 | #include "priv.h" |
1d7c71a3 | 25 | |
70aa8670 BS |
26 | static const struct nvkm_disp_oclass * |
27 | nv04_disp_root(struct nvkm_disp *disp) | |
28 | { | |
29 | return &nv04_disp_root_oclass; | |
30 | } | |
31 | ||
1d7c71a3 | 32 | static void |
70aa8670 | 33 | nv04_disp_vblank_init(struct nvkm_disp *disp, int head) |
1d7c71a3 | 34 | { |
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35 | struct nvkm_device *device = disp->engine.subdev.device; |
36 | nvkm_wr32(device, 0x600140 + (head * 0x2000) , 0x00000001); | |
1d7c71a3 BS |
37 | } |
38 | ||
ebb945a9 | 39 | static void |
70aa8670 | 40 | nv04_disp_vblank_fini(struct nvkm_disp *disp, int head) |
ebb945a9 | 41 | { |
2fde1f1c BS |
42 | struct nvkm_device *device = disp->engine.subdev.device; |
43 | nvkm_wr32(device, 0x600140 + (head * 0x2000) , 0x00000000); | |
ebb945a9 BS |
44 | } |
45 | ||
46 | static void | |
70aa8670 | 47 | nv04_disp_intr(struct nvkm_disp *disp) |
ebb945a9 | 48 | { |
70aa8670 BS |
49 | struct nvkm_subdev *subdev = &disp->engine.subdev; |
50 | struct nvkm_device *device = subdev->device; | |
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51 | u32 crtc0 = nvkm_rd32(device, 0x600100); |
52 | u32 crtc1 = nvkm_rd32(device, 0x602100); | |
515de6b2 | 53 | u32 pvideo; |
ebb945a9 BS |
54 | |
55 | if (crtc0 & 0x00000001) { | |
fd166a18 | 56 | nvkm_disp_vblank(disp, 0); |
2fde1f1c | 57 | nvkm_wr32(device, 0x600100, 0x00000001); |
ebb945a9 BS |
58 | } |
59 | ||
60 | if (crtc1 & 0x00000001) { | |
fd166a18 | 61 | nvkm_disp_vblank(disp, 1); |
2fde1f1c | 62 | nvkm_wr32(device, 0x602100, 0x00000001); |
ebb945a9 | 63 | } |
515de6b2 | 64 | |
70aa8670 | 65 | if (device->chipset >= 0x10 && device->chipset <= 0x40) { |
2fde1f1c | 66 | pvideo = nvkm_rd32(device, 0x8100); |
515de6b2 | 67 | if (pvideo & ~0x11) |
84407824 | 68 | nvkm_info(subdev, "PVIDEO intr: %08x\n", pvideo); |
2fde1f1c | 69 | nvkm_wr32(device, 0x8100, pvideo); |
515de6b2 | 70 | } |
ebb945a9 BS |
71 | } |
72 | ||
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73 | static const struct nvkm_disp_func |
74 | nv04_disp = { | |
70aa8670 BS |
75 | .intr = nv04_disp_intr, |
76 | .root = nv04_disp_root, | |
77 | .head.vblank_init = nv04_disp_vblank_init, | |
78 | .head.vblank_fini = nv04_disp_vblank_fini, | |
0ce41e3c BS |
79 | }; |
80 | ||
70aa8670 BS |
81 | int |
82 | nv04_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp) | |
ebb945a9 | 83 | { |
70aa8670 | 84 | return nvkm_disp_new_(&nv04_disp, device, index, 2, pdisp); |
ebb945a9 | 85 | } |