[linux-2.6-block.git] / drivers / gpu / drm / nouveau / nvkm / engine / device / tegra.c

/*
 * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */
#include <core/tegra.h>
#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
#include "priv.h"

static int
nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev)
{
	int ret;

	ret = regulator_enable(tdev->vdd);
	if (ret)
		goto err_power;

	ret = clk_prepare_enable(tdev->clk);
	if (ret)
		goto err_clk;
	if (tdev->clk_ref) {
		ret = clk_prepare_enable(tdev->clk_ref);
		if (ret)
			goto err_clk_ref;
	}
	ret = clk_prepare_enable(tdev->clk_pwr);
	if (ret)
		goto err_clk_pwr;
	clk_set_rate(tdev->clk_pwr, 204000000);
	udelay(10);

	reset_control_assert(tdev->rst);
	udelay(10);

	ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D);
	if (ret)
		goto err_clamp;
	udelay(10);

	reset_control_deassert(tdev->rst);
	udelay(10);

	return 0;

err_clamp:
	clk_disable_unprepare(tdev->clk_pwr);
err_clk_pwr:
	if (tdev->clk_ref)
		clk_disable_unprepare(tdev->clk_ref);
err_clk_ref:
	clk_disable_unprepare(tdev->clk);
err_clk:
	regulator_disable(tdev->vdd);
err_power:
	return ret;
}

static int
nvkm_device_tegra_power_down(struct nvkm_device_tegra *tdev)
{
	reset_control_assert(tdev->rst);
	udelay(10);

	clk_disable_unprepare(tdev->clk_pwr);
	if (tdev->clk_ref)
		clk_disable_unprepare(tdev->clk_ref);
	clk_disable_unprepare(tdev->clk);
	udelay(10);

	return regulator_disable(tdev->vdd);
}

static void
nvkm_device_tegra_probe_iommu(struct nvkm_device_tegra *tdev)
{
#if IS_ENABLED(CONFIG_IOMMU_API)
	struct device *dev = &tdev->pdev->dev;
	unsigned long pgsize_bitmap;
	int ret;

	if (!tdev->func->iommu_bit)
		return;

	mutex_init(&tdev->iommu.mutex);

	if (iommu_present(&platform_bus_type)) {
		tdev->iommu.domain = iommu_domain_alloc(&platform_bus_type);
		if (IS_ERR(tdev->iommu.domain))
			goto error;

		/*
		 * A IOMMU is only usable if it supports page sizes smaller
		 * or equal to the system's PAGE_SIZE, with a preference if
		 * both are equal.
		 */
		pgsize_bitmap = tdev->iommu.domain->ops->pgsize_bitmap;
		if (pgsize_bitmap & PAGE_SIZE) {
			tdev->iommu.pgshift = PAGE_SHIFT;
		} else {
			tdev->iommu.pgshift = fls(pgsize_bitmap & ~PAGE_MASK);
			if (tdev->iommu.pgshift == 0) {
				dev_warn(dev, "unsupported IOMMU page size\n");
				goto free_domain;
			}
			tdev->iommu.pgshift -= 1;
		}

		ret = iommu_attach_device(tdev->iommu.domain, dev);
		if (ret)
			goto free_domain;

		ret = nvkm_mm_init(&tdev->iommu.mm, 0,
				   (1ULL << tdev->func->iommu_bit) >>
				   tdev->iommu.pgshift, 1);
		if (ret)
			goto detach_device;
	}

	return;

detach_device:
	iommu_detach_device(tdev->iommu.domain, dev);

free_domain:
	iommu_domain_free(tdev->iommu.domain);

error:
	tdev->iommu.domain = NULL;
	tdev->iommu.pgshift = 0;
	dev_err(dev, "cannot initialize IOMMU MM\n");
#endif
}

static void
nvkm_device_tegra_remove_iommu(struct nvkm_device_tegra *tdev)
{
#if IS_ENABLED(CONFIG_IOMMU_API)
	if (tdev->iommu.domain) {
		nvkm_mm_fini(&tdev->iommu.mm);
		iommu_detach_device(tdev->iommu.domain, tdev->device.dev);
		iommu_domain_free(tdev->iommu.domain);
	}
#endif
}

static struct nvkm_device_tegra *
nvkm_device_tegra(struct nvkm_device *device)
{
	return container_of(device, struct nvkm_device_tegra, device);
}

static struct resource *
nvkm_device_tegra_resource(struct nvkm_device *device, unsigned bar)
{
	struct nvkm_device_tegra *tdev = nvkm_device_tegra(device);
	return platform_get_resource(tdev->pdev, IORESOURCE_MEM, bar);
}

static resource_size_t
nvkm_device_tegra_resource_addr(struct nvkm_device *device, unsigned bar)
{
	struct resource *res = nvkm_device_tegra_resource(device, bar);
	return res ? res->start : 0;
}

static resource_size_t
nvkm_device_tegra_resource_size(struct nvkm_device *device, unsigned bar)
{
	struct resource *res = nvkm_device_tegra_resource(device, bar);
	return res ? resource_size(res) : 0;
}

static irqreturn_t
nvkm_device_tegra_intr(int irq, void *arg)
{
	struct nvkm_device_tegra *tdev = arg;
	struct nvkm_mc *mc = tdev->device.mc;
	bool handled = false;
	if (likely(mc)) {
		nvkm_mc_intr_unarm(mc);
		nvkm_mc_intr(mc, &handled);
		nvkm_mc_intr_rearm(mc);
	}
	return handled ? IRQ_HANDLED : IRQ_NONE;
}

static void
nvkm_device_tegra_fini(struct nvkm_device *device, bool suspend)
{
	struct nvkm_device_tegra *tdev = nvkm_device_tegra(device);
	if (tdev->irq) {
		free_irq(tdev->irq, tdev);
		tdev->irq = 0;
	};
}

static int
nvkm_device_tegra_init(struct nvkm_device *device)
{
	struct nvkm_device_tegra *tdev = nvkm_device_tegra(device);
	int irq, ret;

	irq = platform_get_irq_byname(tdev->pdev, "stall");
	if (irq < 0)
		return irq;

	ret = request_irq(irq, nvkm_device_tegra_intr,
			  IRQF_SHARED, "nvkm", tdev);
	if (ret)
		return ret;

	tdev->irq = irq;
	return 0;
}

static void *
nvkm_device_tegra_dtor(struct nvkm_device *device)
{
	struct nvkm_device_tegra *tdev = nvkm_device_tegra(device);
	nvkm_device_tegra_power_down(tdev);
	nvkm_device_tegra_remove_iommu(tdev);
	return tdev;
}

static const struct nvkm_device_func
nvkm_device_tegra_func = {
	.tegra = nvkm_device_tegra,
	.dtor = nvkm_device_tegra_dtor,
	.init = nvkm_device_tegra_init,
	.fini = nvkm_device_tegra_fini,
	.resource_addr = nvkm_device_tegra_resource_addr,
	.resource_size = nvkm_device_tegra_resource_size,
	.cpu_coherent = false,
};

int
nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func,
		      struct platform_device *pdev,
		      const char *cfg, const char *dbg,
		      bool detect, bool mmio, u64 subdev_mask,
		      struct nvkm_device **pdevice)
{
	struct nvkm_device_tegra *tdev;
	int ret;

	if (!(tdev = kzalloc(sizeof(*tdev), GFP_KERNEL)))
		return -ENOMEM;

	tdev->func = func;
	tdev->pdev = pdev;

	tdev->vdd = devm_regulator_get(&pdev->dev, "vdd");
	if (IS_ERR(tdev->vdd)) {
		ret = PTR_ERR(tdev->vdd);
		goto free;
	}

	tdev->rst = devm_reset_control_get(&pdev->dev, "gpu");
	if (IS_ERR(tdev->rst)) {
		ret = PTR_ERR(tdev->rst);
		goto free;
	}

	tdev->clk = devm_clk_get(&pdev->dev, "gpu");
	if (IS_ERR(tdev->clk)) {
		ret = PTR_ERR(tdev->clk);
		goto free;
	}

	if (func->require_ref_clk)
		tdev->clk_ref = devm_clk_get(&pdev->dev, "ref");
	if (IS_ERR(tdev->clk_ref)) {
		ret = PTR_ERR(tdev->clk_ref);
		goto free;
	}

	tdev->clk_pwr = devm_clk_get(&pdev->dev, "pwr");
	if (IS_ERR(tdev->clk_pwr)) {
		ret = PTR_ERR(tdev->clk_pwr);
		goto free;
	}

	/**
	 * The IOMMU bit defines the upper limit of the GPU-addressable space.
	 * This will be refined in nouveau_ttm_init but we need to do it early
	 * for instmem to behave properly
	 */
	ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(tdev->func->iommu_bit));
	if (ret)
		goto free;

	nvkm_device_tegra_probe_iommu(tdev);

	ret = nvkm_device_tegra_power_up(tdev);
	if (ret)
		goto remove;

	tdev->gpu_speedo = tegra_sku_info.gpu_speedo_value;
	ret = nvkm_device_ctor(&nvkm_device_tegra_func, NULL, &pdev->dev,
			       NVKM_DEVICE_TEGRA, pdev->id, NULL,
			       cfg, dbg, detect, mmio, subdev_mask,
			       &tdev->device);
	if (ret)
		goto powerdown;

	*pdevice = &tdev->device;

	return 0;

powerdown:
	nvkm_device_tegra_power_down(tdev);
remove:
	nvkm_device_tegra_remove_iommu(tdev);
free:
	kfree(tdev);
	return ret;
}
#else
int
nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func,
		      struct platform_device *pdev,
		      const char *cfg, const char *dbg,
		      bool detect, bool mmio, u64 subdev_mask,
		      struct nvkm_device **pdevice)
{
	return -ENOSYS;
}
#endif
Commit	Line	Data
7974dd1b	1	/*
43a70661	2	* Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
7974dd1b BS	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
43a70661 BS	17	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	18	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	19	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	20	* DEALINGS IN THE SOFTWARE.
7974dd1b BS	21	*/
	22	#include <core/tegra.h>
	23	#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
	24	#include "priv.h"
	25
43a70661 BS	26	static int
	27	nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev)
	28	{
	29	int ret;
	30
	31	ret = regulator_enable(tdev->vdd);
	32	if (ret)
	33	goto err_power;
	34
	35	ret = clk_prepare_enable(tdev->clk);
	36	if (ret)
	37	goto err_clk;
34440ed6 AC	38	if (tdev->clk_ref) {
	39	ret = clk_prepare_enable(tdev->clk_ref);
	40	if (ret)
	41	goto err_clk_ref;
	42	}
43a70661 BS	43	ret = clk_prepare_enable(tdev->clk_pwr);
	44	if (ret)
	45	goto err_clk_pwr;
	46	clk_set_rate(tdev->clk_pwr, 204000000);
	47	udelay(10);
	48
	49	reset_control_assert(tdev->rst);
	50	udelay(10);
	51
	52	ret = tegra_powergate_remove_clamping(TEGRA_POWERGATE_3D);
	53	if (ret)
	54	goto err_clamp;
	55	udelay(10);
	56
	57	reset_control_deassert(tdev->rst);
	58	udelay(10);
	59
	60	return 0;
	61
	62	err_clamp:
	63	clk_disable_unprepare(tdev->clk_pwr);
	64	err_clk_pwr:
34440ed6 AC	65	if (tdev->clk_ref)
	66	clk_disable_unprepare(tdev->clk_ref);
	67	err_clk_ref:
43a70661 BS	68	clk_disable_unprepare(tdev->clk);
	69	err_clk:
	70	regulator_disable(tdev->vdd);
	71	err_power:
	72	return ret;
	73	}
	74
	75	static int
	76	nvkm_device_tegra_power_down(struct nvkm_device_tegra *tdev)
	77	{
	78	reset_control_assert(tdev->rst);
	79	udelay(10);
	80
	81	clk_disable_unprepare(tdev->clk_pwr);
34440ed6 AC	82	if (tdev->clk_ref)
34440ed6 AC	83	clk_disable_unprepare(tdev->clk_ref);
43a70661 BS	84	clk_disable_unprepare(tdev->clk);
	85	udelay(10);
	86
	87	return regulator_disable(tdev->vdd);
	88	}
	89
	90	static void
	91	nvkm_device_tegra_probe_iommu(struct nvkm_device_tegra *tdev)
	92	{
	93	#if IS_ENABLED(CONFIG_IOMMU_API)
	94	struct device *dev = &tdev->pdev->dev;
	95	unsigned long pgsize_bitmap;
	96	int ret;
	97
e396ecd1 AC	98	if (!tdev->func->iommu_bit)
	99	return;
	100
43a70661 BS	101	mutex_init(&tdev->iommu.mutex);
	102
	103	if (iommu_present(&platform_bus_type)) {
	104	tdev->iommu.domain = iommu_domain_alloc(&platform_bus_type);
	105	if (IS_ERR(tdev->iommu.domain))
	106	goto error;
	107
	108	/*
	109	* A IOMMU is only usable if it supports page sizes smaller
	110	* or equal to the system's PAGE_SIZE, with a preference if
	111	* both are equal.
	112	*/
	113	pgsize_bitmap = tdev->iommu.domain->ops->pgsize_bitmap;
	114	if (pgsize_bitmap & PAGE_SIZE) {
	115	tdev->iommu.pgshift = PAGE_SHIFT;
	116	} else {
	117	tdev->iommu.pgshift = fls(pgsize_bitmap & ~PAGE_MASK);
	118	if (tdev->iommu.pgshift == 0) {
	119	dev_warn(dev, "unsupported IOMMU page size\n");
	120	goto free_domain;
	121	}
	122	tdev->iommu.pgshift -= 1;
	123	}
	124
	125	ret = iommu_attach_device(tdev->iommu.domain, dev);
	126	if (ret)
	127	goto free_domain;
	128
	129	ret = nvkm_mm_init(&tdev->iommu.mm, 0,
e396ecd1 AC	130	(1ULL << tdev->func->iommu_bit) >>
e396ecd1 AC	131	tdev->iommu.pgshift, 1);
43a70661 BS	132	if (ret)
	133	goto detach_device;
	134	}
	135
	136	return;
	137
	138	detach_device:
	139	iommu_detach_device(tdev->iommu.domain, dev);
	140
	141	free_domain:
	142	iommu_domain_free(tdev->iommu.domain);
	143
	144	error:
	145	tdev->iommu.domain = NULL;
	146	tdev->iommu.pgshift = 0;
	147	dev_err(dev, "cannot initialize IOMMU MM\n");
	148	#endif
	149	}
	150
	151	static void
	152	nvkm_device_tegra_remove_iommu(struct nvkm_device_tegra *tdev)
	153	{
	154	#if IS_ENABLED(CONFIG_IOMMU_API)
	155	if (tdev->iommu.domain) {
	156	nvkm_mm_fini(&tdev->iommu.mm);
	157	iommu_detach_device(tdev->iommu.domain, tdev->device.dev);
	158	iommu_domain_free(tdev->iommu.domain);
	159	}
	160	#endif
	161	}
	162
7974dd1b	163	static struct nvkm_device_tegra *
7e8820fe	164	nvkm_device_tegra(struct nvkm_device *device)
7974dd1b	165	{
7e8820fe BS	166	return container_of(device, struct nvkm_device_tegra, device);
	167	}
	168
	169	static struct resource *
	170	nvkm_device_tegra_resource(struct nvkm_device *device, unsigned bar)
	171	{
	172	struct nvkm_device_tegra *tdev = nvkm_device_tegra(device);
	173	return platform_get_resource(tdev->pdev, IORESOURCE_MEM, bar);
	174	}
	175
	176	static resource_size_t
	177	nvkm_device_tegra_resource_addr(struct nvkm_device *device, unsigned bar)
	178	{
	179	struct resource *res = nvkm_device_tegra_resource(device, bar);
	180	return res ? res->start : 0;
	181	}
	182
	183	static resource_size_t
	184	nvkm_device_tegra_resource_size(struct nvkm_device *device, unsigned bar)
	185	{
	186	struct resource *res = nvkm_device_tegra_resource(device, bar);
	187	return res ? resource_size(res) : 0;
7974dd1b BS	188	}
7974dd1b BS	189
2b700825 BS	190	static irqreturn_t
	191	nvkm_device_tegra_intr(int irq, void *arg)
	192	{
	193	struct nvkm_device_tegra *tdev = arg;
	194	struct nvkm_mc *mc = tdev->device.mc;
	195	bool handled = false;
	196	if (likely(mc)) {
	197	nvkm_mc_intr_unarm(mc);
	198	nvkm_mc_intr(mc, &handled);
	199	nvkm_mc_intr_rearm(mc);
	200	}
	201	return handled ? IRQ_HANDLED : IRQ_NONE;
	202	}
	203
	204	static void
	205	nvkm_device_tegra_fini(struct nvkm_device *device, bool suspend)
	206	{
	207	struct nvkm_device_tegra *tdev = nvkm_device_tegra(device);
	208	if (tdev->irq) {
	209	free_irq(tdev->irq, tdev);
	210	tdev->irq = 0;
	211	};
	212	}
	213
	214	static int
	215	nvkm_device_tegra_init(struct nvkm_device *device)
	216	{
	217	struct nvkm_device_tegra *tdev = nvkm_device_tegra(device);
	218	int irq, ret;
	219
	220	irq = platform_get_irq_byname(tdev->pdev, "stall");
	221	if (irq < 0)
	222	return irq;
	223
	224	ret = request_irq(irq, nvkm_device_tegra_intr,
	225	IRQF_SHARED, "nvkm", tdev);
	226	if (ret)
	227	return ret;
	228
	229	tdev->irq = irq;
	230	return 0;
	231	}
	232
43a70661 BS	233	static void *
	234	nvkm_device_tegra_dtor(struct nvkm_device *device)
	235	{
	236	struct nvkm_device_tegra *tdev = nvkm_device_tegra(device);
	237	nvkm_device_tegra_power_down(tdev);
	238	nvkm_device_tegra_remove_iommu(tdev);
	239	return tdev;
	240	}
	241
7974dd1b BS	242	static const struct nvkm_device_func
	243	nvkm_device_tegra_func = {
	244	.tegra = nvkm_device_tegra,
43a70661	245	.dtor = nvkm_device_tegra_dtor,
2b700825 BS	246	.init = nvkm_device_tegra_init,
2b700825 BS	247	.fini = nvkm_device_tegra_fini,
7e8820fe BS	248	.resource_addr = nvkm_device_tegra_resource_addr,
7e8820fe BS	249	.resource_size = nvkm_device_tegra_resource_size,
26c9e8ef	250	.cpu_coherent = false,
7974dd1b BS	251	};
	252
	253	int
e396ecd1 AC	254	nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func,
e396ecd1 AC	255	struct platform_device *pdev,
7974dd1b BS	256	const char cfg, const char dbg,
	257	bool detect, bool mmio, u64 subdev_mask,
	258	struct nvkm_device **pdevice)
	259	{
	260	struct nvkm_device_tegra *tdev;
43a70661	261	int ret;
7974dd1b BS	262
	263	if (!(tdev = kzalloc(sizeof(*tdev), GFP_KERNEL)))
	264	return -ENOMEM;
870571a5	265
e396ecd1	266	tdev->func = func;
7974dd1b BS	267	tdev->pdev = pdev;
7974dd1b BS	268
43a70661	269	tdev->vdd = devm_regulator_get(&pdev->dev, "vdd");
870571a5 TR	270	if (IS_ERR(tdev->vdd)) {
	271	ret = PTR_ERR(tdev->vdd);
	272	goto free;
	273	}
43a70661 BS	274
43a70661 BS	275	tdev->rst = devm_reset_control_get(&pdev->dev, "gpu");
870571a5 TR	276	if (IS_ERR(tdev->rst)) {
	277	ret = PTR_ERR(tdev->rst);
	278	goto free;
	279	}
43a70661 BS	280
43a70661 BS	281	tdev->clk = devm_clk_get(&pdev->dev, "gpu");
870571a5 TR	282	if (IS_ERR(tdev->clk)) {
	283	ret = PTR_ERR(tdev->clk);
	284	goto free;
	285	}
43a70661	286
34440ed6 AC	287	if (func->require_ref_clk)
	288	tdev->clk_ref = devm_clk_get(&pdev->dev, "ref");
	289	if (IS_ERR(tdev->clk_ref)) {
	290	ret = PTR_ERR(tdev->clk_ref);
	291	goto free;
	292	}
	293
43a70661	294	tdev->clk_pwr = devm_clk_get(&pdev->dev, "pwr");
870571a5 TR	295	if (IS_ERR(tdev->clk_pwr)) {
	296	ret = PTR_ERR(tdev->clk_pwr);
	297	goto free;
	298	}
43a70661	299
9d0394c6 AC	300	/**
	301	* The IOMMU bit defines the upper limit of the GPU-addressable space.
	302	* This will be refined in nouveau_ttm_init but we need to do it early
	303	* for instmem to behave properly
	304	*/
	305	ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(tdev->func->iommu_bit));
	306	if (ret)
	307	goto free;
	308
43a70661 BS	309	nvkm_device_tegra_probe_iommu(tdev);
	310
	311	ret = nvkm_device_tegra_power_up(tdev);
	312	if (ret)
870571a5	313	goto remove;
43a70661 BS	314
	315	tdev->gpu_speedo = tegra_sku_info.gpu_speedo_value;
	316	ret = nvkm_device_ctor(&nvkm_device_tegra_func, NULL, &pdev->dev,
	317	NVKM_DEVICE_TEGRA, pdev->id, NULL,
	318	cfg, dbg, detect, mmio, subdev_mask,
	319	&tdev->device);
	320	if (ret)
870571a5 TR	321	goto powerdown;
	322
	323	*pdevice = &tdev->device;
43a70661 BS	324
43a70661 BS	325	return 0;
870571a5 TR	326
	327	powerdown:
	328	nvkm_device_tegra_power_down(tdev);
	329	remove:
	330	nvkm_device_tegra_remove_iommu(tdev);
	331	free:
	332	kfree(tdev);
	333	return ret;
7974dd1b BS	334	}
	335	#else
	336	int
e396ecd1 AC	337	nvkm_device_tegra_new(const struct nvkm_device_tegra_func *func,
e396ecd1 AC	338	struct platform_device *pdev,
7974dd1b BS	339	const char cfg, const char dbg,
	340	bool detect, bool mmio, u64 subdev_mask,
	341	struct nvkm_device **pdevice)
	342	{
	343	return -ENOSYS;
	344	}
	345	#endif