drm/nouveau/disp: convert to new-style nvkm_engine
[linux-2.6-block.git] / drivers / gpu / drm / nouveau / nvkm / engine / device / nv10.c
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1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
9719047b 24#include "priv.h"
9274f4a9 25
9274f4a9 26int
9719047b 27nv10_identify(struct nvkm_device *device)
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28{
29 switch (device->chipset) {
30 case 0x10:
b8bf04e1 31 device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass;
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32 break;
33 case 0x15:
16c4f227 34 device->oclass[NVDEV_ENGINE_FIFO ] = nv10_fifo_oclass;
8700287b 35 device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass;
b8bf04e1 36 device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass;
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37 break;
38 case 0x16:
16c4f227 39 device->oclass[NVDEV_ENGINE_FIFO ] = nv10_fifo_oclass;
8700287b 40 device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass;
b8bf04e1 41 device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass;
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42 break;
43 case 0x1a:
16c4f227 44 device->oclass[NVDEV_ENGINE_FIFO ] = nv10_fifo_oclass;
8700287b 45 device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass;
b8bf04e1 46 device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass;
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47 break;
48 case 0x11:
16c4f227 49 device->oclass[NVDEV_ENGINE_FIFO ] = nv10_fifo_oclass;
8700287b 50 device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass;
b8bf04e1 51 device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass;
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52 break;
53 case 0x17:
16c4f227 54 device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass;
8700287b 55 device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass;
b8bf04e1 56 device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass;
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57 break;
58 case 0x1f:
16c4f227 59 device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass;
8700287b 60 device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass;
b8bf04e1 61 device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass;
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62 break;
63 case 0x18:
16c4f227 64 device->oclass[NVDEV_ENGINE_FIFO ] = nv17_fifo_oclass;
8700287b 65 device->oclass[NVDEV_ENGINE_SW ] = nv10_sw_oclass;
b8bf04e1 66 device->oclass[NVDEV_ENGINE_GR ] = &nv10_gr_oclass;
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67 break;
68 default:
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69 return -EINVAL;
70 }
71
72 return 0;
73}