projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| bd2e597d BS |
1 | /* |
| 2 | * Copyright 2010 Red Hat Inc. | |
| 3 | * | |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
| 5 | * copy of this software and associated documentation files (the "Software"), | |
| 6 | * to deal in the Software without restriction, including without limitation | |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the | |
| 9 | * Software is furnished to do so, subject to the following conditions: | |
| 10 | * | |
| 11 | * The above copyright notice and this permission notice shall be included in | |
| 12 | * all copies or substantial portions of the Software. | |
| 13 | * | |
| 14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
| 15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
| 16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
| 17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
| 18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
| 19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
| 20 | * OTHER DEALINGS IN THE SOFTWARE. | |
| 21 | * | |
| 22 | * Authors: Ben Skeggs | |
| 23 | */ | |
| 24 | ||
| 25 | #include "drmP.h" | |
| 26 | #include "nouveau_drv.h" | |
| 27 | ||
| 28 | int | |
| 29 | nv84_crypt_create_context(struct nouveau_channel *chan) | |
| 30 | { | |
| 31 | struct drm_device *dev = chan->dev; | |
| 32 | struct drm_nouveau_private *dev_priv = dev->dev_private; | |
| 33 | struct nouveau_gpuobj *ramin = chan->ramin; | |
| 34 | int ret; | |
| 35 | ||
| 36 | NV_DEBUG(dev, "ch%d\n", chan->id); | |
| 37 | ||
| 3052be2c | 38 | ret = nouveau_gpuobj_new(dev, chan, 256, 0, |
| bd2e597d BS |
39 | NVOBJ_FLAG_ZERO_ALLOC | NVOBJ_FLAG_ZERO_FREE, |
| 40 | &chan->crypt_ctx); | |
| 41 | if (ret) | |
| 42 | return ret; | |
| 43 | ||
| 44 | nv_wo32(ramin, 0xa0, 0x00190000); | |
| 45 | nv_wo32(ramin, 0xa4, chan->crypt_ctx->vinst + 0xff); | |
| 46 | nv_wo32(ramin, 0xa8, chan->crypt_ctx->vinst); | |
| 47 | nv_wo32(ramin, 0xac, 0); | |
| 48 | nv_wo32(ramin, 0xb0, 0); | |
| 49 | nv_wo32(ramin, 0xb4, 0); | |
| 50 | ||
| 51 | dev_priv->engine.instmem.flush(dev); | |
| 52 | return 0; | |
| 53 | } | |
| 54 | ||
| 55 | void | |
| 56 | nv84_crypt_destroy_context(struct nouveau_channel *chan) | |
| 57 | { | |
| 58 | struct drm_device *dev = chan->dev; | |
| 59 | u32 inst; | |
| 60 | ||
| 61 | if (!chan->ramin) | |
| 62 | return; | |
| 63 | ||
| 64 | inst = (chan->ramin->vinst >> 12); | |
| 65 | inst |= 0x80000000; | |
| 66 | ||
| 67 | /* mark context as invalid if still on the hardware, not | |
| 68 | * doing this causes issues the next time PCRYPT is used, | |
| 69 | * unsurprisingly :) | |
| 70 | */ | |
| 71 | nv_wr32(dev, 0x10200c, 0x00000000); | |
| 72 | if (nv_rd32(dev, 0x102188) == inst) | |
| 73 | nv_mask(dev, 0x102188, 0x80000000, 0x00000000); | |
| 74 | if (nv_rd32(dev, 0x10218c) == inst) | |
| 75 | nv_mask(dev, 0x10218c, 0x80000000, 0x00000000); | |
| 76 | nv_wr32(dev, 0x10200c, 0x00000010); | |
| 77 | ||
| 78 | nouveau_gpuobj_ref(NULL, &chan->crypt_ctx); | |
| 79 | } | |
| 80 | ||
| 81 | void | |
| 82 | nv84_crypt_tlb_flush(struct drm_device *dev) | |
| 83 | { | |
| 84 | nv50_vm_flush(dev, 0x0a); | |
| 85 | } | |
| 86 | ||
| 87 | int | |
| 88 | nv84_crypt_init(struct drm_device *dev) | |
| 89 | { | |
| 90 | struct drm_nouveau_private *dev_priv = dev->dev_private; | |
| 91 | struct nouveau_crypt_engine *pcrypt = &dev_priv->engine.crypt; | |
| 92 | ||
| 93 | if (!pcrypt->registered) { | |
| 94 | NVOBJ_CLASS(dev, 0x74c1, CRYPT); | |
| 95 | pcrypt->registered = true; | |
| 96 | } | |
| 97 | ||
| 98 | nv_mask(dev, 0x000200, 0x00004000, 0x00000000); | |
| 99 | nv_mask(dev, 0x000200, 0x00004000, 0x00004000); | |
| 100 | nv_wr32(dev, 0x102130, 0xffffffff); | |
| 101 | nv_wr32(dev, 0x102140, 0xffffffbf); | |
| 102 | nv_wr32(dev, 0x10200c, 0x00000010); | |
| 103 | return 0; | |
| 104 | } | |
| 105 | ||
| 106 | void | |
| 107 | nv84_crypt_fini(struct drm_device *dev) | |
| 108 | { | |
| 109 | nv_wr32(dev, 0x102140, 0x00000000); | |
| 110 | } |