[linux-2.6-block.git] / drivers / gpu / drm / nouveau / nv04_display.c

/*
 * Copyright 2009 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Author: Ben Skeggs
 */

#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>

#include "nouveau_drv.h"
#include "nouveau_fb.h"
#include "nouveau_hw.h"
#include "nouveau_encoder.h"
#include "nouveau_connector.h"

static void nv04_vblank_crtc0_isr(struct drm_device *);
static void nv04_vblank_crtc1_isr(struct drm_device *);

static void
nv04_display_store_initial_head_owner(struct drm_device *dev)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;

	if (dev_priv->chipset != 0x11) {
		dev_priv->crtc_owner = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_44);
		return;
	}

	/* reading CR44 is broken on nv11, so we attempt to infer it */
	if (nvReadMC(dev, NV_PBUS_DEBUG_1) & (1 << 28))	/* heads tied, restore both */
		dev_priv->crtc_owner = 0x4;
	else {
		uint8_t slaved_on_A, slaved_on_B;
		bool tvA = false;
		bool tvB = false;

		slaved_on_B = NVReadVgaCrtc(dev, 1, NV_CIO_CRE_PIXEL_INDEX) &
									0x80;
		if (slaved_on_B)
			tvB = !(NVReadVgaCrtc(dev, 1, NV_CIO_CRE_LCD__INDEX) &
					MASK(NV_CIO_CRE_LCD_LCD_SELECT));

		slaved_on_A = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX) &
									0x80;
		if (slaved_on_A)
			tvA = !(NVReadVgaCrtc(dev, 0, NV_CIO_CRE_LCD__INDEX) &
					MASK(NV_CIO_CRE_LCD_LCD_SELECT));

		if (slaved_on_A && !tvA)
			dev_priv->crtc_owner = 0x0;
		else if (slaved_on_B && !tvB)
			dev_priv->crtc_owner = 0x3;
		else if (slaved_on_A)
			dev_priv->crtc_owner = 0x0;
		else if (slaved_on_B)
			dev_priv->crtc_owner = 0x3;
		else
			dev_priv->crtc_owner = 0x0;
	}
}

int
nv04_display_early_init(struct drm_device *dev)
{
	/* Make the I2C buses accessible. */
	if (!nv_gf4_disp_arch(dev)) {
		uint32_t pmc_enable = nv_rd32(dev, NV03_PMC_ENABLE);

		if (!(pmc_enable & 1))
			nv_wr32(dev, NV03_PMC_ENABLE, pmc_enable | 1);
	}

	/* Unlock the VGA CRTCs. */
	NVLockVgaCrtcs(dev, false);

	/* Make sure the CRTCs aren't in slaved mode. */
	if (nv_two_heads(dev)) {
		nv04_display_store_initial_head_owner(dev);
		NVSetOwner(dev, 0);
	}

	/* ensure vblank interrupts are off, they can't be enabled until
	 * drm_vblank has been initialised
	 */
	NVWriteCRTC(dev, 0, NV_PCRTC_INTR_EN_0, 0);
	if (nv_two_heads(dev))
		NVWriteCRTC(dev, 1, NV_PCRTC_INTR_EN_0, 0);

	return 0;
}

void
nv04_display_late_takedown(struct drm_device *dev)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;

	if (nv_two_heads(dev))
		NVSetOwner(dev, dev_priv->crtc_owner);

	NVLockVgaCrtcs(dev, true);
}

int
nv04_display_create(struct drm_device *dev)
{
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct dcb_table *dcb = &dev_priv->vbios.dcb;
	struct drm_connector *connector, *ct;
	struct drm_encoder *encoder;
	struct drm_crtc *crtc;
	int i, ret;

	NV_DEBUG_KMS(dev, "\n");

	nouveau_hw_save_vga_fonts(dev, 1);

	nv04_crtc_create(dev, 0);
	if (nv_two_heads(dev))
		nv04_crtc_create(dev, 1);

	for (i = 0; i < dcb->entries; i++) {
		struct dcb_entry *dcbent = &dcb->entry[i];

		connector = nouveau_connector_create(dev, dcbent->connector);
		if (IS_ERR(connector))
			continue;

		switch (dcbent->type) {
		case OUTPUT_ANALOG:
			ret = nv04_dac_create(connector, dcbent);
			break;
		case OUTPUT_LVDS:
		case OUTPUT_TMDS:
			ret = nv04_dfp_create(connector, dcbent);
			break;
		case OUTPUT_TV:
			if (dcbent->location == DCB_LOC_ON_CHIP)
				ret = nv17_tv_create(connector, dcbent);
			else
				ret = nv04_tv_create(connector, dcbent);
			break;
		default:
			NV_WARN(dev, "DCB type %d not known\n", dcbent->type);
			continue;
		}

		if (ret)
			continue;
	}

	list_for_each_entry_safe(connector, ct,
				 &dev->mode_config.connector_list, head) {
		if (!connector->encoder_ids[0]) {
			NV_WARN(dev, "%s has no encoders, removing\n",
				drm_get_connector_name(connector));
			connector->funcs->destroy(connector);
		}
	}

	/* Save previous state */
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
		crtc->funcs->save(crtc);

	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
		struct drm_encoder_helper_funcs *func = encoder->helper_private;

		func->save(encoder);
	}

	nouveau_irq_register(dev, 24, nv04_vblank_crtc0_isr);
	nouveau_irq_register(dev, 25, nv04_vblank_crtc1_isr);
	return 0;
}

void
nv04_display_destroy(struct drm_device *dev)
{
	struct drm_encoder *encoder;
	struct drm_crtc *crtc;

	NV_DEBUG_KMS(dev, "\n");

	nouveau_irq_unregister(dev, 24);
	nouveau_irq_unregister(dev, 25);

	/* Turn every CRTC off. */
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct drm_mode_set modeset = {
			.crtc = crtc,
		};

		crtc->funcs->set_config(&modeset);
	}

	/* Restore state */
	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
		struct drm_encoder_helper_funcs *func = encoder->helper_private;

		func->restore(encoder);
	}

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
		crtc->funcs->restore(crtc);

	nouveau_hw_save_vga_fonts(dev, 0);
}

int
nv04_display_init(struct drm_device *dev)
{
	struct drm_encoder *encoder;
	struct drm_crtc *crtc;

	/* meh.. modeset apparently doesn't setup all the regs and depends
	 * on pre-existing state, for now load the state of the card *before*
	 * nouveau was loaded, and then do a modeset.
	 *
	 * best thing to do probably is to make save/restore routines not
	 * save/restore "pre-load" state, but more general so we can save
	 * on suspend too.
	 */
	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
		struct drm_encoder_helper_funcs *func = encoder->helper_private;

		func->restore(encoder);
	}

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
		crtc->funcs->restore(crtc);

	return 0;
}

void
nv04_display_fini(struct drm_device *dev)
{
	/* disable vblank interrupts */
	NVWriteCRTC(dev, 0, NV_PCRTC_INTR_EN_0, 0);
	if (nv_two_heads(dev))
		NVWriteCRTC(dev, 1, NV_PCRTC_INTR_EN_0, 0);
}

static void
nv04_vblank_crtc0_isr(struct drm_device *dev)
{
	nv_wr32(dev, NV_CRTC0_INTSTAT, NV_CRTC_INTR_VBLANK);
	drm_handle_vblank(dev, 0);
}

static void
nv04_vblank_crtc1_isr(struct drm_device *dev)
{
	nv_wr32(dev, NV_CRTC1_INTSTAT, NV_CRTC_INTR_VBLANK);
	drm_handle_vblank(dev, 1);
}
Commit	Line	Data
6ee73861 BS	1	/*
	2	* Copyright 2009 Red Hat Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Author: Ben Skeggs
	23	*/
	24
760285e7 DH	25	#include <drm/drmP.h>
760285e7 DH	26	#include <drm/drm_crtc_helper.h>
6ee73861 BS	27
	28	#include "nouveau_drv.h"
	29	#include "nouveau_fb.h"
	30	#include "nouveau_hw.h"
	31	#include "nouveau_encoder.h"
	32	#include "nouveau_connector.h"
	33
25b85783 BS	34	static void nv04_vblank_crtc0_isr(struct drm_device *);
	35	static void nv04_vblank_crtc1_isr(struct drm_device *);
	36
6ee73861 BS	37	static void
	38	nv04_display_store_initial_head_owner(struct drm_device *dev)
	39	{
	40	struct drm_nouveau_private *dev_priv = dev->dev_private;
	41
	42	if (dev_priv->chipset != 0x11) {
	43	dev_priv->crtc_owner = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_44);
03cd06ca	44	return;
6ee73861 BS	45	}
	46
	47	/* reading CR44 is broken on nv11, so we attempt to infer it */
	48	if (nvReadMC(dev, NV_PBUS_DEBUG_1) & (1 << 28)) /* heads tied, restore both */
	49	dev_priv->crtc_owner = 0x4;
	50	else {
	51	uint8_t slaved_on_A, slaved_on_B;
	52	bool tvA = false;
	53	bool tvB = false;
	54
6ee73861 BS	55	slaved_on_B = NVReadVgaCrtc(dev, 1, NV_CIO_CRE_PIXEL_INDEX) &
	56	0x80;
	57	if (slaved_on_B)
	58	tvB = !(NVReadVgaCrtc(dev, 1, NV_CIO_CRE_LCD__INDEX) &
	59	MASK(NV_CIO_CRE_LCD_LCD_SELECT));
	60
	61	slaved_on_A = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_PIXEL_INDEX) &
	62	0x80;
	63	if (slaved_on_A)
	64	tvA = !(NVReadVgaCrtc(dev, 0, NV_CIO_CRE_LCD__INDEX) &
	65	MASK(NV_CIO_CRE_LCD_LCD_SELECT));
	66
6ee73861 BS	67	if (slaved_on_A && !tvA)
	68	dev_priv->crtc_owner = 0x0;
	69	else if (slaved_on_B && !tvB)
	70	dev_priv->crtc_owner = 0x3;
	71	else if (slaved_on_A)
	72	dev_priv->crtc_owner = 0x0;
	73	else if (slaved_on_B)
	74	dev_priv->crtc_owner = 0x3;
	75	else
	76	dev_priv->crtc_owner = 0x0;
	77	}
6ee73861 BS	78	}
6ee73861 BS	79
c88c2e06 FJ	80	int
	81	nv04_display_early_init(struct drm_device *dev)
	82	{
c04c5b1d FJ	83	/* Make the I2C buses accessible. */
	84	if (!nv_gf4_disp_arch(dev)) {
	85	uint32_t pmc_enable = nv_rd32(dev, NV03_PMC_ENABLE);
	86
	87	if (!(pmc_enable & 1))
	88	nv_wr32(dev, NV03_PMC_ENABLE, pmc_enable \| 1);
	89	}
	90
c88c2e06 FJ	91	/* Unlock the VGA CRTCs. */
	92	NVLockVgaCrtcs(dev, false);
	93
	94	/* Make sure the CRTCs aren't in slaved mode. */
	95	if (nv_two_heads(dev)) {
	96	nv04_display_store_initial_head_owner(dev);
	97	NVSetOwner(dev, 0);
	98	}
	99
afada5e0 BS	100	/* ensure vblank interrupts are off, they can't be enabled until
	101	* drm_vblank has been initialised
	102	*/
	103	NVWriteCRTC(dev, 0, NV_PCRTC_INTR_EN_0, 0);
	104	if (nv_two_heads(dev))
	105	NVWriteCRTC(dev, 1, NV_PCRTC_INTR_EN_0, 0);
	106
c88c2e06 FJ	107	return 0;
	108	}
	109
	110	void
	111	nv04_display_late_takedown(struct drm_device *dev)
	112	{
	113	struct drm_nouveau_private *dev_priv = dev->dev_private;
	114
	115	if (nv_two_heads(dev))
	116	NVSetOwner(dev, dev_priv->crtc_owner);
	117
	118	NVLockVgaCrtcs(dev, true);
	119	}
	120
6ee73861 BS	121	int
	122	nv04_display_create(struct drm_device *dev)
	123	{
	124	struct drm_nouveau_private *dev_priv = dev->dev_private;
04a39c57	125	struct dcb_table *dcb = &dev_priv->vbios.dcb;
8f1a6086	126	struct drm_connector connector, ct;
6ee73861 BS	127	struct drm_encoder *encoder;
6ee73861 BS	128	struct drm_crtc *crtc;
6ee73861 BS	129	int i, ret;
6ee73861 BS	130
ef2bb506	131	NV_DEBUG_KMS(dev, "\n");
6ee73861	132
95f158ea	133	nouveau_hw_save_vga_fonts(dev, 1);
6ee73861	134
6ee73861 BS	135	nv04_crtc_create(dev, 0);
	136	if (nv_two_heads(dev))
	137	nv04_crtc_create(dev, 1);
	138
	139	for (i = 0; i < dcb->entries; i++) {
	140	struct dcb_entry *dcbent = &dcb->entry[i];
	141
8f1a6086 BS	142	connector = nouveau_connector_create(dev, dcbent->connector);
	143	if (IS_ERR(connector))
	144	continue;
	145
6ee73861 BS	146	switch (dcbent->type) {
6ee73861 BS	147	case OUTPUT_ANALOG:
8f1a6086	148	ret = nv04_dac_create(connector, dcbent);
6ee73861 BS	149	break;
	150	case OUTPUT_LVDS:
	151	case OUTPUT_TMDS:
8f1a6086	152	ret = nv04_dfp_create(connector, dcbent);
6ee73861 BS	153	break;
	154	case OUTPUT_TV:
	155	if (dcbent->location == DCB_LOC_ON_CHIP)
8f1a6086	156	ret = nv17_tv_create(connector, dcbent);
6ee73861	157	else
8f1a6086	158	ret = nv04_tv_create(connector, dcbent);
6ee73861 BS	159	break;
	160	default:
	161	NV_WARN(dev, "DCB type %d not known\n", dcbent->type);
	162	continue;
	163	}
	164
	165	if (ret)
	166	continue;
6ee73861 BS	167	}
6ee73861 BS	168
8f1a6086 BS	169	list_for_each_entry_safe(connector, ct,
	170	&dev->mode_config.connector_list, head) {
	171	if (!connector->encoder_ids[0]) {
	172	NV_WARN(dev, "%s has no encoders, removing\n",
	173	drm_get_connector_name(connector));
	174	connector->funcs->destroy(connector);
	175	}
	176	}
6ee73861 BS	177
6ee73861 BS	178	/* Save previous state */
6ee73861 BS	179	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
	180	crtc->funcs->save(crtc);
	181
	182	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
	183	struct drm_encoder_helper_funcs *func = encoder->helper_private;
	184
	185	func->save(encoder);
	186	}
	187
25b85783 BS	188	nouveau_irq_register(dev, 24, nv04_vblank_crtc0_isr);
25b85783 BS	189	nouveau_irq_register(dev, 25, nv04_vblank_crtc1_isr);
6ee73861 BS	190	return 0;
	191	}
	192
	193	void
	194	nv04_display_destroy(struct drm_device *dev)
	195	{
	196	struct drm_encoder *encoder;
	197	struct drm_crtc *crtc;
	198
ef2bb506	199	NV_DEBUG_KMS(dev, "\n");
6ee73861	200
e4cbadca BS	201	nouveau_irq_unregister(dev, 24);
	202	nouveau_irq_unregister(dev, 25);
	203
6ee73861 BS	204	/* Turn every CRTC off. */
	205	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	206	struct drm_mode_set modeset = {
	207	.crtc = crtc,
	208	};
	209
	210	crtc->funcs->set_config(&modeset);
	211	}
	212
	213	/* Restore state */
6ee73861 BS	214	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
	215	struct drm_encoder_helper_funcs *func = encoder->helper_private;
	216
	217	func->restore(encoder);
	218	}
	219
	220	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
	221	crtc->funcs->restore(crtc);
	222
95f158ea	223	nouveau_hw_save_vga_fonts(dev, 0);
6ee73861 BS	224	}
6ee73861 BS	225
c88c2e06 FJ	226	int
c88c2e06 FJ	227	nv04_display_init(struct drm_device *dev)
6ee73861	228	{
6ee73861 BS	229	struct drm_encoder *encoder;
	230	struct drm_crtc *crtc;
	231
6ee73861 BS	232	/* meh.. modeset apparently doesn't setup all the regs and depends
	233	* on pre-existing state, for now load the state of the card before
	234	* nouveau was loaded, and then do a modeset.
	235	*
	236	* best thing to do probably is to make save/restore routines not
	237	* save/restore "pre-load" state, but more general so we can save
	238	* on suspend too.
	239	*/
	240	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
	241	struct drm_encoder_helper_funcs *func = encoder->helper_private;
	242
	243	func->restore(encoder);
	244	}
	245
	246	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head)
	247	crtc->funcs->restore(crtc);
c88c2e06 FJ	248
c88c2e06 FJ	249	return 0;
6ee73861 BS	250	}
6ee73861 BS	251
2a44e499 BS	252	void
	253	nv04_display_fini(struct drm_device *dev)
	254	{
afada5e0 BS	255	/* disable vblank interrupts */
	256	NVWriteCRTC(dev, 0, NV_PCRTC_INTR_EN_0, 0);
	257	if (nv_two_heads(dev))
	258	NVWriteCRTC(dev, 1, NV_PCRTC_INTR_EN_0, 0);
2a44e499 BS	259	}
2a44e499 BS	260
25b85783 BS	261	static void
	262	nv04_vblank_crtc0_isr(struct drm_device *dev)
	263	{
	264	nv_wr32(dev, NV_CRTC0_INTSTAT, NV_CRTC_INTR_VBLANK);
	265	drm_handle_vblank(dev, 0);
	266	}
	267
	268	static void
	269	nv04_vblank_crtc1_isr(struct drm_device *dev)
	270	{
	271	nv_wr32(dev, NV_CRTC1_INTSTAT, NV_CRTC_INTR_VBLANK);
	272	drm_handle_vblank(dev, 1);
	273	}