[linux-2.6-block.git] / drivers / gpu / drm / nouveau / nouveau_drv.c

/*
 * Copyright 2005 Stephane Marchesin.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include <linux/console.h>
#include <linux/module.h>

#include "drmP.h"
#include "drm.h"
#include "drm_crtc_helper.h"
#include "nouveau_drv.h"
#include "nouveau_abi16.h"
#include "nouveau_hw.h"
#include "nouveau_fb.h"
#include "nouveau_fbcon.h"
#include "nouveau_fence.h"
#include "nouveau_pm.h"
#include <engine/fifo.h>
#include "nv50_display.h"

#include "drm_pciids.h"

MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
int nouveau_modeset = -1;
module_param_named(modeset, nouveau_modeset, int, 0400);

MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
int nouveau_vram_notify = 0;
module_param_named(vram_notify, nouveau_vram_notify, int, 0400);

MODULE_PARM_DESC(vram_type, "Override detected VRAM type");
char *nouveau_vram_type;
module_param_named(vram_type, nouveau_vram_type, charp, 0400);

MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
int nouveau_duallink = 1;
module_param_named(duallink, nouveau_duallink, int, 0400);

MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
int nouveau_uscript_lvds = -1;
module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);

MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
int nouveau_uscript_tmds = -1;
module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);

MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
int nouveau_ignorelid = 0;
module_param_named(ignorelid, nouveau_ignorelid, int, 0400);

MODULE_PARM_DESC(noaccel, "Disable all acceleration");
int nouveau_noaccel = -1;
module_param_named(noaccel, nouveau_noaccel, int, 0400);

MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
int nouveau_nofbaccel = 0;
module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);

MODULE_PARM_DESC(force_post, "Force POST");
int nouveau_force_post = 0;
module_param_named(force_post, nouveau_force_post, int, 0400);

MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
int nouveau_override_conntype = 0;
module_param_named(override_conntype, nouveau_override_conntype, int, 0400);

MODULE_PARM_DESC(tv_disable, "Disable TV-out detection");
int nouveau_tv_disable = 0;
module_param_named(tv_disable, nouveau_tv_disable, int, 0400);

MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
		 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
		 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
		 "\t\tDefault: PAL\n"
		 "\t\t*NOTE* Ignored for cards with external TV encoders.");
char *nouveau_tv_norm;
module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);

MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
		"\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
		"\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
		"\t\t0x100 vgaattr, 0x200 EVO (G80+)");
int nouveau_reg_debug;
module_param_named(reg_debug, nouveau_reg_debug, int, 0600);

MODULE_PARM_DESC(perflvl, "Performance level (default: boot)");
char *nouveau_perflvl;
module_param_named(perflvl, nouveau_perflvl, charp, 0400);

MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)");
int nouveau_perflvl_wr;
module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);

MODULE_PARM_DESC(msi, "Enable MSI (default: off)");
int nouveau_msi;
module_param_named(msi, nouveau_msi, int, 0400);

MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)");
int nouveau_ctxfw;
module_param_named(ctxfw, nouveau_ctxfw, int, 0400);

MODULE_PARM_DESC(mxmdcb, "Santise DCB table according to MXM-SIS");
int nouveau_mxmdcb = 1;
module_param_named(mxmdcb, nouveau_mxmdcb, int, 0400);

int nouveau_fbpercrtc;
#if 0
module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
#endif

static struct drm_driver driver;

int __devinit
nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	return drm_get_pci_dev(pdev, ent, &driver);
}

void
nouveau_pci_remove(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	drm_put_dev(dev);
}

int
nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
	struct nouveau_fence_priv *fence = dev_priv->fence.func;
	struct nouveau_channel *chan;
	struct drm_crtc *crtc;
	int ret, i, e;

	NV_INFO(dev, "Disabling display...\n");
	nouveau_display_fini(dev);

	NV_INFO(dev, "Disabling fbcon...\n");
	nouveau_fbcon_set_suspend(dev, 1);

	NV_INFO(dev, "Unpinning framebuffer(s)...\n");
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_framebuffer *nouveau_fb;

		nouveau_fb = nouveau_framebuffer(crtc->fb);
		if (!nouveau_fb || !nouveau_fb->nvbo)
			continue;

		nouveau_bo_unpin(nouveau_fb->nvbo);
	}

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

		nouveau_bo_unmap(nv_crtc->cursor.nvbo);
		nouveau_bo_unpin(nv_crtc->cursor.nvbo);
	}

	NV_INFO(dev, "Evicting buffers...\n");
	ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);

	NV_INFO(dev, "Idling channels...\n");
	for (i = 0; i < (pfifo ? pfifo->channels : 0); i++) {
		chan = dev_priv->channels.ptr[i];

		if (chan && chan->pushbuf_bo)
			nouveau_channel_idle(chan);
	}

	if (fence->suspend) {
		if (!fence->suspend(dev))
			return -ENOMEM;
	}

	for (e = NVOBJ_ENGINE_NR - 1; e >= 0; e--) {
		if (!dev_priv->eng[e])
			continue;

		ret = dev_priv->eng[e]->fini(dev, e, true);
		if (ret) {
			NV_ERROR(dev, "... engine %d failed: %d\n", e, ret);
			goto out_abort;
		}
	}

	return 0;

out_abort:
	NV_INFO(dev, "Re-enabling acceleration..\n");
	for (e = e + 1; e < NVOBJ_ENGINE_NR; e++) {
		if (dev_priv->eng[e])
			dev_priv->eng[e]->init(dev, e);
	}
	return ret;
}

int
nouveau_pci_resume(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_fence_priv *fence = dev_priv->fence.func;
	struct nouveau_engine *engine = &dev_priv->engine;
	struct drm_crtc *crtc;
	int ret, i;

	/* Make the CRTCs accessible */
	engine->display.early_init(dev);

	NV_INFO(dev, "POSTing device...\n");
	ret = nouveau_run_vbios_init(dev);
	if (ret)
		return ret;

	NV_INFO(dev, "Reinitialising engines...\n");
	for (i = 0; i < NVOBJ_ENGINE_NR; i++) {
		if (dev_priv->eng[i])
			dev_priv->eng[i]->init(dev, i);
	}

	if (fence->resume)
		fence->resume(dev);

	nouveau_irq_postinstall(dev);

	/* Re-write SKIPS, they'll have been lost over the suspend */
	if (nouveau_vram_pushbuf) {
		struct nouveau_channel *chan;
		int j;

		for (i = 0; i < (pfifo ? pfifo->channels : 0); i++) {
			chan = dev_priv->channels.ptr[i];
			if (!chan || !chan->pushbuf_bo)
				continue;

			for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
				nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
		}
	}

	nouveau_pm_resume(dev);

	NV_INFO(dev, "Restoring mode...\n");
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_framebuffer *nouveau_fb;

		nouveau_fb = nouveau_framebuffer(crtc->fb);
		if (!nouveau_fb || !nouveau_fb->nvbo)
			continue;

		nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
	}

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

		ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
		if (!ret)
			ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
		if (ret)
			NV_ERROR(dev, "Could not pin/map cursor.\n");
	}

	nouveau_fbcon_set_suspend(dev, 0);
	nouveau_fbcon_zfill_all(dev);

	nouveau_display_init(dev);

	/* Force CLUT to get re-loaded during modeset */
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

		nv_crtc->lut.depth = 0;
	}

	drm_helper_resume_force_mode(dev);

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
		u32 offset = nv_crtc->cursor.nvbo->bo.offset;

		nv_crtc->cursor.set_offset(nv_crtc, offset);
		nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
						 nv_crtc->cursor_saved_y);
	}

	return 0;
}

static struct drm_ioctl_desc nouveau_ioctls[] = {
	DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
};

static const struct file_operations nouveau_driver_fops = {
	.owner = THIS_MODULE,
	.open = drm_open,
	.release = drm_release,
	.unlocked_ioctl = drm_ioctl,
	.mmap = nouveau_ttm_mmap,
	.poll = drm_poll,
	.fasync = drm_fasync,
	.read = drm_read,
#if defined(CONFIG_COMPAT)
	.compat_ioctl = nouveau_compat_ioctl,
#endif
	.llseek = noop_llseek,
};

int nouveau_drm_load(struct drm_device *, unsigned long);
int nouveau_drm_unload(struct drm_device *);

static struct drm_driver driver = {
	.driver_features =
		DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
		DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
		DRIVER_MODESET | DRIVER_PRIME,
	.load = nouveau_drm_load,
	.firstopen = nouveau_firstopen,
	.lastclose = nouveau_lastclose,
	.unload = nouveau_drm_unload,
	.open = nouveau_open,
	.preclose = nouveau_preclose,
	.postclose = nouveau_postclose,
#if defined(CONFIG_DRM_NOUVEAU_DEBUG)
	.debugfs_init = nouveau_debugfs_init,
	.debugfs_cleanup = nouveau_debugfs_takedown,
#endif
	.irq_preinstall = nouveau_irq_preinstall,
	.irq_postinstall = nouveau_irq_postinstall,
	.irq_uninstall = nouveau_irq_uninstall,
	.irq_handler = nouveau_irq_handler,
	.get_vblank_counter = drm_vblank_count,
	.enable_vblank = nouveau_vblank_enable,
	.disable_vblank = nouveau_vblank_disable,
	.ioctls = nouveau_ioctls,
	.fops = &nouveau_driver_fops,

	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	.gem_prime_export = nouveau_gem_prime_export,
	.gem_prime_import = nouveau_gem_prime_import,

	.gem_init_object = nouveau_gem_object_new,
	.gem_free_object = nouveau_gem_object_del,
	.gem_open_object = nouveau_gem_object_open,
	.gem_close_object = nouveau_gem_object_close,

	.dumb_create = nouveau_display_dumb_create,
	.dumb_map_offset = nouveau_display_dumb_map_offset,
	.dumb_destroy = nouveau_display_dumb_destroy,

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
#ifdef GIT_REVISION
	.date = GIT_REVISION,
#else
	.date = DRIVER_DATE,
#endif
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
	.patchlevel = DRIVER_PATCHLEVEL,
};

int __init nouveau_init(struct pci_driver *pdrv)
{
	driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);

	if (nouveau_modeset == -1) {
#ifdef CONFIG_VGA_CONSOLE
		if (vgacon_text_force())
			nouveau_modeset = 0;
		else
#endif
			nouveau_modeset = 1;
	}

	if (!nouveau_modeset)
		return 0;

	nouveau_register_dsm_handler();
	return drm_pci_init(&driver, pdrv);
}

void __exit nouveau_exit(struct pci_driver *pdrv)
{
	if (!nouveau_modeset)
		return;

	drm_pci_exit(&driver, pdrv);
	nouveau_unregister_dsm_handler();
}
Commit	Line	Data
6ee73861 BS	1	/*
	2	* Copyright 2005 Stephane Marchesin.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	22	* OTHER DEALINGS IN THE SOFTWARE.
	23	*/
	24
	25	#include <linux/console.h>
e0cd3608	26	#include <linux/module.h>
6ee73861 BS	27
	28	#include "drmP.h"
	29	#include "drm.h"
	30	#include "drm_crtc_helper.h"
	31	#include "nouveau_drv.h"
2a259a3d	32	#include "nouveau_abi16.h"
6ee73861 BS	33	#include "nouveau_hw.h"
	34	#include "nouveau_fb.h"
	35	#include "nouveau_fbcon.h"
e193b1d4	36	#include "nouveau_fence.h"
64f1c11a	37	#include "nouveau_pm.h"
02a841d4	38	#include <engine/fifo.h>
6ee73861 BS	39	#include "nv50_display.h"
	40
	41	#include "drm_pciids.h"
	42
6ee73861	43	MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
03bc9675	44	int nouveau_modeset = -1;
6ee73861	45	module_param_named(modeset, nouveau_modeset, int, 0400);
6ee73861 BS	46
6ee73861 BS	47	MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
2dfe36b1	48	int nouveau_vram_notify = 0;
6ee73861 BS	49	module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
6ee73861 BS	50
7ad2d31c BS	51	MODULE_PARM_DESC(vram_type, "Override detected VRAM type");
	52	char *nouveau_vram_type;
	53	module_param_named(vram_type, nouveau_vram_type, charp, 0400);
	54
6ee73861 BS	55	MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
	56	int nouveau_duallink = 1;
	57	module_param_named(duallink, nouveau_duallink, int, 0400);
	58
	59	MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
	60	int nouveau_uscript_lvds = -1;
	61	module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
	62
	63	MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
	64	int nouveau_uscript_tmds = -1;
	65	module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
	66
a1470890 BS	67	MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
	68	int nouveau_ignorelid = 0;
	69	module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
	70
81e2d422	71	MODULE_PARM_DESC(noaccel, "Disable all acceleration");
aba99a84	72	int nouveau_noaccel = -1;
a32ed69d MK	73	module_param_named(noaccel, nouveau_noaccel, int, 0400);
a32ed69d MK	74
81e2d422	75	MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
a32ed69d MK	76	int nouveau_nofbaccel = 0;
	77	module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
	78
0cba1b76 MK	79	MODULE_PARM_DESC(force_post, "Force POST");
	80	int nouveau_force_post = 0;
	81	module_param_named(force_post, nouveau_force_post, int, 0400);
	82
da647d5b BS	83	MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
	84	int nouveau_override_conntype = 0;
	85	module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
	86
1a5f985c	87	MODULE_PARM_DESC(tv_disable, "Disable TV-out detection");
f4053509 BS	88	int nouveau_tv_disable = 0;
	89	module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
	90
6ee73861 BS	91	MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
	92	"\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
	93	"\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
	94	"\t\tDefault: PAL\n"
	95	"\t\tNOTE Ignored for cards with external TV encoders.");
	96	char *nouveau_tv_norm;
	97	module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
	98
	99	MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
	100	"\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
	101	"\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
1a5f985c	102	"\t\t0x100 vgaattr, 0x200 EVO (G80+)");
6ee73861 BS	103	int nouveau_reg_debug;
	104	module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
	105
1a5f985c	106	MODULE_PARM_DESC(perflvl, "Performance level (default: boot)");
6f876986 BS	107	char *nouveau_perflvl;
	108	module_param_named(perflvl, nouveau_perflvl, charp, 0400);
	109
1a5f985c	110	MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)");
6f876986 BS	111	int nouveau_perflvl_wr;
	112	module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);
	113
1a5f985c	114	MODULE_PARM_DESC(msi, "Enable MSI (default: off)");
35fa2f2a BS	115	int nouveau_msi;
	116	module_param_named(msi, nouveau_msi, int, 0400);
	117
1a5f985c	118	MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)");
0411de85 BS	119	int nouveau_ctxfw;
	120	module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
	121
1a5f985c	122	MODULE_PARM_DESC(mxmdcb, "Santise DCB table according to MXM-SIS");
b4c26818 BS	123	int nouveau_mxmdcb = 1;
	124	module_param_named(mxmdcb, nouveau_mxmdcb, int, 0400);
	125
6ee73861 BS	126	int nouveau_fbpercrtc;
	127	#if 0
	128	module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
	129	#endif
	130
6ee73861 BS	131	static struct drm_driver driver;
6ee73861 BS	132
94580299	133	int __devinit
6ee73861 BS	134	nouveau_pci_probe(struct pci_dev pdev, const struct pci_device_id ent)
6ee73861 BS	135	{
dcdb1674	136	return drm_get_pci_dev(pdev, ent, &driver);
6ee73861 BS	137	}
6ee73861 BS	138
94580299	139	void
6ee73861 BS	140	nouveau_pci_remove(struct pci_dev *pdev)
	141	{
	142	struct drm_device *dev = pci_get_drvdata(pdev);
	143
	144	drm_put_dev(dev);
	145	}
	146
6a9ee8af	147	int
6ee73861 BS	148	nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
	149	{
	150	struct drm_device *dev = pci_get_drvdata(pdev);
	151	struct drm_nouveau_private *dev_priv = dev->dev_private;
c420b2dc	152	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
e193b1d4	153	struct nouveau_fence_priv *fence = dev_priv->fence.func;
6ee73861 BS	154	struct nouveau_channel *chan;
6ee73861 BS	155	struct drm_crtc *crtc;
92abe749	156	int ret, i, e;
6ee73861	157
f62b27db BS	158	NV_INFO(dev, "Disabling display...\n");
f62b27db BS	159	nouveau_display_fini(dev);
4bfb94a1	160
cf41d53b BS	161	NV_INFO(dev, "Disabling fbcon...\n");
cf41d53b BS	162	nouveau_fbcon_set_suspend(dev, 1);
6ee73861	163
81441570	164	NV_INFO(dev, "Unpinning framebuffer(s)...\n");
6ee73861 BS	165	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	166	struct nouveau_framebuffer *nouveau_fb;
	167
	168	nouveau_fb = nouveau_framebuffer(crtc->fb);
	169	if (!nouveau_fb \|\| !nouveau_fb->nvbo)
	170	continue;
	171
	172	nouveau_bo_unpin(nouveau_fb->nvbo);
	173	}
	174
b334f2b3 MM	175	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	176	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
	177
	178	nouveau_bo_unmap(nv_crtc->cursor.nvbo);
	179	nouveau_bo_unpin(nv_crtc->cursor.nvbo);
	180	}
	181
6ee73861 BS	182	NV_INFO(dev, "Evicting buffers...\n");
	183	ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
	184
	185	NV_INFO(dev, "Idling channels...\n");
c420b2dc	186	for (i = 0; i < (pfifo ? pfifo->channels : 0); i++) {
cff5c133	187	chan = dev_priv->channels.ptr[i];
6ee73861	188
6dccd311 FJ	189	if (chan && chan->pushbuf_bo)
6dccd311 FJ	190	nouveau_channel_idle(chan);
6ee73861 BS	191	}
6ee73861 BS	192
e193b1d4 BS	193	if (fence->suspend) {
	194	if (!fence->suspend(dev))
	195	return -ENOMEM;
	196	}
	197
92abe749	198	for (e = NVOBJ_ENGINE_NR - 1; e >= 0; e--) {
6c320fef BS	199	if (!dev_priv->eng[e])
	200	continue;
	201
	202	ret = dev_priv->eng[e]->fini(dev, e, true);
	203	if (ret) {
13f90122	204	NV_ERROR(dev, "... engine %d failed: %d\n", e, ret);
6c320fef	205	goto out_abort;
92abe749 BS	206	}
92abe749 BS	207	}
6ee73861	208
6ee73861 BS	209	return 0;
	210
	211	out_abort:
	212	NV_INFO(dev, "Re-enabling acceleration..\n");
92abe749 BS	213	for (e = e + 1; e < NVOBJ_ENGINE_NR; e++) {
	214	if (dev_priv->eng[e])
	215	dev_priv->eng[e]->init(dev, e);
	216	}
6ee73861 BS	217	return ret;
	218	}
	219
6a9ee8af	220	int
6ee73861 BS	221	nouveau_pci_resume(struct pci_dev *pdev)
	222	{
	223	struct drm_device *dev = pci_get_drvdata(pdev);
c420b2dc	224	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
6ee73861	225	struct drm_nouveau_private *dev_priv = dev->dev_private;
e193b1d4	226	struct nouveau_fence_priv *fence = dev_priv->fence.func;
6ee73861 BS	227	struct nouveau_engine *engine = &dev_priv->engine;
6ee73861 BS	228	struct drm_crtc *crtc;
6ee73861 BS	229	int ret, i;
6ee73861 BS	230
c88c2e06 FJ	231	/* Make the CRTCs accessible */
	232	engine->display.early_init(dev);
	233
6ee73861 BS	234	NV_INFO(dev, "POSTing device...\n");
	235	ret = nouveau_run_vbios_init(dev);
	236	if (ret)
	237	return ret;
	238
6ee73861	239	NV_INFO(dev, "Reinitialising engines...\n");
6dfdd7a6 BS	240	for (i = 0; i < NVOBJ_ENGINE_NR; i++) {
	241	if (dev_priv->eng[i])
	242	dev_priv->eng[i]->init(dev, i);
	243	}
6ee73861	244
e193b1d4 BS	245	if (fence->resume)
	246	fence->resume(dev);
	247
6ee73861 BS	248	nouveau_irq_postinstall(dev);
	249
	250	/* Re-write SKIPS, they'll have been lost over the suspend */
	251	if (nouveau_vram_pushbuf) {
	252	struct nouveau_channel *chan;
	253	int j;
	254
c420b2dc	255	for (i = 0; i < (pfifo ? pfifo->channels : 0); i++) {
cff5c133	256	chan = dev_priv->channels.ptr[i];
3c8868d3	257	if (!chan \|\| !chan->pushbuf_bo)
6ee73861 BS	258	continue;
	259
	260	for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
	261	nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
	262	}
	263	}
	264
71d91f65 ML	265	nouveau_pm_resume(dev);
71d91f65 ML	266
6ee73861 BS	267	NV_INFO(dev, "Restoring mode...\n");
	268	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	269	struct nouveau_framebuffer *nouveau_fb;
	270
	271	nouveau_fb = nouveau_framebuffer(crtc->fb);
	272	if (!nouveau_fb \|\| !nouveau_fb->nvbo)
	273	continue;
	274
	275	nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
	276	}
	277
b334f2b3 MM	278	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
b334f2b3 MM	279	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
b334f2b3 MM	280
	281	ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
	282	if (!ret)
	283	ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
	284	if (ret)
	285	NV_ERROR(dev, "Could not pin/map cursor.\n");
	286	}
	287
cf41d53b BS	288	nouveau_fbcon_set_suspend(dev, 0);
	289	nouveau_fbcon_zfill_all(dev);
	290
f62b27db	291	nouveau_display_init(dev);
6ee73861 BS	292
	293	/* Force CLUT to get re-loaded during modeset */
	294	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	295	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
	296
	297	nv_crtc->lut.depth = 0;
	298	}
	299
6ee73861	300	drm_helper_resume_force_mode(dev);
38651674	301
a4eaa0a0 ML	302	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	303	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
	304	u32 offset = nv_crtc->cursor.nvbo->bo.offset;
	305
	306	nv_crtc->cursor.set_offset(nv_crtc, offset);
	307	nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
	308	nv_crtc->cursor_saved_y);
	309	}
	310
6ee73861 BS	311	return 0;
	312	}
	313
2a259a3d BS	314	static struct drm_ioctl_desc nouveau_ioctls[] = {
	315	DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED\|DRM_AUTH),
	316	DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED\|DRM_AUTH\|DRM_MASTER\|DRM_ROOT_ONLY),
	317	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED\|DRM_AUTH),
	318	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED\|DRM_AUTH),
	319	DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED\|DRM_AUTH),
	320	DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED\|DRM_AUTH),
	321	DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED\|DRM_AUTH),
	322	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED\|DRM_AUTH),
	323	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED\|DRM_AUTH),
	324	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED\|DRM_AUTH),
	325	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED\|DRM_AUTH),
	326	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED\|DRM_AUTH),
	327	};
	328
e08e96de AV	329	static const struct file_operations nouveau_driver_fops = {
	330	.owner = THIS_MODULE,
	331	.open = drm_open,
	332	.release = drm_release,
	333	.unlocked_ioctl = drm_ioctl,
	334	.mmap = nouveau_ttm_mmap,
	335	.poll = drm_poll,
	336	.fasync = drm_fasync,
	337	.read = drm_read,
	338	#if defined(CONFIG_COMPAT)
	339	.compat_ioctl = nouveau_compat_ioctl,
	340	#endif
	341	.llseek = noop_llseek,
	342	};
	343
94580299 BS	344	int nouveau_drm_load(struct drm_device *, unsigned long);
	345	int nouveau_drm_unload(struct drm_device *);
	346
6ee73861 BS	347	static struct drm_driver driver = {
	348	.driver_features =
	349	DRIVER_USE_AGP \| DRIVER_PCI_DMA \| DRIVER_SG \|
cd0b072f	350	DRIVER_HAVE_IRQ \| DRIVER_IRQ_SHARED \| DRIVER_GEM \|
22b33e8e	351	DRIVER_MODESET \| DRIVER_PRIME,
94580299	352	.load = nouveau_drm_load,
6ee73861 BS	353	.firstopen = nouveau_firstopen,
6ee73861 BS	354	.lastclose = nouveau_lastclose,
94580299	355	.unload = nouveau_drm_unload,
3f0a68d8	356	.open = nouveau_open,
6ee73861	357	.preclose = nouveau_preclose,
3f0a68d8	358	.postclose = nouveau_postclose,
6ee73861 BS	359	#if defined(CONFIG_DRM_NOUVEAU_DEBUG)
	360	.debugfs_init = nouveau_debugfs_init,
	361	.debugfs_cleanup = nouveau_debugfs_takedown,
	362	#endif
	363	.irq_preinstall = nouveau_irq_preinstall,
	364	.irq_postinstall = nouveau_irq_postinstall,
	365	.irq_uninstall = nouveau_irq_uninstall,
	366	.irq_handler = nouveau_irq_handler,
042206c0 FJ	367	.get_vblank_counter = drm_vblank_count,
	368	.enable_vblank = nouveau_vblank_enable,
	369	.disable_vblank = nouveau_vblank_disable,
6ee73861	370	.ioctls = nouveau_ioctls,
e08e96de	371	.fops = &nouveau_driver_fops,
22b33e8e DA	372
	373	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	374	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	375	.gem_prime_export = nouveau_gem_prime_export,
	376	.gem_prime_import = nouveau_gem_prime_import,
	377
6ee73861 BS	378	.gem_init_object = nouveau_gem_object_new,
6ee73861 BS	379	.gem_free_object = nouveau_gem_object_del,
639212d0 BS	380	.gem_open_object = nouveau_gem_object_open,
639212d0 BS	381	.gem_close_object = nouveau_gem_object_close,
6ee73861	382
33dbc27f BS	383	.dumb_create = nouveau_display_dumb_create,
	384	.dumb_map_offset = nouveau_display_dumb_map_offset,
	385	.dumb_destroy = nouveau_display_dumb_destroy,
	386
6ee73861 BS	387	.name = DRIVER_NAME,
	388	.desc = DRIVER_DESC,
	389	#ifdef GIT_REVISION
	390	.date = GIT_REVISION,
	391	#else
	392	.date = DRIVER_DATE,
	393	#endif
	394	.major = DRIVER_MAJOR,
	395	.minor = DRIVER_MINOR,
	396	.patchlevel = DRIVER_PATCHLEVEL,
	397	};
	398
94580299	399	int __init nouveau_init(struct pci_driver *pdrv)
6ee73861	400	{
2a259a3d	401	driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
6ee73861 BS	402
	403	if (nouveau_modeset == -1) {
	404	#ifdef CONFIG_VGA_CONSOLE
	405	if (vgacon_text_force())
	406	nouveau_modeset = 0;
	407	else
	408	#endif
	409	nouveau_modeset = 1;
	410	}
	411
cd0b072f BS	412	if (!nouveau_modeset)
cd0b072f BS	413	return 0;
6ee73861	414
cd0b072f	415	nouveau_register_dsm_handler();
94580299	416	return drm_pci_init(&driver, pdrv);
6ee73861 BS	417	}
6ee73861 BS	418
94580299	419	void __exit nouveau_exit(struct pci_driver *pdrv)
6ee73861	420	{
cd0b072f BS	421	if (!nouveau_modeset)
	422	return;
	423
94580299	424	drm_pci_exit(&driver, pdrv);
6a9ee8af	425	nouveau_unregister_dsm_handler();
6ee73861	426	}