[linux-2.6-block.git] / drivers / gpu / drm / nouveau / nouveau_drv.c

/*
 * Copyright 2005 Stephane Marchesin.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include <linux/console.h>
#include <linux/module.h>

#include "drmP.h"
#include "drm.h"
#include "drm_crtc_helper.h"
#include "nouveau_drv.h"
#include "nouveau_abi16.h"
#include "nouveau_hw.h"
#include "nouveau_fb.h"
#include "nouveau_fbcon.h"
#include "nouveau_pm.h"
#include <engine/fifo.h>
#include "nv50_display.h"

#include "drm_pciids.h"

MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
int nouveau_modeset = -1;
module_param_named(modeset, nouveau_modeset, int, 0400);

MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
int nouveau_vram_pushbuf;
module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);

MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
int nouveau_vram_notify = 0;
module_param_named(vram_notify, nouveau_vram_notify, int, 0400);

MODULE_PARM_DESC(vram_type, "Override detected VRAM type");
char *nouveau_vram_type;
module_param_named(vram_type, nouveau_vram_type, charp, 0400);

MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
int nouveau_duallink = 1;
module_param_named(duallink, nouveau_duallink, int, 0400);

MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
int nouveau_uscript_lvds = -1;
module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);

MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
int nouveau_uscript_tmds = -1;
module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);

MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
int nouveau_ignorelid = 0;
module_param_named(ignorelid, nouveau_ignorelid, int, 0400);

MODULE_PARM_DESC(noaccel, "Disable all acceleration");
int nouveau_noaccel = -1;
module_param_named(noaccel, nouveau_noaccel, int, 0400);

MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
int nouveau_nofbaccel = 0;
module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);

MODULE_PARM_DESC(force_post, "Force POST");
int nouveau_force_post = 0;
module_param_named(force_post, nouveau_force_post, int, 0400);

MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
int nouveau_override_conntype = 0;
module_param_named(override_conntype, nouveau_override_conntype, int, 0400);

MODULE_PARM_DESC(tv_disable, "Disable TV-out detection");
int nouveau_tv_disable = 0;
module_param_named(tv_disable, nouveau_tv_disable, int, 0400);

MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
		 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
		 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
		 "\t\tDefault: PAL\n"
		 "\t\t*NOTE* Ignored for cards with external TV encoders.");
char *nouveau_tv_norm;
module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);

MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
		"\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
		"\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
		"\t\t0x100 vgaattr, 0x200 EVO (G80+)");
int nouveau_reg_debug;
module_param_named(reg_debug, nouveau_reg_debug, int, 0600);

MODULE_PARM_DESC(perflvl, "Performance level (default: boot)");
char *nouveau_perflvl;
module_param_named(perflvl, nouveau_perflvl, charp, 0400);

MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)");
int nouveau_perflvl_wr;
module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);

MODULE_PARM_DESC(msi, "Enable MSI (default: off)");
int nouveau_msi;
module_param_named(msi, nouveau_msi, int, 0400);

MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)");
int nouveau_ctxfw;
module_param_named(ctxfw, nouveau_ctxfw, int, 0400);

MODULE_PARM_DESC(mxmdcb, "Santise DCB table according to MXM-SIS");
int nouveau_mxmdcb = 1;
module_param_named(mxmdcb, nouveau_mxmdcb, int, 0400);

int nouveau_fbpercrtc;
#if 0
module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
#endif

static struct drm_driver driver;

int __devinit
nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	return drm_get_pci_dev(pdev, ent, &driver);
}

void
nouveau_pci_remove(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	drm_put_dev(dev);
}

int
nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
	struct nouveau_channel *chan;
	struct drm_crtc *crtc;
	int ret, i, e;

	NV_INFO(dev, "Disabling display...\n");
	nouveau_display_fini(dev);

	NV_INFO(dev, "Disabling fbcon...\n");
	nouveau_fbcon_set_suspend(dev, 1);

	NV_INFO(dev, "Unpinning framebuffer(s)...\n");
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_framebuffer *nouveau_fb;

		nouveau_fb = nouveau_framebuffer(crtc->fb);
		if (!nouveau_fb || !nouveau_fb->nvbo)
			continue;

		nouveau_bo_unpin(nouveau_fb->nvbo);
	}

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

		nouveau_bo_unmap(nv_crtc->cursor.nvbo);
		nouveau_bo_unpin(nv_crtc->cursor.nvbo);
	}

	NV_INFO(dev, "Evicting buffers...\n");
	ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);

	NV_INFO(dev, "Idling channels...\n");
	for (i = 0; i < (pfifo ? pfifo->channels : 0); i++) {
		chan = dev_priv->channels.ptr[i];

		if (chan && chan->pushbuf_bo)
			nouveau_channel_idle(chan);
	}

	for (e = NVOBJ_ENGINE_NR - 1; e >= 0; e--) {
		if (!dev_priv->eng[e])
			continue;

		ret = dev_priv->eng[e]->fini(dev, e, true);
		if (ret) {
			NV_ERROR(dev, "... engine %d failed: %d\n", e, ret);
			goto out_abort;
		}
	}

	ret = pinstmem->suspend(dev);
	if (ret) {
		NV_ERROR(dev, "... failed: %d\n", ret);
		goto out_abort;
	}

	NV_INFO(dev, "Suspending GPU objects...\n");
	ret = nouveau_gpuobj_suspend(dev);
	if (ret) {
		NV_ERROR(dev, "... failed: %d\n", ret);
		pinstmem->resume(dev);
		goto out_abort;
	}

	return 0;

out_abort:
	NV_INFO(dev, "Re-enabling acceleration..\n");
	for (e = e + 1; e < NVOBJ_ENGINE_NR; e++) {
		if (dev_priv->eng[e])
			dev_priv->eng[e]->init(dev, e);
	}
	return ret;
}

int
nouveau_pci_resume(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_engine *engine = &dev_priv->engine;
	struct drm_crtc *crtc;
	int ret, i;

	/* Make the CRTCs accessible */
	engine->display.early_init(dev);

	NV_INFO(dev, "POSTing device...\n");
	ret = nouveau_run_vbios_init(dev);
	if (ret)
		return ret;

	NV_INFO(dev, "Restoring GPU objects...\n");
	nouveau_gpuobj_resume(dev);

	NV_INFO(dev, "Reinitialising engines...\n");
	engine->instmem.resume(dev);
	engine->timer.init(dev);
	engine->fb.init(dev);
	for (i = 0; i < NVOBJ_ENGINE_NR; i++) {
		if (dev_priv->eng[i])
			dev_priv->eng[i]->init(dev, i);
	}

	nouveau_irq_postinstall(dev);

	/* Re-write SKIPS, they'll have been lost over the suspend */
	if (nouveau_vram_pushbuf) {
		struct nouveau_channel *chan;
		int j;

		for (i = 0; i < (pfifo ? pfifo->channels : 0); i++) {
			chan = dev_priv->channels.ptr[i];
			if (!chan || !chan->pushbuf_bo)
				continue;

			for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
				nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
		}
	}

	nouveau_pm_resume(dev);

	NV_INFO(dev, "Restoring mode...\n");
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_framebuffer *nouveau_fb;

		nouveau_fb = nouveau_framebuffer(crtc->fb);
		if (!nouveau_fb || !nouveau_fb->nvbo)
			continue;

		nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
	}

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

		ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
		if (!ret)
			ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
		if (ret)
			NV_ERROR(dev, "Could not pin/map cursor.\n");
	}

	nouveau_fbcon_set_suspend(dev, 0);
	nouveau_fbcon_zfill_all(dev);

	nouveau_display_init(dev);

	/* Force CLUT to get re-loaded during modeset */
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

		nv_crtc->lut.depth = 0;
	}

	drm_helper_resume_force_mode(dev);

	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
		u32 offset = nv_crtc->cursor.nvbo->bo.offset;

		nv_crtc->cursor.set_offset(nv_crtc, offset);
		nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
						 nv_crtc->cursor_saved_y);
	}

	return 0;
}

static struct drm_ioctl_desc nouveau_ioctls[] = {
	DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH),
	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH),
};

static const struct file_operations nouveau_driver_fops = {
	.owner = THIS_MODULE,
	.open = drm_open,
	.release = drm_release,
	.unlocked_ioctl = drm_ioctl,
	.mmap = nouveau_ttm_mmap,
	.poll = drm_poll,
	.fasync = drm_fasync,
	.read = drm_read,
#if defined(CONFIG_COMPAT)
	.compat_ioctl = nouveau_compat_ioctl,
#endif
	.llseek = noop_llseek,
};

int nouveau_drm_load(struct drm_device *, unsigned long);
int nouveau_drm_unload(struct drm_device *);

static struct drm_driver driver = {
	.driver_features =
		DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
		DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
		DRIVER_MODESET | DRIVER_PRIME,
	.load = nouveau_drm_load,
	.firstopen = nouveau_firstopen,
	.lastclose = nouveau_lastclose,
	.unload = nouveau_drm_unload,
	.open = nouveau_open,
	.preclose = nouveau_preclose,
	.postclose = nouveau_postclose,
#if defined(CONFIG_DRM_NOUVEAU_DEBUG)
	.debugfs_init = nouveau_debugfs_init,
	.debugfs_cleanup = nouveau_debugfs_takedown,
#endif
	.irq_preinstall = nouveau_irq_preinstall,
	.irq_postinstall = nouveau_irq_postinstall,
	.irq_uninstall = nouveau_irq_uninstall,
	.irq_handler = nouveau_irq_handler,
	.get_vblank_counter = drm_vblank_count,
	.enable_vblank = nouveau_vblank_enable,
	.disable_vblank = nouveau_vblank_disable,
	.ioctls = nouveau_ioctls,
	.fops = &nouveau_driver_fops,

	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	.gem_prime_export = nouveau_gem_prime_export,
	.gem_prime_import = nouveau_gem_prime_import,

	.gem_init_object = nouveau_gem_object_new,
	.gem_free_object = nouveau_gem_object_del,
	.gem_open_object = nouveau_gem_object_open,
	.gem_close_object = nouveau_gem_object_close,

	.dumb_create = nouveau_display_dumb_create,
	.dumb_map_offset = nouveau_display_dumb_map_offset,
	.dumb_destroy = nouveau_display_dumb_destroy,

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
#ifdef GIT_REVISION
	.date = GIT_REVISION,
#else
	.date = DRIVER_DATE,
#endif
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
	.patchlevel = DRIVER_PATCHLEVEL,
};

int __init nouveau_init(struct pci_driver *pdrv)
{
	driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);

	if (nouveau_modeset == -1) {
#ifdef CONFIG_VGA_CONSOLE
		if (vgacon_text_force())
			nouveau_modeset = 0;
		else
#endif
			nouveau_modeset = 1;
	}

	if (!nouveau_modeset)
		return 0;

	nouveau_register_dsm_handler();
	return drm_pci_init(&driver, pdrv);
}

void __exit nouveau_exit(struct pci_driver *pdrv)
{
	if (!nouveau_modeset)
		return;

	drm_pci_exit(&driver, pdrv);
	nouveau_unregister_dsm_handler();
}
Commit	Line	Data
6ee73861 BS	1	/*
	2	* Copyright 2005 Stephane Marchesin.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	22	* OTHER DEALINGS IN THE SOFTWARE.
	23	*/
	24
	25	#include <linux/console.h>
e0cd3608	26	#include <linux/module.h>
6ee73861 BS	27
	28	#include "drmP.h"
	29	#include "drm.h"
	30	#include "drm_crtc_helper.h"
	31	#include "nouveau_drv.h"
2a259a3d	32	#include "nouveau_abi16.h"
6ee73861 BS	33	#include "nouveau_hw.h"
	34	#include "nouveau_fb.h"
	35	#include "nouveau_fbcon.h"
64f1c11a	36	#include "nouveau_pm.h"
02a841d4	37	#include <engine/fifo.h>
6ee73861 BS	38	#include "nv50_display.h"
	39
	40	#include "drm_pciids.h"
	41
6ee73861	42	MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
03bc9675	43	int nouveau_modeset = -1;
6ee73861 BS	44	module_param_named(modeset, nouveau_modeset, int, 0400);
6ee73861 BS	45
6ee73861 BS	46	MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
	47	int nouveau_vram_pushbuf;
	48	module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
	49
	50	MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
2dfe36b1	51	int nouveau_vram_notify = 0;
6ee73861 BS	52	module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
6ee73861 BS	53
7ad2d31c BS	54	MODULE_PARM_DESC(vram_type, "Override detected VRAM type");
	55	char *nouveau_vram_type;
	56	module_param_named(vram_type, nouveau_vram_type, charp, 0400);
	57
6ee73861 BS	58	MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
	59	int nouveau_duallink = 1;
	60	module_param_named(duallink, nouveau_duallink, int, 0400);
	61
	62	MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
	63	int nouveau_uscript_lvds = -1;
	64	module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
	65
	66	MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
	67	int nouveau_uscript_tmds = -1;
	68	module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
	69
a1470890 BS	70	MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
	71	int nouveau_ignorelid = 0;
	72	module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
	73
81e2d422	74	MODULE_PARM_DESC(noaccel, "Disable all acceleration");
aba99a84	75	int nouveau_noaccel = -1;
a32ed69d MK	76	module_param_named(noaccel, nouveau_noaccel, int, 0400);
a32ed69d MK	77
81e2d422	78	MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
a32ed69d MK	79	int nouveau_nofbaccel = 0;
	80	module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
	81
0cba1b76 MK	82	MODULE_PARM_DESC(force_post, "Force POST");
	83	int nouveau_force_post = 0;
	84	module_param_named(force_post, nouveau_force_post, int, 0400);
	85
da647d5b BS	86	MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
	87	int nouveau_override_conntype = 0;
	88	module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
	89
1a5f985c	90	MODULE_PARM_DESC(tv_disable, "Disable TV-out detection");
f4053509 BS	91	int nouveau_tv_disable = 0;
	92	module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
	93
6ee73861 BS	94	MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
	95	"\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
	96	"\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
	97	"\t\tDefault: PAL\n"
	98	"\t\tNOTE Ignored for cards with external TV encoders.");
	99	char *nouveau_tv_norm;
	100	module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
	101
	102	MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
	103	"\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
	104	"\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
1a5f985c	105	"\t\t0x100 vgaattr, 0x200 EVO (G80+)");
6ee73861 BS	106	int nouveau_reg_debug;
	107	module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
	108
1a5f985c	109	MODULE_PARM_DESC(perflvl, "Performance level (default: boot)");
6f876986 BS	110	char *nouveau_perflvl;
	111	module_param_named(perflvl, nouveau_perflvl, charp, 0400);
	112
1a5f985c	113	MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)");
6f876986 BS	114	int nouveau_perflvl_wr;
	115	module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);
	116
1a5f985c	117	MODULE_PARM_DESC(msi, "Enable MSI (default: off)");
35fa2f2a BS	118	int nouveau_msi;
	119	module_param_named(msi, nouveau_msi, int, 0400);
	120
1a5f985c	121	MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)");
0411de85 BS	122	int nouveau_ctxfw;
	123	module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
	124
1a5f985c	125	MODULE_PARM_DESC(mxmdcb, "Santise DCB table according to MXM-SIS");
b4c26818 BS	126	int nouveau_mxmdcb = 1;
	127	module_param_named(mxmdcb, nouveau_mxmdcb, int, 0400);
	128
6ee73861 BS	129	int nouveau_fbpercrtc;
	130	#if 0
	131	module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
	132	#endif
	133
6ee73861 BS	134	static struct drm_driver driver;
6ee73861 BS	135
94580299	136	int __devinit
6ee73861 BS	137	nouveau_pci_probe(struct pci_dev pdev, const struct pci_device_id ent)
6ee73861 BS	138	{
dcdb1674	139	return drm_get_pci_dev(pdev, ent, &driver);
6ee73861 BS	140	}
6ee73861 BS	141
94580299	142	void
6ee73861 BS	143	nouveau_pci_remove(struct pci_dev *pdev)
	144	{
	145	struct drm_device *dev = pci_get_drvdata(pdev);
	146
	147	drm_put_dev(dev);
	148	}
	149
6a9ee8af	150	int
6ee73861 BS	151	nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
	152	{
	153	struct drm_device *dev = pci_get_drvdata(pdev);
	154	struct drm_nouveau_private *dev_priv = dev->dev_private;
	155	struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
c420b2dc	156	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
6ee73861 BS	157	struct nouveau_channel *chan;
6ee73861 BS	158	struct drm_crtc *crtc;
92abe749	159	int ret, i, e;
6ee73861	160
f62b27db BS	161	NV_INFO(dev, "Disabling display...\n");
f62b27db BS	162	nouveau_display_fini(dev);
4bfb94a1	163
cf41d53b BS	164	NV_INFO(dev, "Disabling fbcon...\n");
cf41d53b BS	165	nouveau_fbcon_set_suspend(dev, 1);
6ee73861	166
81441570	167	NV_INFO(dev, "Unpinning framebuffer(s)...\n");
6ee73861 BS	168	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	169	struct nouveau_framebuffer *nouveau_fb;
	170
	171	nouveau_fb = nouveau_framebuffer(crtc->fb);
	172	if (!nouveau_fb \|\| !nouveau_fb->nvbo)
	173	continue;
	174
	175	nouveau_bo_unpin(nouveau_fb->nvbo);
	176	}
	177
b334f2b3 MM	178	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	179	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
	180
	181	nouveau_bo_unmap(nv_crtc->cursor.nvbo);
	182	nouveau_bo_unpin(nv_crtc->cursor.nvbo);
	183	}
	184
6ee73861 BS	185	NV_INFO(dev, "Evicting buffers...\n");
	186	ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
	187
	188	NV_INFO(dev, "Idling channels...\n");
c420b2dc	189	for (i = 0; i < (pfifo ? pfifo->channels : 0); i++) {
cff5c133	190	chan = dev_priv->channels.ptr[i];
6ee73861	191
6dccd311 FJ	192	if (chan && chan->pushbuf_bo)
6dccd311 FJ	193	nouveau_channel_idle(chan);
6ee73861 BS	194	}
6ee73861 BS	195
92abe749	196	for (e = NVOBJ_ENGINE_NR - 1; e >= 0; e--) {
6c320fef BS	197	if (!dev_priv->eng[e])
	198	continue;
	199
	200	ret = dev_priv->eng[e]->fini(dev, e, true);
	201	if (ret) {
13f90122	202	NV_ERROR(dev, "... engine %d failed: %d\n", e, ret);
6c320fef	203	goto out_abort;
92abe749 BS	204	}
92abe749 BS	205	}
6ee73861	206
dc1e5c0d	207	ret = pinstmem->suspend(dev);
6ee73861 BS	208	if (ret) {
	209	NV_ERROR(dev, "... failed: %d\n", ret);
	210	goto out_abort;
	211	}
	212
dc1e5c0d BS	213	NV_INFO(dev, "Suspending GPU objects...\n");
dc1e5c0d BS	214	ret = nouveau_gpuobj_suspend(dev);
6ee73861 BS	215	if (ret) {
6ee73861 BS	216	NV_ERROR(dev, "... failed: %d\n", ret);
dc1e5c0d	217	pinstmem->resume(dev);
6ee73861 BS	218	goto out_abort;
	219	}
	220
6ee73861 BS	221	return 0;
	222
	223	out_abort:
	224	NV_INFO(dev, "Re-enabling acceleration..\n");
92abe749 BS	225	for (e = e + 1; e < NVOBJ_ENGINE_NR; e++) {
	226	if (dev_priv->eng[e])
	227	dev_priv->eng[e]->init(dev, e);
	228	}
6ee73861 BS	229	return ret;
	230	}
	231
6a9ee8af	232	int
6ee73861 BS	233	nouveau_pci_resume(struct pci_dev *pdev)
	234	{
	235	struct drm_device *dev = pci_get_drvdata(pdev);
c420b2dc	236	struct nouveau_fifo_priv *pfifo = nv_engine(dev, NVOBJ_ENGINE_FIFO);
6ee73861 BS	237	struct drm_nouveau_private *dev_priv = dev->dev_private;
	238	struct nouveau_engine *engine = &dev_priv->engine;
	239	struct drm_crtc *crtc;
6ee73861 BS	240	int ret, i;
6ee73861 BS	241
c88c2e06 FJ	242	/* Make the CRTCs accessible */
	243	engine->display.early_init(dev);
	244
6ee73861 BS	245	NV_INFO(dev, "POSTing device...\n");
	246	ret = nouveau_run_vbios_init(dev);
	247	if (ret)
	248	return ret;
	249
dc1e5c0d BS	250	NV_INFO(dev, "Restoring GPU objects...\n");
	251	nouveau_gpuobj_resume(dev);
	252
6ee73861 BS	253	NV_INFO(dev, "Reinitialising engines...\n");
6ee73861 BS	254	engine->instmem.resume(dev);
6ee73861 BS	255	engine->timer.init(dev);
6ee73861 BS	256	engine->fb.init(dev);
6dfdd7a6 BS	257	for (i = 0; i < NVOBJ_ENGINE_NR; i++) {
	258	if (dev_priv->eng[i])
	259	dev_priv->eng[i]->init(dev, i);
	260	}
6ee73861	261
6ee73861 BS	262	nouveau_irq_postinstall(dev);
	263
	264	/* Re-write SKIPS, they'll have been lost over the suspend */
	265	if (nouveau_vram_pushbuf) {
	266	struct nouveau_channel *chan;
	267	int j;
	268
c420b2dc	269	for (i = 0; i < (pfifo ? pfifo->channels : 0); i++) {
cff5c133	270	chan = dev_priv->channels.ptr[i];
3c8868d3	271	if (!chan \|\| !chan->pushbuf_bo)
6ee73861 BS	272	continue;
	273
	274	for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
	275	nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
	276	}
	277	}
	278
71d91f65 ML	279	nouveau_pm_resume(dev);
71d91f65 ML	280
6ee73861 BS	281	NV_INFO(dev, "Restoring mode...\n");
	282	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	283	struct nouveau_framebuffer *nouveau_fb;
	284
	285	nouveau_fb = nouveau_framebuffer(crtc->fb);
	286	if (!nouveau_fb \|\| !nouveau_fb->nvbo)
	287	continue;
	288
	289	nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
	290	}
	291
b334f2b3 MM	292	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
b334f2b3 MM	293	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
b334f2b3 MM	294
	295	ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
	296	if (!ret)
	297	ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
	298	if (ret)
	299	NV_ERROR(dev, "Could not pin/map cursor.\n");
	300	}
	301
cf41d53b BS	302	nouveau_fbcon_set_suspend(dev, 0);
	303	nouveau_fbcon_zfill_all(dev);
	304
f62b27db	305	nouveau_display_init(dev);
6ee73861 BS	306
	307	/* Force CLUT to get re-loaded during modeset */
	308	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	309	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
	310
	311	nv_crtc->lut.depth = 0;
	312	}
	313
6ee73861	314	drm_helper_resume_force_mode(dev);
38651674	315
a4eaa0a0 ML	316	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	317	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
	318	u32 offset = nv_crtc->cursor.nvbo->bo.offset;
	319
	320	nv_crtc->cursor.set_offset(nv_crtc, offset);
	321	nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
	322	nv_crtc->cursor_saved_y);
	323	}
	324
6ee73861 BS	325	return 0;
	326	}
	327
2a259a3d BS	328	static struct drm_ioctl_desc nouveau_ioctls[] = {
	329	DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED\|DRM_AUTH),
	330	DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED\|DRM_AUTH\|DRM_MASTER\|DRM_ROOT_ONLY),
	331	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED\|DRM_AUTH),
	332	DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED\|DRM_AUTH),
	333	DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED\|DRM_AUTH),
	334	DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED\|DRM_AUTH),
	335	DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED\|DRM_AUTH),
	336	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED\|DRM_AUTH),
	337	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED\|DRM_AUTH),
	338	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED\|DRM_AUTH),
	339	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED\|DRM_AUTH),
	340	DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED\|DRM_AUTH),
	341	};
	342
e08e96de AV	343	static const struct file_operations nouveau_driver_fops = {
	344	.owner = THIS_MODULE,
	345	.open = drm_open,
	346	.release = drm_release,
	347	.unlocked_ioctl = drm_ioctl,
	348	.mmap = nouveau_ttm_mmap,
	349	.poll = drm_poll,
	350	.fasync = drm_fasync,
	351	.read = drm_read,
	352	#if defined(CONFIG_COMPAT)
	353	.compat_ioctl = nouveau_compat_ioctl,
	354	#endif
	355	.llseek = noop_llseek,
	356	};
	357
94580299 BS	358	int nouveau_drm_load(struct drm_device *, unsigned long);
	359	int nouveau_drm_unload(struct drm_device *);
	360
6ee73861 BS	361	static struct drm_driver driver = {
	362	.driver_features =
	363	DRIVER_USE_AGP \| DRIVER_PCI_DMA \| DRIVER_SG \|
cd0b072f	364	DRIVER_HAVE_IRQ \| DRIVER_IRQ_SHARED \| DRIVER_GEM \|
22b33e8e	365	DRIVER_MODESET \| DRIVER_PRIME,
94580299	366	.load = nouveau_drm_load,
6ee73861 BS	367	.firstopen = nouveau_firstopen,
6ee73861 BS	368	.lastclose = nouveau_lastclose,
94580299	369	.unload = nouveau_drm_unload,
3f0a68d8	370	.open = nouveau_open,
6ee73861	371	.preclose = nouveau_preclose,
3f0a68d8	372	.postclose = nouveau_postclose,
6ee73861 BS	373	#if defined(CONFIG_DRM_NOUVEAU_DEBUG)
	374	.debugfs_init = nouveau_debugfs_init,
	375	.debugfs_cleanup = nouveau_debugfs_takedown,
	376	#endif
	377	.irq_preinstall = nouveau_irq_preinstall,
	378	.irq_postinstall = nouveau_irq_postinstall,
	379	.irq_uninstall = nouveau_irq_uninstall,
	380	.irq_handler = nouveau_irq_handler,
042206c0 FJ	381	.get_vblank_counter = drm_vblank_count,
	382	.enable_vblank = nouveau_vblank_enable,
	383	.disable_vblank = nouveau_vblank_disable,
6ee73861	384	.ioctls = nouveau_ioctls,
e08e96de	385	.fops = &nouveau_driver_fops,
22b33e8e DA	386
	387	.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
	388	.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
	389	.gem_prime_export = nouveau_gem_prime_export,
	390	.gem_prime_import = nouveau_gem_prime_import,
	391
6ee73861 BS	392	.gem_init_object = nouveau_gem_object_new,
6ee73861 BS	393	.gem_free_object = nouveau_gem_object_del,
639212d0 BS	394	.gem_open_object = nouveau_gem_object_open,
639212d0 BS	395	.gem_close_object = nouveau_gem_object_close,
6ee73861	396
33dbc27f BS	397	.dumb_create = nouveau_display_dumb_create,
	398	.dumb_map_offset = nouveau_display_dumb_map_offset,
	399	.dumb_destroy = nouveau_display_dumb_destroy,
	400
6ee73861 BS	401	.name = DRIVER_NAME,
	402	.desc = DRIVER_DESC,
	403	#ifdef GIT_REVISION
	404	.date = GIT_REVISION,
	405	#else
	406	.date = DRIVER_DATE,
	407	#endif
	408	.major = DRIVER_MAJOR,
	409	.minor = DRIVER_MINOR,
	410	.patchlevel = DRIVER_PATCHLEVEL,
	411	};
	412
94580299	413	int __init nouveau_init(struct pci_driver *pdrv)
6ee73861	414	{
2a259a3d	415	driver.num_ioctls = ARRAY_SIZE(nouveau_ioctls);
6ee73861 BS	416
	417	if (nouveau_modeset == -1) {
	418	#ifdef CONFIG_VGA_CONSOLE
	419	if (vgacon_text_force())
	420	nouveau_modeset = 0;
	421	else
	422	#endif
	423	nouveau_modeset = 1;
	424	}
	425
cd0b072f BS	426	if (!nouveau_modeset)
cd0b072f BS	427	return 0;
6ee73861	428
cd0b072f	429	nouveau_register_dsm_handler();
94580299	430	return drm_pci_init(&driver, pdrv);
6ee73861 BS	431	}
6ee73861 BS	432
94580299	433	void __exit nouveau_exit(struct pci_driver *pdrv)
6ee73861	434	{
cd0b072f BS	435	if (!nouveau_modeset)
	436	return;
	437
94580299	438	drm_pci_exit(&driver, pdrv);
6a9ee8af	439	nouveau_unregister_dsm_handler();
6ee73861	440	}