[linux-2.6-block.git] / drivers / gpu / drm / nouveau / nouveau_drv.c

/*
 * Copyright 2005 Stephane Marchesin.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 */

#include <linux/console.h>

#include "drmP.h"
#include "drm.h"
#include "drm_crtc_helper.h"
#include "nouveau_drv.h"
#include "nouveau_hw.h"
#include "nouveau_fb.h"
#include "nouveau_fbcon.h"
#include "nv50_display.h"

#include "drm_pciids.h"

MODULE_PARM_DESC(ctxfw, "Use external firmware blob for grctx init (NV40)");
int nouveau_ctxfw = 0;
module_param_named(ctxfw, nouveau_ctxfw, int, 0400);

MODULE_PARM_DESC(noagp, "Disable AGP");
int nouveau_noagp;
module_param_named(noagp, nouveau_noagp, int, 0400);

MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
static int nouveau_modeset = -1; /* kms */
module_param_named(modeset, nouveau_modeset, int, 0400);

MODULE_PARM_DESC(vbios, "Override default VBIOS location");
char *nouveau_vbios;
module_param_named(vbios, nouveau_vbios, charp, 0400);

MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
int nouveau_vram_pushbuf;
module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);

MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
int nouveau_vram_notify = 1;
module_param_named(vram_notify, nouveau_vram_notify, int, 0400);

MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
int nouveau_duallink = 1;
module_param_named(duallink, nouveau_duallink, int, 0400);

MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
int nouveau_uscript_lvds = -1;
module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);

MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
int nouveau_uscript_tmds = -1;
module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);

MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
int nouveau_ignorelid = 0;
module_param_named(ignorelid, nouveau_ignorelid, int, 0400);

MODULE_PARM_DESC(noaccel, "Disable all acceleration");
int nouveau_noaccel = 0;
module_param_named(noaccel, nouveau_noaccel, int, 0400);

MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
int nouveau_nofbaccel = 0;
module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);

MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
int nouveau_override_conntype = 0;
module_param_named(override_conntype, nouveau_override_conntype, int, 0400);

MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
int nouveau_tv_disable = 0;
module_param_named(tv_disable, nouveau_tv_disable, int, 0400);

MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
		 "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
		 "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
		 "\t\tDefault: PAL\n"
		 "\t\t*NOTE* Ignored for cards with external TV encoders.");
char *nouveau_tv_norm;
module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);

MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
		"\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
		"\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
		"\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
int nouveau_reg_debug;
module_param_named(reg_debug, nouveau_reg_debug, int, 0600);

int nouveau_fbpercrtc;
#if 0
module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
#endif

static struct pci_device_id pciidlist[] = {
	{
		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
		.class = PCI_BASE_CLASS_DISPLAY << 16,
		.class_mask  = 0xff << 16,
	},
	{
		PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
		.class = PCI_BASE_CLASS_DISPLAY << 16,
		.class_mask  = 0xff << 16,
	},
	{}
};

MODULE_DEVICE_TABLE(pci, pciidlist);

static struct drm_driver driver;

static int __devinit
nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
{
	return drm_get_dev(pdev, ent, &driver);
}

static void
nouveau_pci_remove(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);

	drm_put_dev(dev);
}

int
nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
	struct nouveau_channel *chan;
	struct drm_crtc *crtc;
	uint32_t fbdev_flags;
	int ret, i;

	if (!drm_core_check_feature(dev, DRIVER_MODESET))
		return -ENODEV;

	if (pm_state.event == PM_EVENT_PRETHAW)
		return 0;

	NV_INFO(dev, "Disabling fbcon acceleration...\n");
	fbdev_flags = dev_priv->fbdev_info->flags;
	dev_priv->fbdev_info->flags |= FBINFO_HWACCEL_DISABLED;

	NV_INFO(dev, "Unpinning framebuffer(s)...\n");
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_framebuffer *nouveau_fb;

		nouveau_fb = nouveau_framebuffer(crtc->fb);
		if (!nouveau_fb || !nouveau_fb->nvbo)
			continue;

		nouveau_bo_unpin(nouveau_fb->nvbo);
	}

	NV_INFO(dev, "Evicting buffers...\n");
	ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);

	NV_INFO(dev, "Idling channels...\n");
	for (i = 0; i < pfifo->channels; i++) {
		struct nouveau_fence *fence = NULL;

		chan = dev_priv->fifos[i];
		if (!chan || (dev_priv->card_type >= NV_50 &&
			      chan == dev_priv->fifos[0]))
			continue;

		ret = nouveau_fence_new(chan, &fence, true);
		if (ret == 0) {
			ret = nouveau_fence_wait(fence, NULL, false, false);
			nouveau_fence_unref((void *)&fence);
		}

		if (ret) {
			NV_ERROR(dev, "Failed to idle channel %d for suspend\n",
				 chan->id);
		}
	}

	pgraph->fifo_access(dev, false);
	nouveau_wait_for_idle(dev);
	pfifo->reassign(dev, false);
	pfifo->disable(dev);
	pfifo->unload_context(dev);
	pgraph->unload_context(dev);

	NV_INFO(dev, "Suspending GPU objects...\n");
	ret = nouveau_gpuobj_suspend(dev);
	if (ret) {
		NV_ERROR(dev, "... failed: %d\n", ret);
		goto out_abort;
	}

	ret = pinstmem->suspend(dev);
	if (ret) {
		NV_ERROR(dev, "... failed: %d\n", ret);
		nouveau_gpuobj_suspend_cleanup(dev);
		goto out_abort;
	}

	NV_INFO(dev, "And we're gone!\n");
	pci_save_state(pdev);
	if (pm_state.event == PM_EVENT_SUSPEND) {
		pci_disable_device(pdev);
		pci_set_power_state(pdev, PCI_D3hot);
	}

	acquire_console_sem();
	fb_set_suspend(dev_priv->fbdev_info, 1);
	release_console_sem();
	dev_priv->fbdev_info->flags = fbdev_flags;
	return 0;

out_abort:
	NV_INFO(dev, "Re-enabling acceleration..\n");
	pfifo->enable(dev);
	pfifo->reassign(dev, true);
	pgraph->fifo_access(dev, true);
	return ret;
}

int
nouveau_pci_resume(struct pci_dev *pdev)
{
	struct drm_device *dev = pci_get_drvdata(pdev);
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_engine *engine = &dev_priv->engine;
	struct drm_crtc *crtc;
	uint32_t fbdev_flags;
	int ret, i;

	if (!drm_core_check_feature(dev, DRIVER_MODESET))
		return -ENODEV;

	fbdev_flags = dev_priv->fbdev_info->flags;
	dev_priv->fbdev_info->flags |= FBINFO_HWACCEL_DISABLED;

	NV_INFO(dev, "We're back, enabling device...\n");
	pci_set_power_state(pdev, PCI_D0);
	pci_restore_state(pdev);
	if (pci_enable_device(pdev))
		return -1;
	pci_set_master(dev->pdev);

	NV_INFO(dev, "POSTing device...\n");
	ret = nouveau_run_vbios_init(dev);
	if (ret)
		return ret;

	if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
		ret = nouveau_mem_init_agp(dev);
		if (ret) {
			NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
			return ret;
		}
	}

	NV_INFO(dev, "Reinitialising engines...\n");
	engine->instmem.resume(dev);
	engine->mc.init(dev);
	engine->timer.init(dev);
	engine->fb.init(dev);
	engine->graph.init(dev);
	engine->fifo.init(dev);

	NV_INFO(dev, "Restoring GPU objects...\n");
	nouveau_gpuobj_resume(dev);

	nouveau_irq_postinstall(dev);

	/* Re-write SKIPS, they'll have been lost over the suspend */
	if (nouveau_vram_pushbuf) {
		struct nouveau_channel *chan;
		int j;

		for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
			chan = dev_priv->fifos[i];
			if (!chan || !chan->pushbuf_bo)
				continue;

			for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
				nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
		}
	}

	NV_INFO(dev, "Restoring mode...\n");
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_framebuffer *nouveau_fb;

		nouveau_fb = nouveau_framebuffer(crtc->fb);
		if (!nouveau_fb || !nouveau_fb->nvbo)
			continue;

		nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
	}

	if (dev_priv->card_type < NV_50) {
		nv04_display_restore(dev);
		NVLockVgaCrtcs(dev, false);
	} else
		nv50_display_init(dev);

	/* Force CLUT to get re-loaded during modeset */
	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
		struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);

		nv_crtc->lut.depth = 0;
	}

	acquire_console_sem();
	fb_set_suspend(dev_priv->fbdev_info, 0);
	release_console_sem();

	nouveau_fbcon_zfill(dev);

	drm_helper_resume_force_mode(dev);
	dev_priv->fbdev_info->flags = fbdev_flags;
	return 0;
}

static struct drm_driver driver = {
	.driver_features =
		DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
		DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM,
	.load = nouveau_load,
	.firstopen = nouveau_firstopen,
	.lastclose = nouveau_lastclose,
	.unload = nouveau_unload,
	.preclose = nouveau_preclose,
#if defined(CONFIG_DRM_NOUVEAU_DEBUG)
	.debugfs_init = nouveau_debugfs_init,
	.debugfs_cleanup = nouveau_debugfs_takedown,
#endif
	.irq_preinstall = nouveau_irq_preinstall,
	.irq_postinstall = nouveau_irq_postinstall,
	.irq_uninstall = nouveau_irq_uninstall,
	.irq_handler = nouveau_irq_handler,
	.reclaim_buffers = drm_core_reclaim_buffers,
	.get_map_ofs = drm_core_get_map_ofs,
	.get_reg_ofs = drm_core_get_reg_ofs,
	.ioctls = nouveau_ioctls,
	.fops = {
		.owner = THIS_MODULE,
		.open = drm_open,
		.release = drm_release,
		.unlocked_ioctl = drm_ioctl,
		.mmap = nouveau_ttm_mmap,
		.poll = drm_poll,
		.fasync = drm_fasync,
#if defined(CONFIG_COMPAT)
		.compat_ioctl = nouveau_compat_ioctl,
#endif
	},
	.pci_driver = {
		.name = DRIVER_NAME,
		.id_table = pciidlist,
		.probe = nouveau_pci_probe,
		.remove = nouveau_pci_remove,
		.suspend = nouveau_pci_suspend,
		.resume = nouveau_pci_resume
	},

	.gem_init_object = nouveau_gem_object_new,
	.gem_free_object = nouveau_gem_object_del,

	.name = DRIVER_NAME,
	.desc = DRIVER_DESC,
#ifdef GIT_REVISION
	.date = GIT_REVISION,
#else
	.date = DRIVER_DATE,
#endif
	.major = DRIVER_MAJOR,
	.minor = DRIVER_MINOR,
	.patchlevel = DRIVER_PATCHLEVEL,
};

static int __init nouveau_init(void)
{
	driver.num_ioctls = nouveau_max_ioctl;

	if (nouveau_modeset == -1) {
#ifdef CONFIG_VGA_CONSOLE
		if (vgacon_text_force())
			nouveau_modeset = 0;
		else
#endif
			nouveau_modeset = 1;
	}

	if (nouveau_modeset == 1) {
		driver.driver_features |= DRIVER_MODESET;
		nouveau_register_dsm_handler();
	}

	return drm_init(&driver);
}

static void __exit nouveau_exit(void)
{
	drm_exit(&driver);
	nouveau_unregister_dsm_handler();
}

module_init(nouveau_init);
module_exit(nouveau_exit);

MODULE_AUTHOR(DRIVER_AUTHOR);
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL and additional rights");
Commit	Line	Data
6ee73861 BS	1	/*
	2	* Copyright 2005 Stephane Marchesin.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
	20	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	21	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	22	* OTHER DEALINGS IN THE SOFTWARE.
	23	*/
	24
	25	#include <linux/console.h>
	26
	27	#include "drmP.h"
	28	#include "drm.h"
	29	#include "drm_crtc_helper.h"
	30	#include "nouveau_drv.h"
	31	#include "nouveau_hw.h"
	32	#include "nouveau_fb.h"
	33	#include "nouveau_fbcon.h"
	34	#include "nv50_display.h"
	35
	36	#include "drm_pciids.h"
	37
054b93e4 BS	38	MODULE_PARM_DESC(ctxfw, "Use external firmware blob for grctx init (NV40)");
	39	int nouveau_ctxfw = 0;
	40	module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
	41
6ee73861 BS	42	MODULE_PARM_DESC(noagp, "Disable AGP");
	43	int nouveau_noagp;
	44	module_param_named(noagp, nouveau_noagp, int, 0400);
	45
	46	MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
	47	static int nouveau_modeset = -1; /* kms */
	48	module_param_named(modeset, nouveau_modeset, int, 0400);
	49
	50	MODULE_PARM_DESC(vbios, "Override default VBIOS location");
	51	char *nouveau_vbios;
	52	module_param_named(vbios, nouveau_vbios, charp, 0400);
	53
	54	MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
	55	int nouveau_vram_pushbuf;
	56	module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
	57
	58	MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
f927b890	59	int nouveau_vram_notify = 1;
6ee73861 BS	60	module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
	61
	62	MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
	63	int nouveau_duallink = 1;
	64	module_param_named(duallink, nouveau_duallink, int, 0400);
	65
	66	MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
	67	int nouveau_uscript_lvds = -1;
	68	module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
	69
	70	MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
	71	int nouveau_uscript_tmds = -1;
	72	module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
	73
a1470890 BS	74	MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
	75	int nouveau_ignorelid = 0;
	76	module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
	77
81e2d422	78	MODULE_PARM_DESC(noaccel, "Disable all acceleration");
a32ed69d MK	79	int nouveau_noaccel = 0;
	80	module_param_named(noaccel, nouveau_noaccel, int, 0400);
	81
81e2d422	82	MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
a32ed69d MK	83	int nouveau_nofbaccel = 0;
	84	module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
	85
da647d5b BS	86	MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
	87	int nouveau_override_conntype = 0;
	88	module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
	89
f4053509 BS	90	MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
	91	int nouveau_tv_disable = 0;
	92	module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
	93
6ee73861 BS	94	MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
	95	"\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
	96	"\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
	97	"\t\tDefault: PAL\n"
	98	"\t\tNOTE Ignored for cards with external TV encoders.");
	99	char *nouveau_tv_norm;
	100	module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
	101
	102	MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
	103	"\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
	104	"\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
	105	"\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
	106	int nouveau_reg_debug;
	107	module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
	108
	109	int nouveau_fbpercrtc;
	110	#if 0
	111	module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
	112	#endif
	113
	114	static struct pci_device_id pciidlist[] = {
	115	{
	116	PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
	117	.class = PCI_BASE_CLASS_DISPLAY << 16,
	118	.class_mask = 0xff << 16,
	119	},
	120	{
	121	PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
	122	.class = PCI_BASE_CLASS_DISPLAY << 16,
	123	.class_mask = 0xff << 16,
	124	},
	125	{}
	126	};
	127
	128	MODULE_DEVICE_TABLE(pci, pciidlist);
	129
	130	static struct drm_driver driver;
	131
	132	static int __devinit
	133	nouveau_pci_probe(struct pci_dev pdev, const struct pci_device_id ent)
	134	{
	135	return drm_get_dev(pdev, ent, &driver);
	136	}
	137
	138	static void
	139	nouveau_pci_remove(struct pci_dev *pdev)
	140	{
	141	struct drm_device *dev = pci_get_drvdata(pdev);
	142
	143	drm_put_dev(dev);
	144	}
	145
6a9ee8af	146	int
6ee73861 BS	147	nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
	148	{
	149	struct drm_device *dev = pci_get_drvdata(pdev);
	150	struct drm_nouveau_private *dev_priv = dev->dev_private;
	151	struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
	152	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
	153	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
	154	struct nouveau_channel *chan;
	155	struct drm_crtc *crtc;
	156	uint32_t fbdev_flags;
	157	int ret, i;
	158
	159	if (!drm_core_check_feature(dev, DRIVER_MODESET))
	160	return -ENODEV;
	161
	162	if (pm_state.event == PM_EVENT_PRETHAW)
	163	return 0;
	164
81441570	165	NV_INFO(dev, "Disabling fbcon acceleration...\n");
6ee73861 BS	166	fbdev_flags = dev_priv->fbdev_info->flags;
	167	dev_priv->fbdev_info->flags \|= FBINFO_HWACCEL_DISABLED;
	168
81441570	169	NV_INFO(dev, "Unpinning framebuffer(s)...\n");
6ee73861 BS	170	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	171	struct nouveau_framebuffer *nouveau_fb;
	172
	173	nouveau_fb = nouveau_framebuffer(crtc->fb);
	174	if (!nouveau_fb \|\| !nouveau_fb->nvbo)
	175	continue;
	176
	177	nouveau_bo_unpin(nouveau_fb->nvbo);
	178	}
	179
	180	NV_INFO(dev, "Evicting buffers...\n");
	181	ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
	182
	183	NV_INFO(dev, "Idling channels...\n");
	184	for (i = 0; i < pfifo->channels; i++) {
	185	struct nouveau_fence *fence = NULL;
	186
	187	chan = dev_priv->fifos[i];
	188	if (!chan \|\| (dev_priv->card_type >= NV_50 &&
	189	chan == dev_priv->fifos[0]))
	190	continue;
	191
	192	ret = nouveau_fence_new(chan, &fence, true);
	193	if (ret == 0) {
	194	ret = nouveau_fence_wait(fence, NULL, false, false);
	195	nouveau_fence_unref((void *)&fence);
	196	}
	197
	198	if (ret) {
	199	NV_ERROR(dev, "Failed to idle channel %d for suspend\n",
	200	chan->id);
	201	}
	202	}
	203
	204	pgraph->fifo_access(dev, false);
	205	nouveau_wait_for_idle(dev);
	206	pfifo->reassign(dev, false);
	207	pfifo->disable(dev);
	208	pfifo->unload_context(dev);
	209	pgraph->unload_context(dev);
	210
	211	NV_INFO(dev, "Suspending GPU objects...\n");
	212	ret = nouveau_gpuobj_suspend(dev);
	213	if (ret) {
	214	NV_ERROR(dev, "... failed: %d\n", ret);
	215	goto out_abort;
	216	}
	217
	218	ret = pinstmem->suspend(dev);
	219	if (ret) {
	220	NV_ERROR(dev, "... failed: %d\n", ret);
	221	nouveau_gpuobj_suspend_cleanup(dev);
	222	goto out_abort;
	223	}
	224
	225	NV_INFO(dev, "And we're gone!\n");
	226	pci_save_state(pdev);
	227	if (pm_state.event == PM_EVENT_SUSPEND) {
	228	pci_disable_device(pdev);
	229	pci_set_power_state(pdev, PCI_D3hot);
	230	}
	231
	232	acquire_console_sem();
	233	fb_set_suspend(dev_priv->fbdev_info, 1);
234	release_console_sem();
235	dev_priv->fbdev_info->flags = fbdev_flags;
236	return 0;
237
238	out_abort:
239	NV_INFO(dev, "Re-enabling acceleration..\n");
240	pfifo->enable(dev);
241	pfifo->reassign(dev, true);
242	pgraph->fifo_access(dev, true);
243	return ret;
244	}
245
6a9ee8af	246	int
6ee73861 BS	247	nouveau_pci_resume(struct pci_dev *pdev)
	248	{
	249	struct drm_device *dev = pci_get_drvdata(pdev);
	250	struct drm_nouveau_private *dev_priv = dev->dev_private;
	251	struct nouveau_engine *engine = &dev_priv->engine;
	252	struct drm_crtc *crtc;
	253	uint32_t fbdev_flags;
	254	int ret, i;
	255
	256	if (!drm_core_check_feature(dev, DRIVER_MODESET))
	257	return -ENODEV;
	258
	259	fbdev_flags = dev_priv->fbdev_info->flags;
	260	dev_priv->fbdev_info->flags \|= FBINFO_HWACCEL_DISABLED;
	261
	262	NV_INFO(dev, "We're back, enabling device...\n");
	263	pci_set_power_state(pdev, PCI_D0);
	264	pci_restore_state(pdev);
	265	if (pci_enable_device(pdev))
	266	return -1;
	267	pci_set_master(dev->pdev);
	268
	269	NV_INFO(dev, "POSTing device...\n");
	270	ret = nouveau_run_vbios_init(dev);
	271	if (ret)
	272	return ret;
	273
	274	if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
	275	ret = nouveau_mem_init_agp(dev);
	276	if (ret) {
	277	NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
	278	return ret;
	279	}
	280	}
	281
	282	NV_INFO(dev, "Reinitialising engines...\n");
	283	engine->instmem.resume(dev);
	284	engine->mc.init(dev);
	285	engine->timer.init(dev);
	286	engine->fb.init(dev);
	287	engine->graph.init(dev);
	288	engine->fifo.init(dev);
	289
	290	NV_INFO(dev, "Restoring GPU objects...\n");
	291	nouveau_gpuobj_resume(dev);
	292
	293	nouveau_irq_postinstall(dev);
	294
	295	/* Re-write SKIPS, they'll have been lost over the suspend */
	296	if (nouveau_vram_pushbuf) {
	297	struct nouveau_channel *chan;
	298	int j;
	299
	300	for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
	301	chan = dev_priv->fifos[i];
3c8868d3	302	if (!chan \|\| !chan->pushbuf_bo)
6ee73861 BS	303	continue;
	304
	305	for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
	306	nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
	307	}
	308	}
	309
	310	NV_INFO(dev, "Restoring mode...\n");
	311	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	312	struct nouveau_framebuffer *nouveau_fb;
	313
	314	nouveau_fb = nouveau_framebuffer(crtc->fb);
	315	if (!nouveau_fb \|\| !nouveau_fb->nvbo)
	316	continue;
	317
	318	nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
	319	}
	320
	321	if (dev_priv->card_type < NV_50) {
	322	nv04_display_restore(dev);
	323	NVLockVgaCrtcs(dev, false);
	324	} else
	325	nv50_display_init(dev);
	326
	327	/* Force CLUT to get re-loaded during modeset */
	328	list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
	329	struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
	330
	331	nv_crtc->lut.depth = 0;
	332	}
	333
	334	acquire_console_sem();
	335	fb_set_suspend(dev_priv->fbdev_info, 0);
	336	release_console_sem();
	337
	338	nouveau_fbcon_zfill(dev);
	339
	340	drm_helper_resume_force_mode(dev);
	341	dev_priv->fbdev_info->flags = fbdev_flags;
	342	return 0;
	343	}
	344
	345	static struct drm_driver driver = {
	346	.driver_features =
	347	DRIVER_USE_AGP \| DRIVER_PCI_DMA \| DRIVER_SG \|
	348	DRIVER_HAVE_IRQ \| DRIVER_IRQ_SHARED \| DRIVER_GEM,
	349	.load = nouveau_load,
	350	.firstopen = nouveau_firstopen,
	351	.lastclose = nouveau_lastclose,
	352	.unload = nouveau_unload,
	353	.preclose = nouveau_preclose,
	354	#if defined(CONFIG_DRM_NOUVEAU_DEBUG)
	355	.debugfs_init = nouveau_debugfs_init,
	356	.debugfs_cleanup = nouveau_debugfs_takedown,
	357	#endif
	358	.irq_preinstall = nouveau_irq_preinstall,
	359	.irq_postinstall = nouveau_irq_postinstall,
	360	.irq_uninstall = nouveau_irq_uninstall,
	361	.irq_handler = nouveau_irq_handler,
	362	.reclaim_buffers = drm_core_reclaim_buffers,
	363	.get_map_ofs = drm_core_get_map_ofs,
	364	.get_reg_ofs = drm_core_get_reg_ofs,
	365	.ioctls = nouveau_ioctls,
	366	.fops = {
367	.owner = THIS_MODULE,
368	.open = drm_open,
369	.release = drm_release,
ed8b6704	370	.unlocked_ioctl = drm_ioctl,
6ee73861 BS	371	.mmap = nouveau_ttm_mmap,
	372	.poll = drm_poll,
	373	.fasync = drm_fasync,
	374	#if defined(CONFIG_COMPAT)
	375	.compat_ioctl = nouveau_compat_ioctl,
	376	#endif
	377	},
	378	.pci_driver = {
	379	.name = DRIVER_NAME,
	380	.id_table = pciidlist,
	381	.probe = nouveau_pci_probe,
	382	.remove = nouveau_pci_remove,
	383	.suspend = nouveau_pci_suspend,
	384	.resume = nouveau_pci_resume
	385	},
	386
	387	.gem_init_object = nouveau_gem_object_new,
	388	.gem_free_object = nouveau_gem_object_del,
	389
	390	.name = DRIVER_NAME,
	391	.desc = DRIVER_DESC,
	392	#ifdef GIT_REVISION
	393	.date = GIT_REVISION,
	394	#else
	395	.date = DRIVER_DATE,
	396	#endif
	397	.major = DRIVER_MAJOR,
	398	.minor = DRIVER_MINOR,
	399	.patchlevel = DRIVER_PATCHLEVEL,
	400	};
	401
	402	static int __init nouveau_init(void)
	403	{
	404	driver.num_ioctls = nouveau_max_ioctl;
	405
	406	if (nouveau_modeset == -1) {
	407	#ifdef CONFIG_VGA_CONSOLE
	408	if (vgacon_text_force())
	409	nouveau_modeset = 0;
	410	else
	411	#endif
	412	nouveau_modeset = 1;
	413	}
	414
6a9ee8af	415	if (nouveau_modeset == 1) {
6ee73861	416	driver.driver_features \|= DRIVER_MODESET;
6a9ee8af DA	417	nouveau_register_dsm_handler();
6a9ee8af DA	418	}
6ee73861 BS	419
	420	return drm_init(&driver);
	421	}
	422
	423	static void __exit nouveau_exit(void)
	424	{
	425	drm_exit(&driver);
6a9ee8af	426	nouveau_unregister_dsm_handler();
6ee73861 BS	427	}
	428
	429	module_init(nouveau_init);
	430	module_exit(nouveau_exit);
	431
	432	MODULE_AUTHOR(DRIVER_AUTHOR);
	433	MODULE_DESCRIPTION(DRIVER_DESC);
	434	MODULE_LICENSE("GPL and additional rights");