Commit | Line | Data |
---|---|---|
94580299 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
77145f1c | 25 | #include <linux/console.h> |
c5fd936e | 26 | #include <linux/delay.h> |
94580299 BS |
27 | #include <linux/module.h> |
28 | #include <linux/pci.h> | |
5addcf0a DA |
29 | #include <linux/pm_runtime.h> |
30 | #include <linux/vga_switcheroo.h> | |
fdb751ef | 31 | |
5addcf0a DA |
32 | #include "drmP.h" |
33 | #include "drm_crtc_helper.h" | |
fdb751ef | 34 | |
ebb945a9 | 35 | #include <core/gpuobj.h> |
c33e05a1 | 36 | #include <core/option.h> |
7974dd1b BS |
37 | #include <core/pci.h> |
38 | #include <core/tegra.h> | |
94580299 | 39 | |
94580299 | 40 | #include "nouveau_drm.h" |
ebb945a9 | 41 | #include "nouveau_dma.h" |
77145f1c BS |
42 | #include "nouveau_ttm.h" |
43 | #include "nouveau_gem.h" | |
77145f1c | 44 | #include "nouveau_vga.h" |
26fdd78c | 45 | #include "nouveau_sysfs.h" |
b9ed919f | 46 | #include "nouveau_hwmon.h" |
77145f1c BS |
47 | #include "nouveau_acpi.h" |
48 | #include "nouveau_bios.h" | |
49 | #include "nouveau_ioctl.h" | |
ebb945a9 BS |
50 | #include "nouveau_abi16.h" |
51 | #include "nouveau_fbcon.h" | |
52 | #include "nouveau_fence.h" | |
33b903e8 | 53 | #include "nouveau_debugfs.h" |
27111a23 | 54 | #include "nouveau_usif.h" |
703fa264 | 55 | #include "nouveau_connector.h" |
055a65d5 | 56 | #include "nouveau_platform.h" |
ebb945a9 | 57 | |
94580299 BS |
58 | MODULE_PARM_DESC(config, "option string to pass to driver core"); |
59 | static char *nouveau_config; | |
60 | module_param_named(config, nouveau_config, charp, 0400); | |
61 | ||
62 | MODULE_PARM_DESC(debug, "debug string to pass to driver core"); | |
63 | static char *nouveau_debug; | |
64 | module_param_named(debug, nouveau_debug, charp, 0400); | |
65 | ||
ebb945a9 BS |
66 | MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); |
67 | static int nouveau_noaccel = 0; | |
68 | module_param_named(noaccel, nouveau_noaccel, int, 0400); | |
69 | ||
9430738d BS |
70 | MODULE_PARM_DESC(modeset, "enable driver (default: auto, " |
71 | "0 = disabled, 1 = enabled, 2 = headless)"); | |
72 | int nouveau_modeset = -1; | |
77145f1c BS |
73 | module_param_named(modeset, nouveau_modeset, int, 0400); |
74 | ||
5addcf0a DA |
75 | MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); |
76 | int nouveau_runtime_pm = -1; | |
77 | module_param_named(runpm, nouveau_runtime_pm, int, 0400); | |
78 | ||
915b4d11 DH |
79 | static struct drm_driver driver_stub; |
80 | static struct drm_driver driver_pci; | |
81 | static struct drm_driver driver_platform; | |
77145f1c | 82 | |
94580299 | 83 | static u64 |
420b9469 | 84 | nouveau_pci_name(struct pci_dev *pdev) |
94580299 BS |
85 | { |
86 | u64 name = (u64)pci_domain_nr(pdev->bus) << 32; | |
87 | name |= pdev->bus->number << 16; | |
88 | name |= PCI_SLOT(pdev->devfn) << 8; | |
89 | return name | PCI_FUNC(pdev->devfn); | |
90 | } | |
91 | ||
420b9469 AC |
92 | static u64 |
93 | nouveau_platform_name(struct platform_device *platformdev) | |
94 | { | |
95 | return platformdev->id; | |
96 | } | |
97 | ||
98 | static u64 | |
99 | nouveau_name(struct drm_device *dev) | |
100 | { | |
101 | if (dev->pdev) | |
102 | return nouveau_pci_name(dev->pdev); | |
103 | else | |
104 | return nouveau_platform_name(dev->platformdev); | |
105 | } | |
106 | ||
94580299 | 107 | static int |
9ad97ede | 108 | nouveau_cli_create(struct drm_device *dev, const char *sname, |
fa6df8c1 | 109 | int size, void **pcli) |
94580299 | 110 | { |
0ad72863 | 111 | struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL); |
9ad97ede | 112 | int ret; |
0ad72863 | 113 | if (cli) { |
9ad97ede BS |
114 | snprintf(cli->name, sizeof(cli->name), "%s", sname); |
115 | cli->dev = dev; | |
116 | ||
a01ca78c | 117 | ret = nvif_client_init(NULL, cli->name, nouveau_name(dev), |
9ad97ede BS |
118 | nouveau_config, nouveau_debug, |
119 | &cli->base); | |
27111a23 | 120 | if (ret == 0) { |
0ad72863 | 121 | mutex_init(&cli->mutex); |
27111a23 BS |
122 | usif_client_init(cli); |
123 | } | |
94580299 | 124 | return ret; |
dd5700ea | 125 | } |
0ad72863 | 126 | return -ENOMEM; |
94580299 BS |
127 | } |
128 | ||
129 | static void | |
130 | nouveau_cli_destroy(struct nouveau_cli *cli) | |
131 | { | |
be83cd4e | 132 | nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL); |
0ad72863 | 133 | nvif_client_fini(&cli->base); |
27111a23 | 134 | usif_client_fini(cli); |
f5654d95 | 135 | kfree(cli); |
94580299 BS |
136 | } |
137 | ||
ebb945a9 BS |
138 | static void |
139 | nouveau_accel_fini(struct nouveau_drm *drm) | |
140 | { | |
fbd58ebd | 141 | nouveau_channel_idle(drm->channel); |
0ad72863 | 142 | nvif_object_fini(&drm->ntfy); |
f027f491 | 143 | nvkm_gpuobj_del(&drm->notify); |
fbd58ebd | 144 | nvif_notify_fini(&drm->flip); |
0ad72863 | 145 | nvif_object_fini(&drm->nvsw); |
fbd58ebd BS |
146 | nouveau_channel_del(&drm->channel); |
147 | ||
148 | nouveau_channel_idle(drm->cechan); | |
0ad72863 | 149 | nvif_object_fini(&drm->ttm.copy); |
fbd58ebd BS |
150 | nouveau_channel_del(&drm->cechan); |
151 | ||
ebb945a9 BS |
152 | if (drm->fence) |
153 | nouveau_fence(drm)->dtor(drm); | |
154 | } | |
155 | ||
156 | static void | |
157 | nouveau_accel_init(struct nouveau_drm *drm) | |
158 | { | |
967e7bde | 159 | struct nvif_device *device = &drm->device; |
41a63406 | 160 | struct nvif_sclass *sclass; |
49981046 | 161 | u32 arg0, arg1; |
41a63406 | 162 | int ret, i, n; |
ebb945a9 | 163 | |
967e7bde | 164 | if (nouveau_noaccel) |
ebb945a9 BS |
165 | return; |
166 | ||
167 | /* initialise synchronisation routines */ | |
967e7bde BS |
168 | /*XXX: this is crap, but the fence/channel stuff is a little |
169 | * backwards in some places. this will be fixed. | |
170 | */ | |
41a63406 | 171 | ret = n = nvif_object_sclass_get(&device->object, &sclass); |
967e7bde BS |
172 | if (ret < 0) |
173 | return; | |
174 | ||
41a63406 BS |
175 | for (ret = -ENOSYS, i = 0; i < n; i++) { |
176 | switch (sclass[i].oclass) { | |
bbf8906b | 177 | case NV03_CHANNEL_DMA: |
967e7bde BS |
178 | ret = nv04_fence_create(drm); |
179 | break; | |
bbf8906b | 180 | case NV10_CHANNEL_DMA: |
967e7bde BS |
181 | ret = nv10_fence_create(drm); |
182 | break; | |
bbf8906b BS |
183 | case NV17_CHANNEL_DMA: |
184 | case NV40_CHANNEL_DMA: | |
967e7bde BS |
185 | ret = nv17_fence_create(drm); |
186 | break; | |
bbf8906b | 187 | case NV50_CHANNEL_GPFIFO: |
967e7bde BS |
188 | ret = nv50_fence_create(drm); |
189 | break; | |
bbf8906b | 190 | case G82_CHANNEL_GPFIFO: |
967e7bde BS |
191 | ret = nv84_fence_create(drm); |
192 | break; | |
bbf8906b BS |
193 | case FERMI_CHANNEL_GPFIFO: |
194 | case KEPLER_CHANNEL_GPFIFO_A: | |
a1020afe | 195 | case MAXWELL_CHANNEL_GPFIFO_A: |
967e7bde BS |
196 | ret = nvc0_fence_create(drm); |
197 | break; | |
198 | default: | |
199 | break; | |
200 | } | |
201 | } | |
202 | ||
41a63406 | 203 | nvif_object_sclass_put(&sclass); |
ebb945a9 BS |
204 | if (ret) { |
205 | NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); | |
206 | nouveau_accel_fini(drm); | |
207 | return; | |
208 | } | |
209 | ||
967e7bde | 210 | if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { |
0ad72863 | 211 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1, |
bbf8906b BS |
212 | KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0| |
213 | KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1, | |
214 | 0, &drm->cechan); | |
49981046 BS |
215 | if (ret) |
216 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
217 | ||
bbf8906b | 218 | arg0 = KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR; |
49469800 | 219 | arg1 = 1; |
00fc6f6f | 220 | } else |
967e7bde BS |
221 | if (device->info.chipset >= 0xa3 && |
222 | device->info.chipset != 0xaa && | |
223 | device->info.chipset != 0xac) { | |
0ad72863 BS |
224 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1, |
225 | NvDmaFB, NvDmaTT, &drm->cechan); | |
00fc6f6f BS |
226 | if (ret) |
227 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
228 | ||
229 | arg0 = NvDmaFB; | |
230 | arg1 = NvDmaTT; | |
49981046 BS |
231 | } else { |
232 | arg0 = NvDmaFB; | |
233 | arg1 = NvDmaTT; | |
234 | } | |
235 | ||
0ad72863 BS |
236 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN, arg0, arg1, |
237 | &drm->channel); | |
ebb945a9 BS |
238 | if (ret) { |
239 | NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); | |
240 | nouveau_accel_fini(drm); | |
241 | return; | |
242 | } | |
243 | ||
a01ca78c | 244 | ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW, |
0ad72863 | 245 | nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw); |
69a6146d | 246 | if (ret == 0) { |
69a6146d BS |
247 | ret = RING_SPACE(drm->channel, 2); |
248 | if (ret == 0) { | |
967e7bde | 249 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
69a6146d BS |
250 | BEGIN_NV04(drm->channel, NvSubSw, 0, 1); |
251 | OUT_RING (drm->channel, NVDRM_NVSW); | |
252 | } else | |
967e7bde | 253 | if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) { |
69a6146d BS |
254 | BEGIN_NVC0(drm->channel, FermiSw, 0, 1); |
255 | OUT_RING (drm->channel, 0x001f0000); | |
256 | } | |
257 | } | |
898a2b32 BS |
258 | |
259 | ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete, | |
260 | false, NVSW_NTFY_UEVENT, NULL, 0, 0, | |
261 | &drm->flip); | |
262 | if (ret == 0) | |
263 | ret = nvif_notify_get(&drm->flip); | |
264 | if (ret) { | |
265 | nouveau_accel_fini(drm); | |
266 | return; | |
267 | } | |
69a6146d BS |
268 | } |
269 | ||
270 | if (ret) { | |
271 | NV_ERROR(drm, "failed to allocate software object, %d\n", ret); | |
272 | nouveau_accel_fini(drm); | |
273 | return; | |
274 | } | |
275 | ||
967e7bde | 276 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
f027f491 BS |
277 | ret = nvkm_gpuobj_new(nvxx_device(&drm->device), 32, 0, false, |
278 | NULL, &drm->notify); | |
ebb945a9 BS |
279 | if (ret) { |
280 | NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); | |
281 | nouveau_accel_fini(drm); | |
282 | return; | |
283 | } | |
284 | ||
a01ca78c | 285 | ret = nvif_object_init(&drm->channel->user, NvNotify0, |
4acfd707 BS |
286 | NV_DMA_IN_MEMORY, |
287 | &(struct nv_dma_v0) { | |
288 | .target = NV_DMA_V0_TARGET_VRAM, | |
289 | .access = NV_DMA_V0_ACCESS_RDWR, | |
ebb945a9 BS |
290 | .start = drm->notify->addr, |
291 | .limit = drm->notify->addr + 31 | |
4acfd707 | 292 | }, sizeof(struct nv_dma_v0), |
0ad72863 | 293 | &drm->ntfy); |
ebb945a9 BS |
294 | if (ret) { |
295 | nouveau_accel_fini(drm); | |
296 | return; | |
297 | } | |
298 | } | |
299 | ||
300 | ||
49981046 | 301 | nouveau_bo_move_init(drm); |
ebb945a9 BS |
302 | } |
303 | ||
56550d94 GKH |
304 | static int nouveau_drm_probe(struct pci_dev *pdev, |
305 | const struct pci_device_id *pent) | |
94580299 | 306 | { |
be83cd4e | 307 | struct nvkm_device *device; |
ebb945a9 BS |
308 | struct apertures_struct *aper; |
309 | bool boot = false; | |
94580299 BS |
310 | int ret; |
311 | ||
ebb945a9 BS |
312 | /* remove conflicting drivers (vesafb, efifb etc) */ |
313 | aper = alloc_apertures(3); | |
314 | if (!aper) | |
315 | return -ENOMEM; | |
316 | ||
317 | aper->ranges[0].base = pci_resource_start(pdev, 1); | |
318 | aper->ranges[0].size = pci_resource_len(pdev, 1); | |
319 | aper->count = 1; | |
320 | ||
321 | if (pci_resource_len(pdev, 2)) { | |
322 | aper->ranges[aper->count].base = pci_resource_start(pdev, 2); | |
323 | aper->ranges[aper->count].size = pci_resource_len(pdev, 2); | |
324 | aper->count++; | |
325 | } | |
326 | ||
327 | if (pci_resource_len(pdev, 3)) { | |
328 | aper->ranges[aper->count].base = pci_resource_start(pdev, 3); | |
329 | aper->ranges[aper->count].size = pci_resource_len(pdev, 3); | |
330 | aper->count++; | |
331 | } | |
332 | ||
333 | #ifdef CONFIG_X86 | |
334 | boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; | |
335 | #endif | |
771fa0e4 BS |
336 | if (nouveau_modeset != 2) |
337 | remove_conflicting_framebuffers(aper, "nouveaufb", boot); | |
83ef7777 | 338 | kfree(aper); |
ebb945a9 | 339 | |
7974dd1b BS |
340 | ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, |
341 | true, true, ~0ULL, &device); | |
94580299 BS |
342 | if (ret) |
343 | return ret; | |
344 | ||
345 | pci_set_master(pdev); | |
346 | ||
915b4d11 | 347 | ret = drm_get_pci_dev(pdev, pent, &driver_pci); |
94580299 | 348 | if (ret) { |
e781dc8f | 349 | nvkm_device_del(&device); |
94580299 BS |
350 | return ret; |
351 | } | |
352 | ||
353 | return 0; | |
354 | } | |
355 | ||
5addcf0a DA |
356 | #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 |
357 | ||
358 | static void | |
46941b0f | 359 | nouveau_get_hdmi_dev(struct nouveau_drm *drm) |
5addcf0a | 360 | { |
46941b0f | 361 | struct pci_dev *pdev = drm->dev->pdev; |
5addcf0a | 362 | |
420b9469 | 363 | if (!pdev) { |
40189b0c | 364 | DRM_INFO("not a PCI device; no HDMI\n"); |
420b9469 AC |
365 | drm->hdmi_device = NULL; |
366 | return; | |
367 | } | |
368 | ||
5addcf0a DA |
369 | /* subfunction one is a hdmi audio device? */ |
370 | drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number, | |
371 | PCI_DEVFN(PCI_SLOT(pdev->devfn), 1)); | |
372 | ||
373 | if (!drm->hdmi_device) { | |
46941b0f | 374 | NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1); |
5addcf0a DA |
375 | return; |
376 | } | |
377 | ||
378 | if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) { | |
46941b0f | 379 | NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class); |
5addcf0a DA |
380 | pci_dev_put(drm->hdmi_device); |
381 | drm->hdmi_device = NULL; | |
382 | return; | |
383 | } | |
384 | } | |
385 | ||
5b8a43ae | 386 | static int |
94580299 BS |
387 | nouveau_drm_load(struct drm_device *dev, unsigned long flags) |
388 | { | |
94580299 BS |
389 | struct nouveau_drm *drm; |
390 | int ret; | |
391 | ||
9ad97ede | 392 | ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm); |
94580299 BS |
393 | if (ret) |
394 | return ret; | |
395 | ||
77145f1c BS |
396 | dev->dev_private = drm; |
397 | drm->dev = dev; | |
989aa5b7 | 398 | nvxx_client(&drm->client.base)->debug = |
be83cd4e | 399 | nvkm_dbgopt(nouveau_debug, "DRM"); |
77145f1c | 400 | |
94580299 | 401 | INIT_LIST_HEAD(&drm->clients); |
ebb945a9 | 402 | spin_lock_init(&drm->tile.lock); |
94580299 | 403 | |
46941b0f | 404 | nouveau_get_hdmi_dev(drm); |
5addcf0a | 405 | |
a01ca78c BS |
406 | ret = nvif_device_init(&drm->client.base.object, |
407 | NVDRM_DEVICE, NV_DEVICE, | |
586491e6 | 408 | &(struct nv_device_v0) { |
94580299 | 409 | .device = ~0, |
586491e6 | 410 | }, sizeof(struct nv_device_v0), |
0ad72863 | 411 | &drm->device); |
94580299 BS |
412 | if (ret) |
413 | goto fail_device; | |
414 | ||
7d3428cd IM |
415 | dev->irq_enabled = true; |
416 | ||
77145f1c BS |
417 | /* workaround an odd issue on nvc1 by disabling the device's |
418 | * nosnoop capability. hopefully won't cause issues until a | |
419 | * better fix is found - assuming there is one... | |
420 | */ | |
967e7bde | 421 | if (drm->device.info.chipset == 0xc1) |
a01ca78c | 422 | nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000); |
ebb945a9 | 423 | |
77145f1c | 424 | nouveau_vga_init(drm); |
cb75d97e | 425 | |
967e7bde | 426 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
be83cd4e | 427 | ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40), |
1de68568 | 428 | 0x1000, NULL, &drm->client.vm); |
ebb945a9 BS |
429 | if (ret) |
430 | goto fail_device; | |
3ee6f5b5 | 431 | |
989aa5b7 | 432 | nvxx_client(&drm->client.base)->vm = drm->client.vm; |
ebb945a9 BS |
433 | } |
434 | ||
435 | ret = nouveau_ttm_init(drm); | |
94580299 | 436 | if (ret) |
77145f1c BS |
437 | goto fail_ttm; |
438 | ||
439 | ret = nouveau_bios_init(dev); | |
440 | if (ret) | |
441 | goto fail_bios; | |
442 | ||
77145f1c | 443 | ret = nouveau_display_create(dev); |
ebb945a9 | 444 | if (ret) |
77145f1c BS |
445 | goto fail_dispctor; |
446 | ||
447 | if (dev->mode_config.num_crtc) { | |
448 | ret = nouveau_display_init(dev); | |
449 | if (ret) | |
450 | goto fail_dispinit; | |
451 | } | |
452 | ||
26fdd78c | 453 | nouveau_sysfs_init(dev); |
b9ed919f | 454 | nouveau_hwmon_init(dev); |
ebb945a9 BS |
455 | nouveau_accel_init(drm); |
456 | nouveau_fbcon_init(dev); | |
5addcf0a DA |
457 | |
458 | if (nouveau_runtime_pm != 0) { | |
459 | pm_runtime_use_autosuspend(dev->dev); | |
460 | pm_runtime_set_autosuspend_delay(dev->dev, 5000); | |
461 | pm_runtime_set_active(dev->dev); | |
462 | pm_runtime_allow(dev->dev); | |
463 | pm_runtime_mark_last_busy(dev->dev); | |
464 | pm_runtime_put(dev->dev); | |
465 | } | |
94580299 BS |
466 | return 0; |
467 | ||
77145f1c BS |
468 | fail_dispinit: |
469 | nouveau_display_destroy(dev); | |
470 | fail_dispctor: | |
77145f1c BS |
471 | nouveau_bios_takedown(dev); |
472 | fail_bios: | |
ebb945a9 | 473 | nouveau_ttm_fini(drm); |
77145f1c | 474 | fail_ttm: |
77145f1c | 475 | nouveau_vga_fini(drm); |
94580299 | 476 | fail_device: |
0ad72863 | 477 | nvif_device_fini(&drm->device); |
94580299 BS |
478 | nouveau_cli_destroy(&drm->client); |
479 | return ret; | |
480 | } | |
481 | ||
5b8a43ae | 482 | static int |
94580299 BS |
483 | nouveau_drm_unload(struct drm_device *dev) |
484 | { | |
77145f1c | 485 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 | 486 | |
5addcf0a | 487 | pm_runtime_get_sync(dev->dev); |
ebb945a9 BS |
488 | nouveau_fbcon_fini(dev); |
489 | nouveau_accel_fini(drm); | |
b9ed919f | 490 | nouveau_hwmon_fini(dev); |
26fdd78c | 491 | nouveau_sysfs_fini(dev); |
77145f1c | 492 | |
9430738d BS |
493 | if (dev->mode_config.num_crtc) |
494 | nouveau_display_fini(dev); | |
77145f1c BS |
495 | nouveau_display_destroy(dev); |
496 | ||
77145f1c | 497 | nouveau_bios_takedown(dev); |
94580299 | 498 | |
ebb945a9 | 499 | nouveau_ttm_fini(drm); |
77145f1c | 500 | nouveau_vga_fini(drm); |
cb75d97e | 501 | |
0ad72863 | 502 | nvif_device_fini(&drm->device); |
5addcf0a DA |
503 | if (drm->hdmi_device) |
504 | pci_dev_put(drm->hdmi_device); | |
94580299 BS |
505 | nouveau_cli_destroy(&drm->client); |
506 | return 0; | |
507 | } | |
508 | ||
8ba9ff11 AC |
509 | void |
510 | nouveau_drm_device_remove(struct drm_device *dev) | |
94580299 | 511 | { |
77145f1c | 512 | struct nouveau_drm *drm = nouveau_drm(dev); |
be83cd4e | 513 | struct nvkm_client *client; |
76ecea5b | 514 | struct nvkm_device *device; |
77145f1c | 515 | |
7d3428cd | 516 | dev->irq_enabled = false; |
989aa5b7 | 517 | client = nvxx_client(&drm->client.base); |
4e7e62d6 | 518 | device = nvkm_device_find(client->device); |
77145f1c BS |
519 | drm_put_dev(dev); |
520 | ||
e781dc8f | 521 | nvkm_device_del(&device); |
94580299 | 522 | } |
8ba9ff11 AC |
523 | |
524 | static void | |
525 | nouveau_drm_remove(struct pci_dev *pdev) | |
526 | { | |
527 | struct drm_device *dev = pci_get_drvdata(pdev); | |
528 | ||
529 | nouveau_drm_device_remove(dev); | |
530 | } | |
94580299 | 531 | |
cd897837 | 532 | static int |
05c63c2f | 533 | nouveau_do_suspend(struct drm_device *dev, bool runtime) |
94580299 | 534 | { |
77145f1c | 535 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 BS |
536 | struct nouveau_cli *cli; |
537 | int ret; | |
538 | ||
6fbb702e BS |
539 | if (dev->mode_config.num_crtc) { |
540 | NV_INFO(drm, "suspending console...\n"); | |
541 | nouveau_fbcon_set_suspend(dev, 1); | |
c52f4fa6 | 542 | NV_INFO(drm, "suspending display...\n"); |
6fbb702e | 543 | ret = nouveau_display_suspend(dev, runtime); |
9430738d BS |
544 | if (ret) |
545 | return ret; | |
546 | } | |
94580299 | 547 | |
c52f4fa6 | 548 | NV_INFO(drm, "evicting buffers...\n"); |
ebb945a9 BS |
549 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); |
550 | ||
c52f4fa6 | 551 | NV_INFO(drm, "waiting for kernel channels to go idle...\n"); |
81dff21b BS |
552 | if (drm->cechan) { |
553 | ret = nouveau_channel_idle(drm->cechan); | |
554 | if (ret) | |
f3980dc5 | 555 | goto fail_display; |
81dff21b BS |
556 | } |
557 | ||
558 | if (drm->channel) { | |
559 | ret = nouveau_channel_idle(drm->channel); | |
560 | if (ret) | |
f3980dc5 | 561 | goto fail_display; |
81dff21b BS |
562 | } |
563 | ||
c52f4fa6 | 564 | NV_INFO(drm, "suspending client object trees...\n"); |
ebb945a9 | 565 | if (drm->fence && nouveau_fence(drm)->suspend) { |
f3980dc5 IM |
566 | if (!nouveau_fence(drm)->suspend(drm)) { |
567 | ret = -ENOMEM; | |
568 | goto fail_display; | |
569 | } | |
ebb945a9 BS |
570 | } |
571 | ||
94580299 | 572 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 573 | ret = nvif_client_suspend(&cli->base); |
94580299 BS |
574 | if (ret) |
575 | goto fail_client; | |
576 | } | |
577 | ||
c52f4fa6 | 578 | NV_INFO(drm, "suspending kernel object tree...\n"); |
0ad72863 | 579 | ret = nvif_client_suspend(&drm->client.base); |
94580299 BS |
580 | if (ret) |
581 | goto fail_client; | |
582 | ||
94580299 BS |
583 | return 0; |
584 | ||
585 | fail_client: | |
586 | list_for_each_entry_continue_reverse(cli, &drm->clients, head) { | |
0ad72863 | 587 | nvif_client_resume(&cli->base); |
94580299 BS |
588 | } |
589 | ||
f3980dc5 IM |
590 | if (drm->fence && nouveau_fence(drm)->resume) |
591 | nouveau_fence(drm)->resume(drm); | |
592 | ||
593 | fail_display: | |
9430738d | 594 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 595 | NV_INFO(drm, "resuming display...\n"); |
6fbb702e | 596 | nouveau_display_resume(dev, runtime); |
9430738d | 597 | } |
94580299 BS |
598 | return ret; |
599 | } | |
600 | ||
cd897837 | 601 | static int |
6fbb702e | 602 | nouveau_do_resume(struct drm_device *dev, bool runtime) |
2d8b9ccb DA |
603 | { |
604 | struct nouveau_drm *drm = nouveau_drm(dev); | |
605 | struct nouveau_cli *cli; | |
606 | ||
c52f4fa6 | 607 | NV_INFO(drm, "resuming kernel object tree...\n"); |
0ad72863 | 608 | nvif_client_resume(&drm->client.base); |
94580299 | 609 | |
c52f4fa6 | 610 | NV_INFO(drm, "resuming client object trees...\n"); |
81dff21b BS |
611 | if (drm->fence && nouveau_fence(drm)->resume) |
612 | nouveau_fence(drm)->resume(drm); | |
613 | ||
94580299 | 614 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 615 | nvif_client_resume(&cli->base); |
94580299 | 616 | } |
cb75d97e | 617 | |
77145f1c | 618 | nouveau_run_vbios_init(dev); |
77145f1c | 619 | |
9430738d | 620 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 621 | NV_INFO(drm, "resuming display...\n"); |
6fbb702e BS |
622 | nouveau_display_resume(dev, runtime); |
623 | NV_INFO(drm, "resuming console...\n"); | |
624 | nouveau_fbcon_set_suspend(dev, 0); | |
9430738d | 625 | } |
5addcf0a | 626 | |
77145f1c | 627 | return 0; |
94580299 BS |
628 | } |
629 | ||
7bb6d442 BS |
630 | int |
631 | nouveau_pmops_suspend(struct device *dev) | |
632 | { | |
633 | struct pci_dev *pdev = to_pci_dev(dev); | |
634 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
635 | int ret; | |
636 | ||
637 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || | |
638 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
639 | return 0; | |
640 | ||
641 | ret = nouveau_do_suspend(drm_dev, false); | |
642 | if (ret) | |
643 | return ret; | |
644 | ||
645 | pci_save_state(pdev); | |
646 | pci_disable_device(pdev); | |
7bb6d442 | 647 | pci_set_power_state(pdev, PCI_D3hot); |
c5fd936e | 648 | udelay(200); |
7bb6d442 BS |
649 | return 0; |
650 | } | |
651 | ||
652 | int | |
653 | nouveau_pmops_resume(struct device *dev) | |
2d8b9ccb DA |
654 | { |
655 | struct pci_dev *pdev = to_pci_dev(dev); | |
656 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
657 | int ret; | |
658 | ||
5addcf0a DA |
659 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
660 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
2d8b9ccb DA |
661 | return 0; |
662 | ||
663 | pci_set_power_state(pdev, PCI_D0); | |
664 | pci_restore_state(pdev); | |
665 | ret = pci_enable_device(pdev); | |
666 | if (ret) | |
667 | return ret; | |
668 | pci_set_master(pdev); | |
669 | ||
6fbb702e | 670 | return nouveau_do_resume(drm_dev, false); |
2d8b9ccb DA |
671 | } |
672 | ||
7bb6d442 BS |
673 | static int |
674 | nouveau_pmops_freeze(struct device *dev) | |
2d8b9ccb DA |
675 | { |
676 | struct pci_dev *pdev = to_pci_dev(dev); | |
677 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
6fbb702e | 678 | return nouveau_do_suspend(drm_dev, false); |
2d8b9ccb DA |
679 | } |
680 | ||
7bb6d442 BS |
681 | static int |
682 | nouveau_pmops_thaw(struct device *dev) | |
2d8b9ccb DA |
683 | { |
684 | struct pci_dev *pdev = to_pci_dev(dev); | |
685 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
6fbb702e | 686 | return nouveau_do_resume(drm_dev, false); |
2d8b9ccb DA |
687 | } |
688 | ||
7bb6d442 BS |
689 | static int |
690 | nouveau_pmops_runtime_suspend(struct device *dev) | |
691 | { | |
692 | struct pci_dev *pdev = to_pci_dev(dev); | |
693 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
694 | int ret; | |
695 | ||
696 | if (nouveau_runtime_pm == 0) { | |
697 | pm_runtime_forbid(dev); | |
698 | return -EBUSY; | |
699 | } | |
700 | ||
701 | /* are we optimus enabled? */ | |
702 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
703 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
704 | pm_runtime_forbid(dev); | |
705 | return -EBUSY; | |
706 | } | |
707 | ||
7bb6d442 BS |
708 | drm_kms_helper_poll_disable(drm_dev); |
709 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); | |
710 | nouveau_switcheroo_optimus_dsm(); | |
711 | ret = nouveau_do_suspend(drm_dev, true); | |
712 | pci_save_state(pdev); | |
713 | pci_disable_device(pdev); | |
8c863944 | 714 | pci_ignore_hotplug(pdev); |
7bb6d442 BS |
715 | pci_set_power_state(pdev, PCI_D3cold); |
716 | drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; | |
717 | return ret; | |
718 | } | |
719 | ||
720 | static int | |
721 | nouveau_pmops_runtime_resume(struct device *dev) | |
722 | { | |
723 | struct pci_dev *pdev = to_pci_dev(dev); | |
724 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
725 | struct nvif_device *device = &nouveau_drm(drm_dev)->device; | |
726 | int ret; | |
727 | ||
728 | if (nouveau_runtime_pm == 0) | |
729 | return -EINVAL; | |
730 | ||
731 | pci_set_power_state(pdev, PCI_D0); | |
732 | pci_restore_state(pdev); | |
733 | ret = pci_enable_device(pdev); | |
734 | if (ret) | |
735 | return ret; | |
736 | pci_set_master(pdev); | |
737 | ||
738 | ret = nouveau_do_resume(drm_dev, true); | |
739 | drm_kms_helper_poll_enable(drm_dev); | |
740 | /* do magic */ | |
a01ca78c | 741 | nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); |
7bb6d442 BS |
742 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); |
743 | drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; | |
7bb6d442 BS |
744 | return ret; |
745 | } | |
746 | ||
747 | static int | |
748 | nouveau_pmops_runtime_idle(struct device *dev) | |
749 | { | |
750 | struct pci_dev *pdev = to_pci_dev(dev); | |
751 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
752 | struct nouveau_drm *drm = nouveau_drm(drm_dev); | |
753 | struct drm_crtc *crtc; | |
754 | ||
755 | if (nouveau_runtime_pm == 0) { | |
756 | pm_runtime_forbid(dev); | |
757 | return -EBUSY; | |
758 | } | |
759 | ||
760 | /* are we optimus enabled? */ | |
761 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
762 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
763 | pm_runtime_forbid(dev); | |
764 | return -EBUSY; | |
765 | } | |
766 | ||
767 | /* if we have a hdmi audio device - make sure it has a driver loaded */ | |
768 | if (drm->hdmi_device) { | |
769 | if (!drm->hdmi_device->driver) { | |
770 | DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n"); | |
771 | pm_runtime_mark_last_busy(dev); | |
772 | return -EBUSY; | |
773 | } | |
774 | } | |
775 | ||
776 | list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) { | |
777 | if (crtc->enabled) { | |
778 | DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); | |
779 | return -EBUSY; | |
780 | } | |
781 | } | |
782 | pm_runtime_mark_last_busy(dev); | |
783 | pm_runtime_autosuspend(dev); | |
784 | /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ | |
785 | return 1; | |
786 | } | |
2d8b9ccb | 787 | |
5b8a43ae | 788 | static int |
ebb945a9 BS |
789 | nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) |
790 | { | |
ebb945a9 BS |
791 | struct nouveau_drm *drm = nouveau_drm(dev); |
792 | struct nouveau_cli *cli; | |
a2896ced | 793 | char name[32], tmpname[TASK_COMM_LEN]; |
ebb945a9 BS |
794 | int ret; |
795 | ||
5addcf0a DA |
796 | /* need to bring up power immediately if opening device */ |
797 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 798 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
799 | return ret; |
800 | ||
a2896ced MS |
801 | get_task_comm(tmpname, current); |
802 | snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); | |
fa6df8c1 | 803 | |
9ad97ede | 804 | ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli); |
420b9469 | 805 | |
ebb945a9 | 806 | if (ret) |
5addcf0a | 807 | goto out_suspend; |
ebb945a9 | 808 | |
0ad72863 BS |
809 | cli->base.super = false; |
810 | ||
967e7bde | 811 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
be83cd4e | 812 | ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40), |
1de68568 | 813 | 0x1000, NULL, &cli->vm); |
ebb945a9 BS |
814 | if (ret) { |
815 | nouveau_cli_destroy(cli); | |
5addcf0a | 816 | goto out_suspend; |
ebb945a9 | 817 | } |
3ee6f5b5 | 818 | |
989aa5b7 | 819 | nvxx_client(&cli->base)->vm = cli->vm; |
ebb945a9 BS |
820 | } |
821 | ||
822 | fpriv->driver_priv = cli; | |
823 | ||
824 | mutex_lock(&drm->client.mutex); | |
825 | list_add(&cli->head, &drm->clients); | |
826 | mutex_unlock(&drm->client.mutex); | |
5addcf0a DA |
827 | |
828 | out_suspend: | |
829 | pm_runtime_mark_last_busy(dev->dev); | |
830 | pm_runtime_put_autosuspend(dev->dev); | |
831 | ||
832 | return ret; | |
ebb945a9 BS |
833 | } |
834 | ||
5b8a43ae | 835 | static void |
ebb945a9 BS |
836 | nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv) |
837 | { | |
838 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
839 | struct nouveau_drm *drm = nouveau_drm(dev); | |
840 | ||
5addcf0a DA |
841 | pm_runtime_get_sync(dev->dev); |
842 | ||
ac8c7930 | 843 | mutex_lock(&cli->mutex); |
ebb945a9 BS |
844 | if (cli->abi16) |
845 | nouveau_abi16_fini(cli->abi16); | |
ac8c7930 | 846 | mutex_unlock(&cli->mutex); |
ebb945a9 BS |
847 | |
848 | mutex_lock(&drm->client.mutex); | |
849 | list_del(&cli->head); | |
850 | mutex_unlock(&drm->client.mutex); | |
5addcf0a | 851 | |
ebb945a9 BS |
852 | } |
853 | ||
5b8a43ae | 854 | static void |
ebb945a9 BS |
855 | nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) |
856 | { | |
857 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
858 | nouveau_cli_destroy(cli); | |
5addcf0a DA |
859 | pm_runtime_mark_last_busy(dev->dev); |
860 | pm_runtime_put_autosuspend(dev->dev); | |
ebb945a9 BS |
861 | } |
862 | ||
baa70943 | 863 | static const struct drm_ioctl_desc |
77145f1c | 864 | nouveau_ioctls[] = { |
f8c47144 DV |
865 | DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW), |
866 | DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | |
867 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW), | |
868 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW), | |
869 | DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), | |
870 | DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW), | |
871 | DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW), | |
872 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW), | |
873 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW), | |
874 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW), | |
875 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW), | |
876 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW), | |
77145f1c BS |
877 | }; |
878 | ||
27111a23 BS |
879 | long |
880 | nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
5addcf0a | 881 | { |
27111a23 BS |
882 | struct drm_file *filp = file->private_data; |
883 | struct drm_device *dev = filp->minor->dev; | |
5addcf0a | 884 | long ret; |
5addcf0a DA |
885 | |
886 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 887 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
888 | return ret; |
889 | ||
27111a23 BS |
890 | switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { |
891 | case DRM_NOUVEAU_NVIF: | |
892 | ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); | |
893 | break; | |
894 | default: | |
895 | ret = drm_ioctl(file, cmd, arg); | |
896 | break; | |
897 | } | |
5addcf0a DA |
898 | |
899 | pm_runtime_mark_last_busy(dev->dev); | |
900 | pm_runtime_put_autosuspend(dev->dev); | |
901 | return ret; | |
902 | } | |
27111a23 | 903 | |
77145f1c BS |
904 | static const struct file_operations |
905 | nouveau_driver_fops = { | |
906 | .owner = THIS_MODULE, | |
907 | .open = drm_open, | |
908 | .release = drm_release, | |
5addcf0a | 909 | .unlocked_ioctl = nouveau_drm_ioctl, |
77145f1c BS |
910 | .mmap = nouveau_ttm_mmap, |
911 | .poll = drm_poll, | |
77145f1c BS |
912 | .read = drm_read, |
913 | #if defined(CONFIG_COMPAT) | |
914 | .compat_ioctl = nouveau_compat_ioctl, | |
915 | #endif | |
916 | .llseek = noop_llseek, | |
917 | }; | |
918 | ||
919 | static struct drm_driver | |
915b4d11 | 920 | driver_stub = { |
77145f1c | 921 | .driver_features = |
0e975980 PA |
922 | DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER | |
923 | DRIVER_KMS_LEGACY_CONTEXT, | |
77145f1c BS |
924 | |
925 | .load = nouveau_drm_load, | |
926 | .unload = nouveau_drm_unload, | |
927 | .open = nouveau_drm_open, | |
928 | .preclose = nouveau_drm_preclose, | |
929 | .postclose = nouveau_drm_postclose, | |
930 | .lastclose = nouveau_vga_lastclose, | |
931 | ||
33b903e8 MS |
932 | #if defined(CONFIG_DEBUG_FS) |
933 | .debugfs_init = nouveau_debugfs_init, | |
934 | .debugfs_cleanup = nouveau_debugfs_takedown, | |
935 | #endif | |
936 | ||
b44f8408 | 937 | .get_vblank_counter = drm_vblank_no_hw_counter, |
51cb4b39 BS |
938 | .enable_vblank = nouveau_display_vblank_enable, |
939 | .disable_vblank = nouveau_display_vblank_disable, | |
d83ef853 BS |
940 | .get_scanout_position = nouveau_display_scanoutpos, |
941 | .get_vblank_timestamp = nouveau_display_vblstamp, | |
77145f1c BS |
942 | |
943 | .ioctls = nouveau_ioctls, | |
baa70943 | 944 | .num_ioctls = ARRAY_SIZE(nouveau_ioctls), |
77145f1c BS |
945 | .fops = &nouveau_driver_fops, |
946 | ||
947 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
948 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
ab9ccb96 AP |
949 | .gem_prime_export = drm_gem_prime_export, |
950 | .gem_prime_import = drm_gem_prime_import, | |
951 | .gem_prime_pin = nouveau_gem_prime_pin, | |
3aac4502 | 952 | .gem_prime_res_obj = nouveau_gem_prime_res_obj, |
1af7c7dd | 953 | .gem_prime_unpin = nouveau_gem_prime_unpin, |
ab9ccb96 AP |
954 | .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, |
955 | .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, | |
956 | .gem_prime_vmap = nouveau_gem_prime_vmap, | |
957 | .gem_prime_vunmap = nouveau_gem_prime_vunmap, | |
77145f1c | 958 | |
77145f1c BS |
959 | .gem_free_object = nouveau_gem_object_del, |
960 | .gem_open_object = nouveau_gem_object_open, | |
961 | .gem_close_object = nouveau_gem_object_close, | |
962 | ||
963 | .dumb_create = nouveau_display_dumb_create, | |
964 | .dumb_map_offset = nouveau_display_dumb_map_offset, | |
43387b37 | 965 | .dumb_destroy = drm_gem_dumb_destroy, |
77145f1c BS |
966 | |
967 | .name = DRIVER_NAME, | |
968 | .desc = DRIVER_DESC, | |
969 | #ifdef GIT_REVISION | |
970 | .date = GIT_REVISION, | |
971 | #else | |
972 | .date = DRIVER_DATE, | |
973 | #endif | |
974 | .major = DRIVER_MAJOR, | |
975 | .minor = DRIVER_MINOR, | |
976 | .patchlevel = DRIVER_PATCHLEVEL, | |
977 | }; | |
978 | ||
94580299 BS |
979 | static struct pci_device_id |
980 | nouveau_drm_pci_table[] = { | |
981 | { | |
982 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), | |
983 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
984 | .class_mask = 0xff << 16, | |
985 | }, | |
986 | { | |
987 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), | |
988 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
989 | .class_mask = 0xff << 16, | |
990 | }, | |
991 | {} | |
992 | }; | |
993 | ||
703fa264 PM |
994 | static void nouveau_display_options(void) |
995 | { | |
996 | DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); | |
997 | ||
998 | DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); | |
999 | DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); | |
1000 | DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); | |
1001 | DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel); | |
1002 | DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); | |
1003 | DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); | |
1004 | DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); | |
1005 | DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); | |
1006 | DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); | |
1007 | DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); | |
1008 | DRM_DEBUG_DRIVER("... pstate : %d\n", nouveau_pstate); | |
1009 | } | |
1010 | ||
2d8b9ccb DA |
1011 | static const struct dev_pm_ops nouveau_pm_ops = { |
1012 | .suspend = nouveau_pmops_suspend, | |
1013 | .resume = nouveau_pmops_resume, | |
1014 | .freeze = nouveau_pmops_freeze, | |
1015 | .thaw = nouveau_pmops_thaw, | |
1016 | .poweroff = nouveau_pmops_freeze, | |
1017 | .restore = nouveau_pmops_resume, | |
5addcf0a DA |
1018 | .runtime_suspend = nouveau_pmops_runtime_suspend, |
1019 | .runtime_resume = nouveau_pmops_runtime_resume, | |
1020 | .runtime_idle = nouveau_pmops_runtime_idle, | |
2d8b9ccb DA |
1021 | }; |
1022 | ||
94580299 BS |
1023 | static struct pci_driver |
1024 | nouveau_drm_pci_driver = { | |
1025 | .name = "nouveau", | |
1026 | .id_table = nouveau_drm_pci_table, | |
1027 | .probe = nouveau_drm_probe, | |
1028 | .remove = nouveau_drm_remove, | |
2d8b9ccb | 1029 | .driver.pm = &nouveau_pm_ops, |
94580299 BS |
1030 | }; |
1031 | ||
8ba9ff11 | 1032 | struct drm_device * |
47b2505e BS |
1033 | nouveau_platform_device_create(struct platform_device *pdev, |
1034 | struct nvkm_device **pdevice) | |
420b9469 | 1035 | { |
8ba9ff11 AC |
1036 | struct drm_device *drm; |
1037 | int err; | |
420b9469 | 1038 | |
7974dd1b BS |
1039 | err = nvkm_device_tegra_new(pdev, nouveau_config, nouveau_debug, |
1040 | true, true, ~0ULL, pdevice); | |
8ba9ff11 | 1041 | if (err) |
e781dc8f | 1042 | goto err_free; |
8ba9ff11 | 1043 | |
915b4d11 | 1044 | drm = drm_dev_alloc(&driver_platform, &pdev->dev); |
8ba9ff11 AC |
1045 | if (!drm) { |
1046 | err = -ENOMEM; | |
1047 | goto err_free; | |
420b9469 AC |
1048 | } |
1049 | ||
8ba9ff11 AC |
1050 | err = drm_dev_set_unique(drm, "%s", dev_name(&pdev->dev)); |
1051 | if (err < 0) | |
1052 | goto err_free; | |
1053 | ||
1054 | drm->platformdev = pdev; | |
1055 | platform_set_drvdata(pdev, drm); | |
1056 | ||
1057 | return drm; | |
1058 | ||
1059 | err_free: | |
e781dc8f | 1060 | nvkm_device_del(pdevice); |
8ba9ff11 AC |
1061 | |
1062 | return ERR_PTR(err); | |
420b9469 AC |
1063 | } |
1064 | ||
94580299 BS |
1065 | static int __init |
1066 | nouveau_drm_init(void) | |
1067 | { | |
915b4d11 DH |
1068 | driver_pci = driver_stub; |
1069 | driver_pci.set_busid = drm_pci_set_busid; | |
1070 | driver_platform = driver_stub; | |
1071 | driver_platform.set_busid = drm_platform_set_busid; | |
1072 | ||
703fa264 PM |
1073 | nouveau_display_options(); |
1074 | ||
77145f1c BS |
1075 | if (nouveau_modeset == -1) { |
1076 | #ifdef CONFIG_VGA_CONSOLE | |
1077 | if (vgacon_text_force()) | |
1078 | nouveau_modeset = 0; | |
77145f1c | 1079 | #endif |
77145f1c BS |
1080 | } |
1081 | ||
1082 | if (!nouveau_modeset) | |
1083 | return 0; | |
1084 | ||
055a65d5 AC |
1085 | #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER |
1086 | platform_driver_register(&nouveau_platform_driver); | |
1087 | #endif | |
1088 | ||
77145f1c | 1089 | nouveau_register_dsm_handler(); |
915b4d11 | 1090 | return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver); |
94580299 BS |
1091 | } |
1092 | ||
1093 | static void __exit | |
1094 | nouveau_drm_exit(void) | |
1095 | { | |
77145f1c BS |
1096 | if (!nouveau_modeset) |
1097 | return; | |
1098 | ||
915b4d11 | 1099 | drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver); |
77145f1c | 1100 | nouveau_unregister_dsm_handler(); |
055a65d5 AC |
1101 | |
1102 | #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER | |
1103 | platform_driver_unregister(&nouveau_platform_driver); | |
1104 | #endif | |
94580299 BS |
1105 | } |
1106 | ||
1107 | module_init(nouveau_drm_init); | |
1108 | module_exit(nouveau_drm_exit); | |
1109 | ||
1110 | MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); | |
77145f1c BS |
1111 | MODULE_AUTHOR(DRIVER_AUTHOR); |
1112 | MODULE_DESCRIPTION(DRIVER_DESC); | |
94580299 | 1113 | MODULE_LICENSE("GPL and additional rights"); |