Commit | Line | Data |
---|---|---|
94580299 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
77145f1c | 25 | #include <linux/console.h> |
c5fd936e | 26 | #include <linux/delay.h> |
94580299 BS |
27 | #include <linux/module.h> |
28 | #include <linux/pci.h> | |
5addcf0a DA |
29 | #include <linux/pm_runtime.h> |
30 | #include <linux/vga_switcheroo.h> | |
fdb751ef | 31 | |
5addcf0a DA |
32 | #include "drmP.h" |
33 | #include "drm_crtc_helper.h" | |
fdb751ef | 34 | |
94580299 | 35 | #include <core/device.h> |
ebb945a9 | 36 | #include <core/gpuobj.h> |
c33e05a1 | 37 | #include <core/option.h> |
94580299 | 38 | |
94580299 | 39 | #include "nouveau_drm.h" |
ebb945a9 | 40 | #include "nouveau_dma.h" |
77145f1c BS |
41 | #include "nouveau_ttm.h" |
42 | #include "nouveau_gem.h" | |
cb75d97e | 43 | #include "nouveau_agp.h" |
77145f1c | 44 | #include "nouveau_vga.h" |
26fdd78c | 45 | #include "nouveau_sysfs.h" |
b9ed919f | 46 | #include "nouveau_hwmon.h" |
77145f1c BS |
47 | #include "nouveau_acpi.h" |
48 | #include "nouveau_bios.h" | |
49 | #include "nouveau_ioctl.h" | |
ebb945a9 BS |
50 | #include "nouveau_abi16.h" |
51 | #include "nouveau_fbcon.h" | |
52 | #include "nouveau_fence.h" | |
33b903e8 | 53 | #include "nouveau_debugfs.h" |
27111a23 | 54 | #include "nouveau_usif.h" |
703fa264 | 55 | #include "nouveau_connector.h" |
055a65d5 | 56 | #include "nouveau_platform.h" |
ebb945a9 | 57 | |
94580299 BS |
58 | MODULE_PARM_DESC(config, "option string to pass to driver core"); |
59 | static char *nouveau_config; | |
60 | module_param_named(config, nouveau_config, charp, 0400); | |
61 | ||
62 | MODULE_PARM_DESC(debug, "debug string to pass to driver core"); | |
63 | static char *nouveau_debug; | |
64 | module_param_named(debug, nouveau_debug, charp, 0400); | |
65 | ||
ebb945a9 BS |
66 | MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); |
67 | static int nouveau_noaccel = 0; | |
68 | module_param_named(noaccel, nouveau_noaccel, int, 0400); | |
69 | ||
9430738d BS |
70 | MODULE_PARM_DESC(modeset, "enable driver (default: auto, " |
71 | "0 = disabled, 1 = enabled, 2 = headless)"); | |
72 | int nouveau_modeset = -1; | |
77145f1c BS |
73 | module_param_named(modeset, nouveau_modeset, int, 0400); |
74 | ||
5addcf0a DA |
75 | MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); |
76 | int nouveau_runtime_pm = -1; | |
77 | module_param_named(runpm, nouveau_runtime_pm, int, 0400); | |
78 | ||
915b4d11 DH |
79 | static struct drm_driver driver_stub; |
80 | static struct drm_driver driver_pci; | |
81 | static struct drm_driver driver_platform; | |
77145f1c | 82 | |
94580299 | 83 | static u64 |
420b9469 | 84 | nouveau_pci_name(struct pci_dev *pdev) |
94580299 BS |
85 | { |
86 | u64 name = (u64)pci_domain_nr(pdev->bus) << 32; | |
87 | name |= pdev->bus->number << 16; | |
88 | name |= PCI_SLOT(pdev->devfn) << 8; | |
89 | return name | PCI_FUNC(pdev->devfn); | |
90 | } | |
91 | ||
420b9469 AC |
92 | static u64 |
93 | nouveau_platform_name(struct platform_device *platformdev) | |
94 | { | |
95 | return platformdev->id; | |
96 | } | |
97 | ||
98 | static u64 | |
99 | nouveau_name(struct drm_device *dev) | |
100 | { | |
101 | if (dev->pdev) | |
102 | return nouveau_pci_name(dev->pdev); | |
103 | else | |
104 | return nouveau_platform_name(dev->platformdev); | |
105 | } | |
106 | ||
94580299 | 107 | static int |
9ad97ede | 108 | nouveau_cli_create(struct drm_device *dev, const char *sname, |
fa6df8c1 | 109 | int size, void **pcli) |
94580299 | 110 | { |
0ad72863 | 111 | struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL); |
9ad97ede | 112 | int ret; |
0ad72863 | 113 | if (cli) { |
9ad97ede BS |
114 | snprintf(cli->name, sizeof(cli->name), "%s", sname); |
115 | cli->dev = dev; | |
116 | ||
117 | ret = nvif_client_init(NULL, NULL, cli->name, nouveau_name(dev), | |
118 | nouveau_config, nouveau_debug, | |
119 | &cli->base); | |
27111a23 | 120 | if (ret == 0) { |
0ad72863 | 121 | mutex_init(&cli->mutex); |
27111a23 BS |
122 | usif_client_init(cli); |
123 | } | |
94580299 | 124 | return ret; |
dd5700ea | 125 | } |
0ad72863 | 126 | return -ENOMEM; |
94580299 BS |
127 | } |
128 | ||
129 | static void | |
130 | nouveau_cli_destroy(struct nouveau_cli *cli) | |
131 | { | |
be83cd4e | 132 | nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL); |
0ad72863 | 133 | nvif_client_fini(&cli->base); |
27111a23 | 134 | usif_client_fini(cli); |
f5654d95 | 135 | kfree(cli); |
94580299 BS |
136 | } |
137 | ||
ebb945a9 BS |
138 | static void |
139 | nouveau_accel_fini(struct nouveau_drm *drm) | |
140 | { | |
ebb945a9 | 141 | nouveau_channel_del(&drm->channel); |
0ad72863 | 142 | nvif_object_fini(&drm->ntfy); |
be83cd4e | 143 | nvkm_gpuobj_ref(NULL, &drm->notify); |
0ad72863 | 144 | nvif_object_fini(&drm->nvsw); |
49981046 | 145 | nouveau_channel_del(&drm->cechan); |
0ad72863 | 146 | nvif_object_fini(&drm->ttm.copy); |
ebb945a9 BS |
147 | if (drm->fence) |
148 | nouveau_fence(drm)->dtor(drm); | |
149 | } | |
150 | ||
151 | static void | |
152 | nouveau_accel_init(struct nouveau_drm *drm) | |
153 | { | |
967e7bde | 154 | struct nvif_device *device = &drm->device; |
49981046 | 155 | u32 arg0, arg1; |
967e7bde BS |
156 | u32 sclass[16]; |
157 | int ret, i; | |
ebb945a9 | 158 | |
967e7bde | 159 | if (nouveau_noaccel) |
ebb945a9 BS |
160 | return; |
161 | ||
162 | /* initialise synchronisation routines */ | |
967e7bde BS |
163 | /*XXX: this is crap, but the fence/channel stuff is a little |
164 | * backwards in some places. this will be fixed. | |
165 | */ | |
0ad72863 | 166 | ret = nvif_object_sclass(&device->base, sclass, ARRAY_SIZE(sclass)); |
967e7bde BS |
167 | if (ret < 0) |
168 | return; | |
169 | ||
170 | for (ret = -ENOSYS, i = 0; ret && i < ARRAY_SIZE(sclass); i++) { | |
171 | switch (sclass[i]) { | |
bbf8906b | 172 | case NV03_CHANNEL_DMA: |
967e7bde BS |
173 | ret = nv04_fence_create(drm); |
174 | break; | |
bbf8906b | 175 | case NV10_CHANNEL_DMA: |
967e7bde BS |
176 | ret = nv10_fence_create(drm); |
177 | break; | |
bbf8906b BS |
178 | case NV17_CHANNEL_DMA: |
179 | case NV40_CHANNEL_DMA: | |
967e7bde BS |
180 | ret = nv17_fence_create(drm); |
181 | break; | |
bbf8906b | 182 | case NV50_CHANNEL_GPFIFO: |
967e7bde BS |
183 | ret = nv50_fence_create(drm); |
184 | break; | |
bbf8906b | 185 | case G82_CHANNEL_GPFIFO: |
967e7bde BS |
186 | ret = nv84_fence_create(drm); |
187 | break; | |
bbf8906b BS |
188 | case FERMI_CHANNEL_GPFIFO: |
189 | case KEPLER_CHANNEL_GPFIFO_A: | |
a1020afe | 190 | case MAXWELL_CHANNEL_GPFIFO_A: |
967e7bde BS |
191 | ret = nvc0_fence_create(drm); |
192 | break; | |
193 | default: | |
194 | break; | |
195 | } | |
196 | } | |
197 | ||
ebb945a9 BS |
198 | if (ret) { |
199 | NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); | |
200 | nouveau_accel_fini(drm); | |
201 | return; | |
202 | } | |
203 | ||
967e7bde | 204 | if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { |
0ad72863 | 205 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1, |
bbf8906b BS |
206 | KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0| |
207 | KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1, | |
208 | 0, &drm->cechan); | |
49981046 BS |
209 | if (ret) |
210 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
211 | ||
bbf8906b | 212 | arg0 = KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR; |
49469800 | 213 | arg1 = 1; |
00fc6f6f | 214 | } else |
967e7bde BS |
215 | if (device->info.chipset >= 0xa3 && |
216 | device->info.chipset != 0xaa && | |
217 | device->info.chipset != 0xac) { | |
0ad72863 BS |
218 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1, |
219 | NvDmaFB, NvDmaTT, &drm->cechan); | |
00fc6f6f BS |
220 | if (ret) |
221 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
222 | ||
223 | arg0 = NvDmaFB; | |
224 | arg1 = NvDmaTT; | |
49981046 BS |
225 | } else { |
226 | arg0 = NvDmaFB; | |
227 | arg1 = NvDmaTT; | |
228 | } | |
229 | ||
0ad72863 BS |
230 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN, arg0, arg1, |
231 | &drm->channel); | |
ebb945a9 BS |
232 | if (ret) { |
233 | NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); | |
234 | nouveau_accel_fini(drm); | |
235 | return; | |
236 | } | |
237 | ||
0ad72863 BS |
238 | ret = nvif_object_init(drm->channel->object, NULL, NVDRM_NVSW, |
239 | nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw); | |
69a6146d | 240 | if (ret == 0) { |
be83cd4e | 241 | struct nvkm_sw_chan *swch; |
69a6146d BS |
242 | ret = RING_SPACE(drm->channel, 2); |
243 | if (ret == 0) { | |
967e7bde | 244 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
69a6146d BS |
245 | BEGIN_NV04(drm->channel, NvSubSw, 0, 1); |
246 | OUT_RING (drm->channel, NVDRM_NVSW); | |
247 | } else | |
967e7bde | 248 | if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) { |
69a6146d BS |
249 | BEGIN_NVC0(drm->channel, FermiSw, 0, 1); |
250 | OUT_RING (drm->channel, 0x001f0000); | |
251 | } | |
252 | } | |
989aa5b7 | 253 | swch = (void *)nvxx_object(&drm->nvsw)->parent; |
69a6146d BS |
254 | swch->flip = nouveau_flip_complete; |
255 | swch->flip_data = drm->channel; | |
256 | } | |
257 | ||
258 | if (ret) { | |
259 | NV_ERROR(drm, "failed to allocate software object, %d\n", ret); | |
260 | nouveau_accel_fini(drm); | |
261 | return; | |
262 | } | |
263 | ||
967e7bde | 264 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
be83cd4e BS |
265 | ret = nvkm_gpuobj_new(nvxx_object(&drm->device), NULL, 32, |
266 | 0, 0, &drm->notify); | |
ebb945a9 BS |
267 | if (ret) { |
268 | NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); | |
269 | nouveau_accel_fini(drm); | |
270 | return; | |
271 | } | |
272 | ||
0ad72863 | 273 | ret = nvif_object_init(drm->channel->object, NULL, NvNotify0, |
4acfd707 BS |
274 | NV_DMA_IN_MEMORY, |
275 | &(struct nv_dma_v0) { | |
276 | .target = NV_DMA_V0_TARGET_VRAM, | |
277 | .access = NV_DMA_V0_ACCESS_RDWR, | |
ebb945a9 BS |
278 | .start = drm->notify->addr, |
279 | .limit = drm->notify->addr + 31 | |
4acfd707 | 280 | }, sizeof(struct nv_dma_v0), |
0ad72863 | 281 | &drm->ntfy); |
ebb945a9 BS |
282 | if (ret) { |
283 | nouveau_accel_fini(drm); | |
284 | return; | |
285 | } | |
286 | } | |
287 | ||
288 | ||
49981046 | 289 | nouveau_bo_move_init(drm); |
ebb945a9 BS |
290 | } |
291 | ||
56550d94 GKH |
292 | static int nouveau_drm_probe(struct pci_dev *pdev, |
293 | const struct pci_device_id *pent) | |
94580299 | 294 | { |
be83cd4e | 295 | struct nvkm_device *device; |
ebb945a9 BS |
296 | struct apertures_struct *aper; |
297 | bool boot = false; | |
94580299 BS |
298 | int ret; |
299 | ||
ebb945a9 BS |
300 | /* remove conflicting drivers (vesafb, efifb etc) */ |
301 | aper = alloc_apertures(3); | |
302 | if (!aper) | |
303 | return -ENOMEM; | |
304 | ||
305 | aper->ranges[0].base = pci_resource_start(pdev, 1); | |
306 | aper->ranges[0].size = pci_resource_len(pdev, 1); | |
307 | aper->count = 1; | |
308 | ||
309 | if (pci_resource_len(pdev, 2)) { | |
310 | aper->ranges[aper->count].base = pci_resource_start(pdev, 2); | |
311 | aper->ranges[aper->count].size = pci_resource_len(pdev, 2); | |
312 | aper->count++; | |
313 | } | |
314 | ||
315 | if (pci_resource_len(pdev, 3)) { | |
316 | aper->ranges[aper->count].base = pci_resource_start(pdev, 3); | |
317 | aper->ranges[aper->count].size = pci_resource_len(pdev, 3); | |
318 | aper->count++; | |
319 | } | |
320 | ||
321 | #ifdef CONFIG_X86 | |
322 | boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; | |
323 | #endif | |
771fa0e4 BS |
324 | if (nouveau_modeset != 2) |
325 | remove_conflicting_framebuffers(aper, "nouveaufb", boot); | |
83ef7777 | 326 | kfree(aper); |
ebb945a9 | 327 | |
be83cd4e BS |
328 | ret = nvkm_device_create(pdev, NVKM_BUS_PCI, |
329 | nouveau_pci_name(pdev), pci_name(pdev), | |
330 | nouveau_config, nouveau_debug, &device); | |
94580299 BS |
331 | if (ret) |
332 | return ret; | |
333 | ||
334 | pci_set_master(pdev); | |
335 | ||
915b4d11 | 336 | ret = drm_get_pci_dev(pdev, pent, &driver_pci); |
94580299 | 337 | if (ret) { |
be83cd4e | 338 | nvkm_object_ref(NULL, (struct nvkm_object **)&device); |
94580299 BS |
339 | return ret; |
340 | } | |
341 | ||
342 | return 0; | |
343 | } | |
344 | ||
5addcf0a DA |
345 | #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 |
346 | ||
347 | static void | |
46941b0f | 348 | nouveau_get_hdmi_dev(struct nouveau_drm *drm) |
5addcf0a | 349 | { |
46941b0f | 350 | struct pci_dev *pdev = drm->dev->pdev; |
5addcf0a | 351 | |
420b9469 | 352 | if (!pdev) { |
40189b0c | 353 | DRM_INFO("not a PCI device; no HDMI\n"); |
420b9469 AC |
354 | drm->hdmi_device = NULL; |
355 | return; | |
356 | } | |
357 | ||
5addcf0a DA |
358 | /* subfunction one is a hdmi audio device? */ |
359 | drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number, | |
360 | PCI_DEVFN(PCI_SLOT(pdev->devfn), 1)); | |
361 | ||
362 | if (!drm->hdmi_device) { | |
46941b0f | 363 | NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1); |
5addcf0a DA |
364 | return; |
365 | } | |
366 | ||
367 | if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) { | |
46941b0f | 368 | NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class); |
5addcf0a DA |
369 | pci_dev_put(drm->hdmi_device); |
370 | drm->hdmi_device = NULL; | |
371 | return; | |
372 | } | |
373 | } | |
374 | ||
5b8a43ae | 375 | static int |
94580299 BS |
376 | nouveau_drm_load(struct drm_device *dev, unsigned long flags) |
377 | { | |
378 | struct pci_dev *pdev = dev->pdev; | |
379 | struct nouveau_drm *drm; | |
380 | int ret; | |
381 | ||
9ad97ede | 382 | ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm); |
94580299 BS |
383 | if (ret) |
384 | return ret; | |
385 | ||
77145f1c BS |
386 | dev->dev_private = drm; |
387 | drm->dev = dev; | |
989aa5b7 | 388 | nvxx_client(&drm->client.base)->debug = |
be83cd4e | 389 | nvkm_dbgopt(nouveau_debug, "DRM"); |
77145f1c | 390 | |
94580299 | 391 | INIT_LIST_HEAD(&drm->clients); |
ebb945a9 | 392 | spin_lock_init(&drm->tile.lock); |
94580299 | 393 | |
46941b0f | 394 | nouveau_get_hdmi_dev(drm); |
5addcf0a | 395 | |
cb75d97e BS |
396 | /* make sure AGP controller is in a consistent state before we |
397 | * (possibly) execute vbios init tables (see nouveau_agp.h) | |
398 | */ | |
420b9469 | 399 | if (pdev && drm_pci_device_is_agp(dev) && dev->agp) { |
586491e6 BS |
400 | const u64 enables = NV_DEVICE_V0_DISABLE_IDENTIFY | |
401 | NV_DEVICE_V0_DISABLE_MMIO; | |
cb75d97e BS |
402 | /* dummy device object, doesn't init anything, but allows |
403 | * agp code access to registers | |
404 | */ | |
0ad72863 | 405 | ret = nvif_device_init(&drm->client.base.base, NULL, |
586491e6 BS |
406 | NVDRM_DEVICE, NV_DEVICE, |
407 | &(struct nv_device_v0) { | |
cb75d97e | 408 | .device = ~0, |
586491e6 | 409 | .disable = ~enables, |
cb75d97e | 410 | .debug0 = ~0, |
586491e6 | 411 | }, sizeof(struct nv_device_v0), |
0ad72863 | 412 | &drm->device); |
cb75d97e | 413 | if (ret) |
ebb945a9 | 414 | goto fail_device; |
cb75d97e BS |
415 | |
416 | nouveau_agp_reset(drm); | |
0ad72863 | 417 | nvif_device_fini(&drm->device); |
cb75d97e BS |
418 | } |
419 | ||
0ad72863 | 420 | ret = nvif_device_init(&drm->client.base.base, NULL, NVDRM_DEVICE, |
586491e6 BS |
421 | NV_DEVICE, |
422 | &(struct nv_device_v0) { | |
94580299 BS |
423 | .device = ~0, |
424 | .disable = 0, | |
425 | .debug0 = 0, | |
586491e6 | 426 | }, sizeof(struct nv_device_v0), |
0ad72863 | 427 | &drm->device); |
94580299 BS |
428 | if (ret) |
429 | goto fail_device; | |
430 | ||
7d3428cd IM |
431 | dev->irq_enabled = true; |
432 | ||
77145f1c BS |
433 | /* workaround an odd issue on nvc1 by disabling the device's |
434 | * nosnoop capability. hopefully won't cause issues until a | |
435 | * better fix is found - assuming there is one... | |
436 | */ | |
967e7bde BS |
437 | if (drm->device.info.chipset == 0xc1) |
438 | nvif_mask(&drm->device, 0x00088080, 0x00000800, 0x00000000); | |
ebb945a9 | 439 | |
77145f1c | 440 | nouveau_vga_init(drm); |
cb75d97e BS |
441 | nouveau_agp_init(drm); |
442 | ||
967e7bde | 443 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
be83cd4e BS |
444 | ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40), |
445 | 0x1000, &drm->client.vm); | |
ebb945a9 BS |
446 | if (ret) |
447 | goto fail_device; | |
3ee6f5b5 | 448 | |
989aa5b7 | 449 | nvxx_client(&drm->client.base)->vm = drm->client.vm; |
ebb945a9 BS |
450 | } |
451 | ||
452 | ret = nouveau_ttm_init(drm); | |
94580299 | 453 | if (ret) |
77145f1c BS |
454 | goto fail_ttm; |
455 | ||
456 | ret = nouveau_bios_init(dev); | |
457 | if (ret) | |
458 | goto fail_bios; | |
459 | ||
77145f1c | 460 | ret = nouveau_display_create(dev); |
ebb945a9 | 461 | if (ret) |
77145f1c BS |
462 | goto fail_dispctor; |
463 | ||
464 | if (dev->mode_config.num_crtc) { | |
465 | ret = nouveau_display_init(dev); | |
466 | if (ret) | |
467 | goto fail_dispinit; | |
468 | } | |
469 | ||
26fdd78c | 470 | nouveau_sysfs_init(dev); |
b9ed919f | 471 | nouveau_hwmon_init(dev); |
ebb945a9 BS |
472 | nouveau_accel_init(drm); |
473 | nouveau_fbcon_init(dev); | |
5addcf0a DA |
474 | |
475 | if (nouveau_runtime_pm != 0) { | |
476 | pm_runtime_use_autosuspend(dev->dev); | |
477 | pm_runtime_set_autosuspend_delay(dev->dev, 5000); | |
478 | pm_runtime_set_active(dev->dev); | |
479 | pm_runtime_allow(dev->dev); | |
480 | pm_runtime_mark_last_busy(dev->dev); | |
481 | pm_runtime_put(dev->dev); | |
482 | } | |
94580299 BS |
483 | return 0; |
484 | ||
77145f1c BS |
485 | fail_dispinit: |
486 | nouveau_display_destroy(dev); | |
487 | fail_dispctor: | |
77145f1c BS |
488 | nouveau_bios_takedown(dev); |
489 | fail_bios: | |
ebb945a9 | 490 | nouveau_ttm_fini(drm); |
77145f1c BS |
491 | fail_ttm: |
492 | nouveau_agp_fini(drm); | |
493 | nouveau_vga_fini(drm); | |
94580299 | 494 | fail_device: |
0ad72863 | 495 | nvif_device_fini(&drm->device); |
94580299 BS |
496 | nouveau_cli_destroy(&drm->client); |
497 | return ret; | |
498 | } | |
499 | ||
5b8a43ae | 500 | static int |
94580299 BS |
501 | nouveau_drm_unload(struct drm_device *dev) |
502 | { | |
77145f1c | 503 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 | 504 | |
5addcf0a | 505 | pm_runtime_get_sync(dev->dev); |
ebb945a9 BS |
506 | nouveau_fbcon_fini(dev); |
507 | nouveau_accel_fini(drm); | |
b9ed919f | 508 | nouveau_hwmon_fini(dev); |
26fdd78c | 509 | nouveau_sysfs_fini(dev); |
77145f1c | 510 | |
9430738d BS |
511 | if (dev->mode_config.num_crtc) |
512 | nouveau_display_fini(dev); | |
77145f1c BS |
513 | nouveau_display_destroy(dev); |
514 | ||
77145f1c | 515 | nouveau_bios_takedown(dev); |
94580299 | 516 | |
ebb945a9 | 517 | nouveau_ttm_fini(drm); |
cb75d97e | 518 | nouveau_agp_fini(drm); |
77145f1c | 519 | nouveau_vga_fini(drm); |
cb75d97e | 520 | |
0ad72863 | 521 | nvif_device_fini(&drm->device); |
5addcf0a DA |
522 | if (drm->hdmi_device) |
523 | pci_dev_put(drm->hdmi_device); | |
94580299 BS |
524 | nouveau_cli_destroy(&drm->client); |
525 | return 0; | |
526 | } | |
527 | ||
8ba9ff11 AC |
528 | void |
529 | nouveau_drm_device_remove(struct drm_device *dev) | |
94580299 | 530 | { |
77145f1c | 531 | struct nouveau_drm *drm = nouveau_drm(dev); |
be83cd4e BS |
532 | struct nvkm_client *client; |
533 | struct nvkm_object *device; | |
77145f1c | 534 | |
7d3428cd | 535 | dev->irq_enabled = false; |
989aa5b7 | 536 | client = nvxx_client(&drm->client.base); |
0ad72863 | 537 | device = client->device; |
77145f1c BS |
538 | drm_put_dev(dev); |
539 | ||
be83cd4e | 540 | nvkm_object_ref(NULL, &device); |
94580299 | 541 | } |
8ba9ff11 AC |
542 | |
543 | static void | |
544 | nouveau_drm_remove(struct pci_dev *pdev) | |
545 | { | |
546 | struct drm_device *dev = pci_get_drvdata(pdev); | |
547 | ||
548 | nouveau_drm_device_remove(dev); | |
549 | } | |
94580299 | 550 | |
cd897837 | 551 | static int |
05c63c2f | 552 | nouveau_do_suspend(struct drm_device *dev, bool runtime) |
94580299 | 553 | { |
77145f1c | 554 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 BS |
555 | struct nouveau_cli *cli; |
556 | int ret; | |
557 | ||
6fbb702e BS |
558 | if (dev->mode_config.num_crtc) { |
559 | NV_INFO(drm, "suspending console...\n"); | |
560 | nouveau_fbcon_set_suspend(dev, 1); | |
c52f4fa6 | 561 | NV_INFO(drm, "suspending display...\n"); |
6fbb702e | 562 | ret = nouveau_display_suspend(dev, runtime); |
9430738d BS |
563 | if (ret) |
564 | return ret; | |
565 | } | |
94580299 | 566 | |
c52f4fa6 | 567 | NV_INFO(drm, "evicting buffers...\n"); |
ebb945a9 BS |
568 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); |
569 | ||
c52f4fa6 | 570 | NV_INFO(drm, "waiting for kernel channels to go idle...\n"); |
81dff21b BS |
571 | if (drm->cechan) { |
572 | ret = nouveau_channel_idle(drm->cechan); | |
573 | if (ret) | |
f3980dc5 | 574 | goto fail_display; |
81dff21b BS |
575 | } |
576 | ||
577 | if (drm->channel) { | |
578 | ret = nouveau_channel_idle(drm->channel); | |
579 | if (ret) | |
f3980dc5 | 580 | goto fail_display; |
81dff21b BS |
581 | } |
582 | ||
c52f4fa6 | 583 | NV_INFO(drm, "suspending client object trees...\n"); |
ebb945a9 | 584 | if (drm->fence && nouveau_fence(drm)->suspend) { |
f3980dc5 IM |
585 | if (!nouveau_fence(drm)->suspend(drm)) { |
586 | ret = -ENOMEM; | |
587 | goto fail_display; | |
588 | } | |
ebb945a9 BS |
589 | } |
590 | ||
94580299 | 591 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 592 | ret = nvif_client_suspend(&cli->base); |
94580299 BS |
593 | if (ret) |
594 | goto fail_client; | |
595 | } | |
596 | ||
c52f4fa6 | 597 | NV_INFO(drm, "suspending kernel object tree...\n"); |
0ad72863 | 598 | ret = nvif_client_suspend(&drm->client.base); |
94580299 BS |
599 | if (ret) |
600 | goto fail_client; | |
601 | ||
cb75d97e | 602 | nouveau_agp_fini(drm); |
94580299 BS |
603 | return 0; |
604 | ||
605 | fail_client: | |
606 | list_for_each_entry_continue_reverse(cli, &drm->clients, head) { | |
0ad72863 | 607 | nvif_client_resume(&cli->base); |
94580299 BS |
608 | } |
609 | ||
f3980dc5 IM |
610 | if (drm->fence && nouveau_fence(drm)->resume) |
611 | nouveau_fence(drm)->resume(drm); | |
612 | ||
613 | fail_display: | |
9430738d | 614 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 615 | NV_INFO(drm, "resuming display...\n"); |
6fbb702e | 616 | nouveau_display_resume(dev, runtime); |
9430738d | 617 | } |
94580299 BS |
618 | return ret; |
619 | } | |
620 | ||
cd897837 | 621 | static int |
6fbb702e | 622 | nouveau_do_resume(struct drm_device *dev, bool runtime) |
2d8b9ccb DA |
623 | { |
624 | struct nouveau_drm *drm = nouveau_drm(dev); | |
625 | struct nouveau_cli *cli; | |
626 | ||
c52f4fa6 | 627 | NV_INFO(drm, "re-enabling device...\n"); |
94580299 | 628 | |
cb75d97e BS |
629 | nouveau_agp_reset(drm); |
630 | ||
c52f4fa6 | 631 | NV_INFO(drm, "resuming kernel object tree...\n"); |
0ad72863 | 632 | nvif_client_resume(&drm->client.base); |
ebb945a9 | 633 | nouveau_agp_init(drm); |
94580299 | 634 | |
c52f4fa6 | 635 | NV_INFO(drm, "resuming client object trees...\n"); |
81dff21b BS |
636 | if (drm->fence && nouveau_fence(drm)->resume) |
637 | nouveau_fence(drm)->resume(drm); | |
638 | ||
94580299 | 639 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 640 | nvif_client_resume(&cli->base); |
94580299 | 641 | } |
cb75d97e | 642 | |
77145f1c | 643 | nouveau_run_vbios_init(dev); |
77145f1c | 644 | |
9430738d | 645 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 646 | NV_INFO(drm, "resuming display...\n"); |
6fbb702e BS |
647 | nouveau_display_resume(dev, runtime); |
648 | NV_INFO(drm, "resuming console...\n"); | |
649 | nouveau_fbcon_set_suspend(dev, 0); | |
9430738d | 650 | } |
5addcf0a | 651 | |
77145f1c | 652 | return 0; |
94580299 BS |
653 | } |
654 | ||
7bb6d442 BS |
655 | int |
656 | nouveau_pmops_suspend(struct device *dev) | |
657 | { | |
658 | struct pci_dev *pdev = to_pci_dev(dev); | |
659 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
660 | int ret; | |
661 | ||
662 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || | |
663 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
664 | return 0; | |
665 | ||
666 | ret = nouveau_do_suspend(drm_dev, false); | |
667 | if (ret) | |
668 | return ret; | |
669 | ||
670 | pci_save_state(pdev); | |
671 | pci_disable_device(pdev); | |
7bb6d442 | 672 | pci_set_power_state(pdev, PCI_D3hot); |
c5fd936e | 673 | udelay(200); |
7bb6d442 BS |
674 | return 0; |
675 | } | |
676 | ||
677 | int | |
678 | nouveau_pmops_resume(struct device *dev) | |
2d8b9ccb DA |
679 | { |
680 | struct pci_dev *pdev = to_pci_dev(dev); | |
681 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
682 | int ret; | |
683 | ||
5addcf0a DA |
684 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
685 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
2d8b9ccb DA |
686 | return 0; |
687 | ||
688 | pci_set_power_state(pdev, PCI_D0); | |
689 | pci_restore_state(pdev); | |
690 | ret = pci_enable_device(pdev); | |
691 | if (ret) | |
692 | return ret; | |
693 | pci_set_master(pdev); | |
694 | ||
6fbb702e | 695 | return nouveau_do_resume(drm_dev, false); |
2d8b9ccb DA |
696 | } |
697 | ||
7bb6d442 BS |
698 | static int |
699 | nouveau_pmops_freeze(struct device *dev) | |
2d8b9ccb DA |
700 | { |
701 | struct pci_dev *pdev = to_pci_dev(dev); | |
702 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
6fbb702e | 703 | return nouveau_do_suspend(drm_dev, false); |
2d8b9ccb DA |
704 | } |
705 | ||
7bb6d442 BS |
706 | static int |
707 | nouveau_pmops_thaw(struct device *dev) | |
2d8b9ccb DA |
708 | { |
709 | struct pci_dev *pdev = to_pci_dev(dev); | |
710 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
6fbb702e | 711 | return nouveau_do_resume(drm_dev, false); |
2d8b9ccb DA |
712 | } |
713 | ||
7bb6d442 BS |
714 | static int |
715 | nouveau_pmops_runtime_suspend(struct device *dev) | |
716 | { | |
717 | struct pci_dev *pdev = to_pci_dev(dev); | |
718 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
719 | int ret; | |
720 | ||
721 | if (nouveau_runtime_pm == 0) { | |
722 | pm_runtime_forbid(dev); | |
723 | return -EBUSY; | |
724 | } | |
725 | ||
726 | /* are we optimus enabled? */ | |
727 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
728 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
729 | pm_runtime_forbid(dev); | |
730 | return -EBUSY; | |
731 | } | |
732 | ||
7bb6d442 BS |
733 | drm_kms_helper_poll_disable(drm_dev); |
734 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); | |
735 | nouveau_switcheroo_optimus_dsm(); | |
736 | ret = nouveau_do_suspend(drm_dev, true); | |
737 | pci_save_state(pdev); | |
738 | pci_disable_device(pdev); | |
8c863944 | 739 | pci_ignore_hotplug(pdev); |
7bb6d442 BS |
740 | pci_set_power_state(pdev, PCI_D3cold); |
741 | drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; | |
742 | return ret; | |
743 | } | |
744 | ||
745 | static int | |
746 | nouveau_pmops_runtime_resume(struct device *dev) | |
747 | { | |
748 | struct pci_dev *pdev = to_pci_dev(dev); | |
749 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
750 | struct nvif_device *device = &nouveau_drm(drm_dev)->device; | |
751 | int ret; | |
752 | ||
753 | if (nouveau_runtime_pm == 0) | |
754 | return -EINVAL; | |
755 | ||
756 | pci_set_power_state(pdev, PCI_D0); | |
757 | pci_restore_state(pdev); | |
758 | ret = pci_enable_device(pdev); | |
759 | if (ret) | |
760 | return ret; | |
761 | pci_set_master(pdev); | |
762 | ||
763 | ret = nouveau_do_resume(drm_dev, true); | |
764 | drm_kms_helper_poll_enable(drm_dev); | |
765 | /* do magic */ | |
766 | nvif_mask(device, 0x88488, (1 << 25), (1 << 25)); | |
767 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); | |
768 | drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; | |
7bb6d442 BS |
769 | return ret; |
770 | } | |
771 | ||
772 | static int | |
773 | nouveau_pmops_runtime_idle(struct device *dev) | |
774 | { | |
775 | struct pci_dev *pdev = to_pci_dev(dev); | |
776 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
777 | struct nouveau_drm *drm = nouveau_drm(drm_dev); | |
778 | struct drm_crtc *crtc; | |
779 | ||
780 | if (nouveau_runtime_pm == 0) { | |
781 | pm_runtime_forbid(dev); | |
782 | return -EBUSY; | |
783 | } | |
784 | ||
785 | /* are we optimus enabled? */ | |
786 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
787 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
788 | pm_runtime_forbid(dev); | |
789 | return -EBUSY; | |
790 | } | |
791 | ||
792 | /* if we have a hdmi audio device - make sure it has a driver loaded */ | |
793 | if (drm->hdmi_device) { | |
794 | if (!drm->hdmi_device->driver) { | |
795 | DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n"); | |
796 | pm_runtime_mark_last_busy(dev); | |
797 | return -EBUSY; | |
798 | } | |
799 | } | |
800 | ||
801 | list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) { | |
802 | if (crtc->enabled) { | |
803 | DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); | |
804 | return -EBUSY; | |
805 | } | |
806 | } | |
807 | pm_runtime_mark_last_busy(dev); | |
808 | pm_runtime_autosuspend(dev); | |
809 | /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ | |
810 | return 1; | |
811 | } | |
2d8b9ccb | 812 | |
5b8a43ae | 813 | static int |
ebb945a9 BS |
814 | nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) |
815 | { | |
ebb945a9 BS |
816 | struct nouveau_drm *drm = nouveau_drm(dev); |
817 | struct nouveau_cli *cli; | |
a2896ced | 818 | char name[32], tmpname[TASK_COMM_LEN]; |
ebb945a9 BS |
819 | int ret; |
820 | ||
5addcf0a DA |
821 | /* need to bring up power immediately if opening device */ |
822 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 823 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
824 | return ret; |
825 | ||
a2896ced MS |
826 | get_task_comm(tmpname, current); |
827 | snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); | |
fa6df8c1 | 828 | |
9ad97ede | 829 | ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli); |
420b9469 | 830 | |
ebb945a9 | 831 | if (ret) |
5addcf0a | 832 | goto out_suspend; |
ebb945a9 | 833 | |
0ad72863 BS |
834 | cli->base.super = false; |
835 | ||
967e7bde | 836 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
be83cd4e BS |
837 | ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40), |
838 | 0x1000, &cli->vm); | |
ebb945a9 BS |
839 | if (ret) { |
840 | nouveau_cli_destroy(cli); | |
5addcf0a | 841 | goto out_suspend; |
ebb945a9 | 842 | } |
3ee6f5b5 | 843 | |
989aa5b7 | 844 | nvxx_client(&cli->base)->vm = cli->vm; |
ebb945a9 BS |
845 | } |
846 | ||
847 | fpriv->driver_priv = cli; | |
848 | ||
849 | mutex_lock(&drm->client.mutex); | |
850 | list_add(&cli->head, &drm->clients); | |
851 | mutex_unlock(&drm->client.mutex); | |
5addcf0a DA |
852 | |
853 | out_suspend: | |
854 | pm_runtime_mark_last_busy(dev->dev); | |
855 | pm_runtime_put_autosuspend(dev->dev); | |
856 | ||
857 | return ret; | |
ebb945a9 BS |
858 | } |
859 | ||
5b8a43ae | 860 | static void |
ebb945a9 BS |
861 | nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv) |
862 | { | |
863 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
864 | struct nouveau_drm *drm = nouveau_drm(dev); | |
865 | ||
5addcf0a DA |
866 | pm_runtime_get_sync(dev->dev); |
867 | ||
ac8c7930 | 868 | mutex_lock(&cli->mutex); |
ebb945a9 BS |
869 | if (cli->abi16) |
870 | nouveau_abi16_fini(cli->abi16); | |
ac8c7930 | 871 | mutex_unlock(&cli->mutex); |
ebb945a9 BS |
872 | |
873 | mutex_lock(&drm->client.mutex); | |
874 | list_del(&cli->head); | |
875 | mutex_unlock(&drm->client.mutex); | |
5addcf0a | 876 | |
ebb945a9 BS |
877 | } |
878 | ||
5b8a43ae | 879 | static void |
ebb945a9 BS |
880 | nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) |
881 | { | |
882 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
883 | nouveau_cli_destroy(cli); | |
5addcf0a DA |
884 | pm_runtime_mark_last_busy(dev->dev); |
885 | pm_runtime_put_autosuspend(dev->dev); | |
ebb945a9 BS |
886 | } |
887 | ||
baa70943 | 888 | static const struct drm_ioctl_desc |
77145f1c | 889 | nouveau_ioctls[] = { |
7d761258 | 890 | DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
77145f1c | 891 | DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
7d761258 MP |
892 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
893 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
894 | DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
895 | DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
896 | DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
897 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
898 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
899 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
900 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
901 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
77145f1c BS |
902 | }; |
903 | ||
27111a23 BS |
904 | long |
905 | nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
5addcf0a | 906 | { |
27111a23 BS |
907 | struct drm_file *filp = file->private_data; |
908 | struct drm_device *dev = filp->minor->dev; | |
5addcf0a | 909 | long ret; |
5addcf0a DA |
910 | |
911 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 912 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
913 | return ret; |
914 | ||
27111a23 BS |
915 | switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { |
916 | case DRM_NOUVEAU_NVIF: | |
917 | ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); | |
918 | break; | |
919 | default: | |
920 | ret = drm_ioctl(file, cmd, arg); | |
921 | break; | |
922 | } | |
5addcf0a DA |
923 | |
924 | pm_runtime_mark_last_busy(dev->dev); | |
925 | pm_runtime_put_autosuspend(dev->dev); | |
926 | return ret; | |
927 | } | |
27111a23 | 928 | |
77145f1c BS |
929 | static const struct file_operations |
930 | nouveau_driver_fops = { | |
931 | .owner = THIS_MODULE, | |
932 | .open = drm_open, | |
933 | .release = drm_release, | |
5addcf0a | 934 | .unlocked_ioctl = nouveau_drm_ioctl, |
77145f1c BS |
935 | .mmap = nouveau_ttm_mmap, |
936 | .poll = drm_poll, | |
77145f1c BS |
937 | .read = drm_read, |
938 | #if defined(CONFIG_COMPAT) | |
939 | .compat_ioctl = nouveau_compat_ioctl, | |
940 | #endif | |
941 | .llseek = noop_llseek, | |
942 | }; | |
943 | ||
944 | static struct drm_driver | |
915b4d11 | 945 | driver_stub = { |
77145f1c | 946 | .driver_features = |
4cb4ea39 | 947 | DRIVER_USE_AGP | |
0e975980 PA |
948 | DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER | |
949 | DRIVER_KMS_LEGACY_CONTEXT, | |
77145f1c BS |
950 | |
951 | .load = nouveau_drm_load, | |
952 | .unload = nouveau_drm_unload, | |
953 | .open = nouveau_drm_open, | |
954 | .preclose = nouveau_drm_preclose, | |
955 | .postclose = nouveau_drm_postclose, | |
956 | .lastclose = nouveau_vga_lastclose, | |
957 | ||
33b903e8 MS |
958 | #if defined(CONFIG_DEBUG_FS) |
959 | .debugfs_init = nouveau_debugfs_init, | |
960 | .debugfs_cleanup = nouveau_debugfs_takedown, | |
961 | #endif | |
962 | ||
77145f1c | 963 | .get_vblank_counter = drm_vblank_count, |
51cb4b39 BS |
964 | .enable_vblank = nouveau_display_vblank_enable, |
965 | .disable_vblank = nouveau_display_vblank_disable, | |
d83ef853 BS |
966 | .get_scanout_position = nouveau_display_scanoutpos, |
967 | .get_vblank_timestamp = nouveau_display_vblstamp, | |
77145f1c BS |
968 | |
969 | .ioctls = nouveau_ioctls, | |
baa70943 | 970 | .num_ioctls = ARRAY_SIZE(nouveau_ioctls), |
77145f1c BS |
971 | .fops = &nouveau_driver_fops, |
972 | ||
973 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
974 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
ab9ccb96 AP |
975 | .gem_prime_export = drm_gem_prime_export, |
976 | .gem_prime_import = drm_gem_prime_import, | |
977 | .gem_prime_pin = nouveau_gem_prime_pin, | |
3aac4502 | 978 | .gem_prime_res_obj = nouveau_gem_prime_res_obj, |
1af7c7dd | 979 | .gem_prime_unpin = nouveau_gem_prime_unpin, |
ab9ccb96 AP |
980 | .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, |
981 | .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, | |
982 | .gem_prime_vmap = nouveau_gem_prime_vmap, | |
983 | .gem_prime_vunmap = nouveau_gem_prime_vunmap, | |
77145f1c | 984 | |
77145f1c BS |
985 | .gem_free_object = nouveau_gem_object_del, |
986 | .gem_open_object = nouveau_gem_object_open, | |
987 | .gem_close_object = nouveau_gem_object_close, | |
988 | ||
989 | .dumb_create = nouveau_display_dumb_create, | |
990 | .dumb_map_offset = nouveau_display_dumb_map_offset, | |
43387b37 | 991 | .dumb_destroy = drm_gem_dumb_destroy, |
77145f1c BS |
992 | |
993 | .name = DRIVER_NAME, | |
994 | .desc = DRIVER_DESC, | |
995 | #ifdef GIT_REVISION | |
996 | .date = GIT_REVISION, | |
997 | #else | |
998 | .date = DRIVER_DATE, | |
999 | #endif | |
1000 | .major = DRIVER_MAJOR, | |
1001 | .minor = DRIVER_MINOR, | |
1002 | .patchlevel = DRIVER_PATCHLEVEL, | |
1003 | }; | |
1004 | ||
94580299 BS |
1005 | static struct pci_device_id |
1006 | nouveau_drm_pci_table[] = { | |
1007 | { | |
1008 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), | |
1009 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
1010 | .class_mask = 0xff << 16, | |
1011 | }, | |
1012 | { | |
1013 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), | |
1014 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
1015 | .class_mask = 0xff << 16, | |
1016 | }, | |
1017 | {} | |
1018 | }; | |
1019 | ||
703fa264 PM |
1020 | static void nouveau_display_options(void) |
1021 | { | |
1022 | DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); | |
1023 | ||
1024 | DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); | |
1025 | DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); | |
1026 | DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); | |
1027 | DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel); | |
1028 | DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); | |
1029 | DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); | |
1030 | DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); | |
1031 | DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); | |
1032 | DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); | |
1033 | DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); | |
1034 | DRM_DEBUG_DRIVER("... pstate : %d\n", nouveau_pstate); | |
1035 | } | |
1036 | ||
2d8b9ccb DA |
1037 | static const struct dev_pm_ops nouveau_pm_ops = { |
1038 | .suspend = nouveau_pmops_suspend, | |
1039 | .resume = nouveau_pmops_resume, | |
1040 | .freeze = nouveau_pmops_freeze, | |
1041 | .thaw = nouveau_pmops_thaw, | |
1042 | .poweroff = nouveau_pmops_freeze, | |
1043 | .restore = nouveau_pmops_resume, | |
5addcf0a DA |
1044 | .runtime_suspend = nouveau_pmops_runtime_suspend, |
1045 | .runtime_resume = nouveau_pmops_runtime_resume, | |
1046 | .runtime_idle = nouveau_pmops_runtime_idle, | |
2d8b9ccb DA |
1047 | }; |
1048 | ||
94580299 BS |
1049 | static struct pci_driver |
1050 | nouveau_drm_pci_driver = { | |
1051 | .name = "nouveau", | |
1052 | .id_table = nouveau_drm_pci_table, | |
1053 | .probe = nouveau_drm_probe, | |
1054 | .remove = nouveau_drm_remove, | |
2d8b9ccb | 1055 | .driver.pm = &nouveau_pm_ops, |
94580299 BS |
1056 | }; |
1057 | ||
8ba9ff11 | 1058 | struct drm_device * |
47b2505e BS |
1059 | nouveau_platform_device_create(struct platform_device *pdev, |
1060 | struct nvkm_device **pdevice) | |
420b9469 | 1061 | { |
8ba9ff11 AC |
1062 | struct drm_device *drm; |
1063 | int err; | |
420b9469 | 1064 | |
47b2505e BS |
1065 | err = nvkm_device_create(pdev, NVKM_BUS_PLATFORM, |
1066 | nouveau_platform_name(pdev), | |
1067 | dev_name(&pdev->dev), nouveau_config, | |
1068 | nouveau_debug, pdevice); | |
8ba9ff11 AC |
1069 | if (err) |
1070 | return ERR_PTR(err); | |
1071 | ||
915b4d11 | 1072 | drm = drm_dev_alloc(&driver_platform, &pdev->dev); |
8ba9ff11 AC |
1073 | if (!drm) { |
1074 | err = -ENOMEM; | |
1075 | goto err_free; | |
420b9469 AC |
1076 | } |
1077 | ||
8ba9ff11 AC |
1078 | err = drm_dev_set_unique(drm, "%s", dev_name(&pdev->dev)); |
1079 | if (err < 0) | |
1080 | goto err_free; | |
1081 | ||
1082 | drm->platformdev = pdev; | |
1083 | platform_set_drvdata(pdev, drm); | |
1084 | ||
1085 | return drm; | |
1086 | ||
1087 | err_free: | |
47b2505e | 1088 | nvkm_object_ref(NULL, (struct nvkm_object **)pdevice); |
8ba9ff11 AC |
1089 | |
1090 | return ERR_PTR(err); | |
420b9469 AC |
1091 | } |
1092 | ||
94580299 BS |
1093 | static int __init |
1094 | nouveau_drm_init(void) | |
1095 | { | |
915b4d11 DH |
1096 | driver_pci = driver_stub; |
1097 | driver_pci.set_busid = drm_pci_set_busid; | |
1098 | driver_platform = driver_stub; | |
1099 | driver_platform.set_busid = drm_platform_set_busid; | |
1100 | ||
703fa264 PM |
1101 | nouveau_display_options(); |
1102 | ||
77145f1c BS |
1103 | if (nouveau_modeset == -1) { |
1104 | #ifdef CONFIG_VGA_CONSOLE | |
1105 | if (vgacon_text_force()) | |
1106 | nouveau_modeset = 0; | |
77145f1c | 1107 | #endif |
77145f1c BS |
1108 | } |
1109 | ||
1110 | if (!nouveau_modeset) | |
1111 | return 0; | |
1112 | ||
055a65d5 AC |
1113 | #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER |
1114 | platform_driver_register(&nouveau_platform_driver); | |
1115 | #endif | |
1116 | ||
77145f1c | 1117 | nouveau_register_dsm_handler(); |
915b4d11 | 1118 | return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver); |
94580299 BS |
1119 | } |
1120 | ||
1121 | static void __exit | |
1122 | nouveau_drm_exit(void) | |
1123 | { | |
77145f1c BS |
1124 | if (!nouveau_modeset) |
1125 | return; | |
1126 | ||
915b4d11 | 1127 | drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver); |
77145f1c | 1128 | nouveau_unregister_dsm_handler(); |
055a65d5 AC |
1129 | |
1130 | #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER | |
1131 | platform_driver_unregister(&nouveau_platform_driver); | |
1132 | #endif | |
94580299 BS |
1133 | } |
1134 | ||
1135 | module_init(nouveau_drm_init); | |
1136 | module_exit(nouveau_drm_exit); | |
1137 | ||
1138 | MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); | |
77145f1c BS |
1139 | MODULE_AUTHOR(DRIVER_AUTHOR); |
1140 | MODULE_DESCRIPTION(DRIVER_DESC); | |
94580299 | 1141 | MODULE_LICENSE("GPL and additional rights"); |