Commit | Line | Data |
---|---|---|
94580299 BS |
1 | /* |
2 | * Copyright 2012 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
77145f1c | 25 | #include <linux/console.h> |
c5fd936e | 26 | #include <linux/delay.h> |
94580299 BS |
27 | #include <linux/module.h> |
28 | #include <linux/pci.h> | |
5addcf0a DA |
29 | #include <linux/pm_runtime.h> |
30 | #include <linux/vga_switcheroo.h> | |
fdb751ef | 31 | |
5addcf0a DA |
32 | #include "drmP.h" |
33 | #include "drm_crtc_helper.h" | |
fdb751ef | 34 | |
94580299 | 35 | #include <core/device.h> |
ebb945a9 | 36 | #include <core/gpuobj.h> |
c33e05a1 | 37 | #include <core/option.h> |
94580299 | 38 | |
94580299 | 39 | #include "nouveau_drm.h" |
ebb945a9 | 40 | #include "nouveau_dma.h" |
77145f1c BS |
41 | #include "nouveau_ttm.h" |
42 | #include "nouveau_gem.h" | |
cb75d97e | 43 | #include "nouveau_agp.h" |
77145f1c | 44 | #include "nouveau_vga.h" |
26fdd78c | 45 | #include "nouveau_sysfs.h" |
b9ed919f | 46 | #include "nouveau_hwmon.h" |
77145f1c BS |
47 | #include "nouveau_acpi.h" |
48 | #include "nouveau_bios.h" | |
49 | #include "nouveau_ioctl.h" | |
ebb945a9 BS |
50 | #include "nouveau_abi16.h" |
51 | #include "nouveau_fbcon.h" | |
52 | #include "nouveau_fence.h" | |
33b903e8 | 53 | #include "nouveau_debugfs.h" |
27111a23 | 54 | #include "nouveau_usif.h" |
703fa264 | 55 | #include "nouveau_connector.h" |
055a65d5 | 56 | #include "nouveau_platform.h" |
ebb945a9 | 57 | |
94580299 BS |
58 | MODULE_PARM_DESC(config, "option string to pass to driver core"); |
59 | static char *nouveau_config; | |
60 | module_param_named(config, nouveau_config, charp, 0400); | |
61 | ||
62 | MODULE_PARM_DESC(debug, "debug string to pass to driver core"); | |
63 | static char *nouveau_debug; | |
64 | module_param_named(debug, nouveau_debug, charp, 0400); | |
65 | ||
ebb945a9 BS |
66 | MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration"); |
67 | static int nouveau_noaccel = 0; | |
68 | module_param_named(noaccel, nouveau_noaccel, int, 0400); | |
69 | ||
9430738d BS |
70 | MODULE_PARM_DESC(modeset, "enable driver (default: auto, " |
71 | "0 = disabled, 1 = enabled, 2 = headless)"); | |
72 | int nouveau_modeset = -1; | |
77145f1c BS |
73 | module_param_named(modeset, nouveau_modeset, int, 0400); |
74 | ||
5addcf0a DA |
75 | MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)"); |
76 | int nouveau_runtime_pm = -1; | |
77 | module_param_named(runpm, nouveau_runtime_pm, int, 0400); | |
78 | ||
915b4d11 DH |
79 | static struct drm_driver driver_stub; |
80 | static struct drm_driver driver_pci; | |
81 | static struct drm_driver driver_platform; | |
77145f1c | 82 | |
94580299 | 83 | static u64 |
420b9469 | 84 | nouveau_pci_name(struct pci_dev *pdev) |
94580299 BS |
85 | { |
86 | u64 name = (u64)pci_domain_nr(pdev->bus) << 32; | |
87 | name |= pdev->bus->number << 16; | |
88 | name |= PCI_SLOT(pdev->devfn) << 8; | |
89 | return name | PCI_FUNC(pdev->devfn); | |
90 | } | |
91 | ||
420b9469 AC |
92 | static u64 |
93 | nouveau_platform_name(struct platform_device *platformdev) | |
94 | { | |
95 | return platformdev->id; | |
96 | } | |
97 | ||
98 | static u64 | |
99 | nouveau_name(struct drm_device *dev) | |
100 | { | |
101 | if (dev->pdev) | |
102 | return nouveau_pci_name(dev->pdev); | |
103 | else | |
104 | return nouveau_platform_name(dev->platformdev); | |
105 | } | |
106 | ||
94580299 | 107 | static int |
9ad97ede | 108 | nouveau_cli_create(struct drm_device *dev, const char *sname, |
fa6df8c1 | 109 | int size, void **pcli) |
94580299 | 110 | { |
0ad72863 | 111 | struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL); |
9ad97ede | 112 | int ret; |
0ad72863 | 113 | if (cli) { |
9ad97ede BS |
114 | snprintf(cli->name, sizeof(cli->name), "%s", sname); |
115 | cli->dev = dev; | |
116 | ||
a01ca78c | 117 | ret = nvif_client_init(NULL, cli->name, nouveau_name(dev), |
9ad97ede BS |
118 | nouveau_config, nouveau_debug, |
119 | &cli->base); | |
27111a23 | 120 | if (ret == 0) { |
0ad72863 | 121 | mutex_init(&cli->mutex); |
27111a23 BS |
122 | usif_client_init(cli); |
123 | } | |
94580299 | 124 | return ret; |
dd5700ea | 125 | } |
0ad72863 | 126 | return -ENOMEM; |
94580299 BS |
127 | } |
128 | ||
129 | static void | |
130 | nouveau_cli_destroy(struct nouveau_cli *cli) | |
131 | { | |
be83cd4e | 132 | nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL); |
0ad72863 | 133 | nvif_client_fini(&cli->base); |
27111a23 | 134 | usif_client_fini(cli); |
f5654d95 | 135 | kfree(cli); |
94580299 BS |
136 | } |
137 | ||
ebb945a9 BS |
138 | static void |
139 | nouveau_accel_fini(struct nouveau_drm *drm) | |
140 | { | |
ebb945a9 | 141 | nouveau_channel_del(&drm->channel); |
0ad72863 | 142 | nvif_object_fini(&drm->ntfy); |
be83cd4e | 143 | nvkm_gpuobj_ref(NULL, &drm->notify); |
0ad72863 | 144 | nvif_object_fini(&drm->nvsw); |
49981046 | 145 | nouveau_channel_del(&drm->cechan); |
0ad72863 | 146 | nvif_object_fini(&drm->ttm.copy); |
ebb945a9 BS |
147 | if (drm->fence) |
148 | nouveau_fence(drm)->dtor(drm); | |
149 | } | |
150 | ||
151 | static void | |
152 | nouveau_accel_init(struct nouveau_drm *drm) | |
153 | { | |
967e7bde | 154 | struct nvif_device *device = &drm->device; |
49981046 | 155 | u32 arg0, arg1; |
315a8b2e | 156 | s32 sclass[16]; |
967e7bde | 157 | int ret, i; |
ebb945a9 | 158 | |
967e7bde | 159 | if (nouveau_noaccel) |
ebb945a9 BS |
160 | return; |
161 | ||
162 | /* initialise synchronisation routines */ | |
967e7bde BS |
163 | /*XXX: this is crap, but the fence/channel stuff is a little |
164 | * backwards in some places. this will be fixed. | |
165 | */ | |
a01ca78c | 166 | ret = nvif_object_sclass(&device->object, sclass, ARRAY_SIZE(sclass)); |
967e7bde BS |
167 | if (ret < 0) |
168 | return; | |
169 | ||
170 | for (ret = -ENOSYS, i = 0; ret && i < ARRAY_SIZE(sclass); i++) { | |
171 | switch (sclass[i]) { | |
bbf8906b | 172 | case NV03_CHANNEL_DMA: |
967e7bde BS |
173 | ret = nv04_fence_create(drm); |
174 | break; | |
bbf8906b | 175 | case NV10_CHANNEL_DMA: |
967e7bde BS |
176 | ret = nv10_fence_create(drm); |
177 | break; | |
bbf8906b BS |
178 | case NV17_CHANNEL_DMA: |
179 | case NV40_CHANNEL_DMA: | |
967e7bde BS |
180 | ret = nv17_fence_create(drm); |
181 | break; | |
bbf8906b | 182 | case NV50_CHANNEL_GPFIFO: |
967e7bde BS |
183 | ret = nv50_fence_create(drm); |
184 | break; | |
bbf8906b | 185 | case G82_CHANNEL_GPFIFO: |
967e7bde BS |
186 | ret = nv84_fence_create(drm); |
187 | break; | |
bbf8906b BS |
188 | case FERMI_CHANNEL_GPFIFO: |
189 | case KEPLER_CHANNEL_GPFIFO_A: | |
a1020afe | 190 | case MAXWELL_CHANNEL_GPFIFO_A: |
967e7bde BS |
191 | ret = nvc0_fence_create(drm); |
192 | break; | |
193 | default: | |
194 | break; | |
195 | } | |
196 | } | |
197 | ||
ebb945a9 BS |
198 | if (ret) { |
199 | NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret); | |
200 | nouveau_accel_fini(drm); | |
201 | return; | |
202 | } | |
203 | ||
967e7bde | 204 | if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) { |
0ad72863 | 205 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1, |
bbf8906b BS |
206 | KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0| |
207 | KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1, | |
208 | 0, &drm->cechan); | |
49981046 BS |
209 | if (ret) |
210 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
211 | ||
bbf8906b | 212 | arg0 = KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR; |
49469800 | 213 | arg1 = 1; |
00fc6f6f | 214 | } else |
967e7bde BS |
215 | if (device->info.chipset >= 0xa3 && |
216 | device->info.chipset != 0xaa && | |
217 | device->info.chipset != 0xac) { | |
0ad72863 BS |
218 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1, |
219 | NvDmaFB, NvDmaTT, &drm->cechan); | |
00fc6f6f BS |
220 | if (ret) |
221 | NV_ERROR(drm, "failed to create ce channel, %d\n", ret); | |
222 | ||
223 | arg0 = NvDmaFB; | |
224 | arg1 = NvDmaTT; | |
49981046 BS |
225 | } else { |
226 | arg0 = NvDmaFB; | |
227 | arg1 = NvDmaTT; | |
228 | } | |
229 | ||
0ad72863 BS |
230 | ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN, arg0, arg1, |
231 | &drm->channel); | |
ebb945a9 BS |
232 | if (ret) { |
233 | NV_ERROR(drm, "failed to create kernel channel, %d\n", ret); | |
234 | nouveau_accel_fini(drm); | |
235 | return; | |
236 | } | |
237 | ||
a01ca78c | 238 | ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW, |
0ad72863 | 239 | nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw); |
69a6146d | 240 | if (ret == 0) { |
be83cd4e | 241 | struct nvkm_sw_chan *swch; |
69a6146d BS |
242 | ret = RING_SPACE(drm->channel, 2); |
243 | if (ret == 0) { | |
967e7bde | 244 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
69a6146d BS |
245 | BEGIN_NV04(drm->channel, NvSubSw, 0, 1); |
246 | OUT_RING (drm->channel, NVDRM_NVSW); | |
247 | } else | |
967e7bde | 248 | if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) { |
69a6146d BS |
249 | BEGIN_NVC0(drm->channel, FermiSw, 0, 1); |
250 | OUT_RING (drm->channel, 0x001f0000); | |
251 | } | |
252 | } | |
989aa5b7 | 253 | swch = (void *)nvxx_object(&drm->nvsw)->parent; |
69a6146d BS |
254 | swch->flip = nouveau_flip_complete; |
255 | swch->flip_data = drm->channel; | |
256 | } | |
257 | ||
258 | if (ret) { | |
259 | NV_ERROR(drm, "failed to allocate software object, %d\n", ret); | |
260 | nouveau_accel_fini(drm); | |
261 | return; | |
262 | } | |
263 | ||
967e7bde | 264 | if (device->info.family < NV_DEVICE_INFO_V0_FERMI) { |
a01ca78c | 265 | ret = nvkm_gpuobj_new(nvxx_object(&drm->device.object), NULL, 32, |
be83cd4e | 266 | 0, 0, &drm->notify); |
ebb945a9 BS |
267 | if (ret) { |
268 | NV_ERROR(drm, "failed to allocate notifier, %d\n", ret); | |
269 | nouveau_accel_fini(drm); | |
270 | return; | |
271 | } | |
272 | ||
a01ca78c | 273 | ret = nvif_object_init(&drm->channel->user, NvNotify0, |
4acfd707 BS |
274 | NV_DMA_IN_MEMORY, |
275 | &(struct nv_dma_v0) { | |
276 | .target = NV_DMA_V0_TARGET_VRAM, | |
277 | .access = NV_DMA_V0_ACCESS_RDWR, | |
ebb945a9 BS |
278 | .start = drm->notify->addr, |
279 | .limit = drm->notify->addr + 31 | |
4acfd707 | 280 | }, sizeof(struct nv_dma_v0), |
0ad72863 | 281 | &drm->ntfy); |
ebb945a9 BS |
282 | if (ret) { |
283 | nouveau_accel_fini(drm); | |
284 | return; | |
285 | } | |
286 | } | |
287 | ||
288 | ||
49981046 | 289 | nouveau_bo_move_init(drm); |
ebb945a9 BS |
290 | } |
291 | ||
56550d94 GKH |
292 | static int nouveau_drm_probe(struct pci_dev *pdev, |
293 | const struct pci_device_id *pent) | |
94580299 | 294 | { |
be83cd4e | 295 | struct nvkm_device *device; |
ebb945a9 BS |
296 | struct apertures_struct *aper; |
297 | bool boot = false; | |
94580299 BS |
298 | int ret; |
299 | ||
ebb945a9 BS |
300 | /* remove conflicting drivers (vesafb, efifb etc) */ |
301 | aper = alloc_apertures(3); | |
302 | if (!aper) | |
303 | return -ENOMEM; | |
304 | ||
305 | aper->ranges[0].base = pci_resource_start(pdev, 1); | |
306 | aper->ranges[0].size = pci_resource_len(pdev, 1); | |
307 | aper->count = 1; | |
308 | ||
309 | if (pci_resource_len(pdev, 2)) { | |
310 | aper->ranges[aper->count].base = pci_resource_start(pdev, 2); | |
311 | aper->ranges[aper->count].size = pci_resource_len(pdev, 2); | |
312 | aper->count++; | |
313 | } | |
314 | ||
315 | if (pci_resource_len(pdev, 3)) { | |
316 | aper->ranges[aper->count].base = pci_resource_start(pdev, 3); | |
317 | aper->ranges[aper->count].size = pci_resource_len(pdev, 3); | |
318 | aper->count++; | |
319 | } | |
320 | ||
321 | #ifdef CONFIG_X86 | |
322 | boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW; | |
323 | #endif | |
771fa0e4 BS |
324 | if (nouveau_modeset != 2) |
325 | remove_conflicting_framebuffers(aper, "nouveaufb", boot); | |
83ef7777 | 326 | kfree(aper); |
ebb945a9 | 327 | |
e781dc8f BS |
328 | ret = nvkm_device_new(pdev, NVKM_BUS_PCI, nouveau_pci_name(pdev), |
329 | pci_name(pdev), nouveau_config, nouveau_debug, | |
0ac9d210 | 330 | true, true, ~0ULL, &device); |
94580299 BS |
331 | if (ret) |
332 | return ret; | |
333 | ||
334 | pci_set_master(pdev); | |
335 | ||
915b4d11 | 336 | ret = drm_get_pci_dev(pdev, pent, &driver_pci); |
94580299 | 337 | if (ret) { |
e781dc8f | 338 | nvkm_device_del(&device); |
94580299 BS |
339 | return ret; |
340 | } | |
341 | ||
342 | return 0; | |
343 | } | |
344 | ||
5addcf0a DA |
345 | #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403 |
346 | ||
347 | static void | |
46941b0f | 348 | nouveau_get_hdmi_dev(struct nouveau_drm *drm) |
5addcf0a | 349 | { |
46941b0f | 350 | struct pci_dev *pdev = drm->dev->pdev; |
5addcf0a | 351 | |
420b9469 | 352 | if (!pdev) { |
40189b0c | 353 | DRM_INFO("not a PCI device; no HDMI\n"); |
420b9469 AC |
354 | drm->hdmi_device = NULL; |
355 | return; | |
356 | } | |
357 | ||
5addcf0a DA |
358 | /* subfunction one is a hdmi audio device? */ |
359 | drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number, | |
360 | PCI_DEVFN(PCI_SLOT(pdev->devfn), 1)); | |
361 | ||
362 | if (!drm->hdmi_device) { | |
46941b0f | 363 | NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1); |
5addcf0a DA |
364 | return; |
365 | } | |
366 | ||
367 | if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) { | |
46941b0f | 368 | NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class); |
5addcf0a DA |
369 | pci_dev_put(drm->hdmi_device); |
370 | drm->hdmi_device = NULL; | |
371 | return; | |
372 | } | |
373 | } | |
374 | ||
5b8a43ae | 375 | static int |
94580299 BS |
376 | nouveau_drm_load(struct drm_device *dev, unsigned long flags) |
377 | { | |
94580299 BS |
378 | struct nouveau_drm *drm; |
379 | int ret; | |
380 | ||
9ad97ede | 381 | ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm); |
94580299 BS |
382 | if (ret) |
383 | return ret; | |
384 | ||
77145f1c BS |
385 | dev->dev_private = drm; |
386 | drm->dev = dev; | |
989aa5b7 | 387 | nvxx_client(&drm->client.base)->debug = |
be83cd4e | 388 | nvkm_dbgopt(nouveau_debug, "DRM"); |
77145f1c | 389 | |
94580299 | 390 | INIT_LIST_HEAD(&drm->clients); |
ebb945a9 | 391 | spin_lock_init(&drm->tile.lock); |
94580299 | 392 | |
46941b0f | 393 | nouveau_get_hdmi_dev(drm); |
5addcf0a | 394 | |
a01ca78c BS |
395 | ret = nvif_device_init(&drm->client.base.object, |
396 | NVDRM_DEVICE, NV_DEVICE, | |
586491e6 | 397 | &(struct nv_device_v0) { |
94580299 | 398 | .device = ~0, |
586491e6 | 399 | }, sizeof(struct nv_device_v0), |
0ad72863 | 400 | &drm->device); |
94580299 BS |
401 | if (ret) |
402 | goto fail_device; | |
403 | ||
7d3428cd IM |
404 | dev->irq_enabled = true; |
405 | ||
77145f1c BS |
406 | /* workaround an odd issue on nvc1 by disabling the device's |
407 | * nosnoop capability. hopefully won't cause issues until a | |
408 | * better fix is found - assuming there is one... | |
409 | */ | |
967e7bde | 410 | if (drm->device.info.chipset == 0xc1) |
a01ca78c | 411 | nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000); |
ebb945a9 | 412 | |
77145f1c | 413 | nouveau_vga_init(drm); |
cb75d97e BS |
414 | nouveau_agp_init(drm); |
415 | ||
967e7bde | 416 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
be83cd4e BS |
417 | ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40), |
418 | 0x1000, &drm->client.vm); | |
ebb945a9 BS |
419 | if (ret) |
420 | goto fail_device; | |
3ee6f5b5 | 421 | |
989aa5b7 | 422 | nvxx_client(&drm->client.base)->vm = drm->client.vm; |
ebb945a9 BS |
423 | } |
424 | ||
425 | ret = nouveau_ttm_init(drm); | |
94580299 | 426 | if (ret) |
77145f1c BS |
427 | goto fail_ttm; |
428 | ||
429 | ret = nouveau_bios_init(dev); | |
430 | if (ret) | |
431 | goto fail_bios; | |
432 | ||
77145f1c | 433 | ret = nouveau_display_create(dev); |
ebb945a9 | 434 | if (ret) |
77145f1c BS |
435 | goto fail_dispctor; |
436 | ||
437 | if (dev->mode_config.num_crtc) { | |
438 | ret = nouveau_display_init(dev); | |
439 | if (ret) | |
440 | goto fail_dispinit; | |
441 | } | |
442 | ||
26fdd78c | 443 | nouveau_sysfs_init(dev); |
b9ed919f | 444 | nouveau_hwmon_init(dev); |
ebb945a9 BS |
445 | nouveau_accel_init(drm); |
446 | nouveau_fbcon_init(dev); | |
5addcf0a DA |
447 | |
448 | if (nouveau_runtime_pm != 0) { | |
449 | pm_runtime_use_autosuspend(dev->dev); | |
450 | pm_runtime_set_autosuspend_delay(dev->dev, 5000); | |
451 | pm_runtime_set_active(dev->dev); | |
452 | pm_runtime_allow(dev->dev); | |
453 | pm_runtime_mark_last_busy(dev->dev); | |
454 | pm_runtime_put(dev->dev); | |
455 | } | |
94580299 BS |
456 | return 0; |
457 | ||
77145f1c BS |
458 | fail_dispinit: |
459 | nouveau_display_destroy(dev); | |
460 | fail_dispctor: | |
77145f1c BS |
461 | nouveau_bios_takedown(dev); |
462 | fail_bios: | |
ebb945a9 | 463 | nouveau_ttm_fini(drm); |
77145f1c BS |
464 | fail_ttm: |
465 | nouveau_agp_fini(drm); | |
466 | nouveau_vga_fini(drm); | |
94580299 | 467 | fail_device: |
0ad72863 | 468 | nvif_device_fini(&drm->device); |
94580299 BS |
469 | nouveau_cli_destroy(&drm->client); |
470 | return ret; | |
471 | } | |
472 | ||
5b8a43ae | 473 | static int |
94580299 BS |
474 | nouveau_drm_unload(struct drm_device *dev) |
475 | { | |
77145f1c | 476 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 | 477 | |
5addcf0a | 478 | pm_runtime_get_sync(dev->dev); |
ebb945a9 BS |
479 | nouveau_fbcon_fini(dev); |
480 | nouveau_accel_fini(drm); | |
b9ed919f | 481 | nouveau_hwmon_fini(dev); |
26fdd78c | 482 | nouveau_sysfs_fini(dev); |
77145f1c | 483 | |
9430738d BS |
484 | if (dev->mode_config.num_crtc) |
485 | nouveau_display_fini(dev); | |
77145f1c BS |
486 | nouveau_display_destroy(dev); |
487 | ||
77145f1c | 488 | nouveau_bios_takedown(dev); |
94580299 | 489 | |
ebb945a9 | 490 | nouveau_ttm_fini(drm); |
cb75d97e | 491 | nouveau_agp_fini(drm); |
77145f1c | 492 | nouveau_vga_fini(drm); |
cb75d97e | 493 | |
0ad72863 | 494 | nvif_device_fini(&drm->device); |
5addcf0a DA |
495 | if (drm->hdmi_device) |
496 | pci_dev_put(drm->hdmi_device); | |
94580299 BS |
497 | nouveau_cli_destroy(&drm->client); |
498 | return 0; | |
499 | } | |
500 | ||
8ba9ff11 AC |
501 | void |
502 | nouveau_drm_device_remove(struct drm_device *dev) | |
94580299 | 503 | { |
77145f1c | 504 | struct nouveau_drm *drm = nouveau_drm(dev); |
be83cd4e | 505 | struct nvkm_client *client; |
76ecea5b | 506 | struct nvkm_device *device; |
77145f1c | 507 | |
7d3428cd | 508 | dev->irq_enabled = false; |
989aa5b7 | 509 | client = nvxx_client(&drm->client.base); |
4e7e62d6 | 510 | device = nvkm_device_find(client->device); |
77145f1c BS |
511 | drm_put_dev(dev); |
512 | ||
e781dc8f | 513 | nvkm_device_del(&device); |
94580299 | 514 | } |
8ba9ff11 AC |
515 | |
516 | static void | |
517 | nouveau_drm_remove(struct pci_dev *pdev) | |
518 | { | |
519 | struct drm_device *dev = pci_get_drvdata(pdev); | |
520 | ||
521 | nouveau_drm_device_remove(dev); | |
522 | } | |
94580299 | 523 | |
cd897837 | 524 | static int |
05c63c2f | 525 | nouveau_do_suspend(struct drm_device *dev, bool runtime) |
94580299 | 526 | { |
77145f1c | 527 | struct nouveau_drm *drm = nouveau_drm(dev); |
94580299 BS |
528 | struct nouveau_cli *cli; |
529 | int ret; | |
530 | ||
6fbb702e BS |
531 | if (dev->mode_config.num_crtc) { |
532 | NV_INFO(drm, "suspending console...\n"); | |
533 | nouveau_fbcon_set_suspend(dev, 1); | |
c52f4fa6 | 534 | NV_INFO(drm, "suspending display...\n"); |
6fbb702e | 535 | ret = nouveau_display_suspend(dev, runtime); |
9430738d BS |
536 | if (ret) |
537 | return ret; | |
538 | } | |
94580299 | 539 | |
c52f4fa6 | 540 | NV_INFO(drm, "evicting buffers...\n"); |
ebb945a9 BS |
541 | ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM); |
542 | ||
c52f4fa6 | 543 | NV_INFO(drm, "waiting for kernel channels to go idle...\n"); |
81dff21b BS |
544 | if (drm->cechan) { |
545 | ret = nouveau_channel_idle(drm->cechan); | |
546 | if (ret) | |
f3980dc5 | 547 | goto fail_display; |
81dff21b BS |
548 | } |
549 | ||
550 | if (drm->channel) { | |
551 | ret = nouveau_channel_idle(drm->channel); | |
552 | if (ret) | |
f3980dc5 | 553 | goto fail_display; |
81dff21b BS |
554 | } |
555 | ||
c52f4fa6 | 556 | NV_INFO(drm, "suspending client object trees...\n"); |
ebb945a9 | 557 | if (drm->fence && nouveau_fence(drm)->suspend) { |
f3980dc5 IM |
558 | if (!nouveau_fence(drm)->suspend(drm)) { |
559 | ret = -ENOMEM; | |
560 | goto fail_display; | |
561 | } | |
ebb945a9 BS |
562 | } |
563 | ||
94580299 | 564 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 565 | ret = nvif_client_suspend(&cli->base); |
94580299 BS |
566 | if (ret) |
567 | goto fail_client; | |
568 | } | |
569 | ||
c52f4fa6 | 570 | NV_INFO(drm, "suspending kernel object tree...\n"); |
0ad72863 | 571 | ret = nvif_client_suspend(&drm->client.base); |
94580299 BS |
572 | if (ret) |
573 | goto fail_client; | |
574 | ||
cb75d97e | 575 | nouveau_agp_fini(drm); |
94580299 BS |
576 | return 0; |
577 | ||
578 | fail_client: | |
579 | list_for_each_entry_continue_reverse(cli, &drm->clients, head) { | |
0ad72863 | 580 | nvif_client_resume(&cli->base); |
94580299 BS |
581 | } |
582 | ||
f3980dc5 IM |
583 | if (drm->fence && nouveau_fence(drm)->resume) |
584 | nouveau_fence(drm)->resume(drm); | |
585 | ||
586 | fail_display: | |
9430738d | 587 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 588 | NV_INFO(drm, "resuming display...\n"); |
6fbb702e | 589 | nouveau_display_resume(dev, runtime); |
9430738d | 590 | } |
94580299 BS |
591 | return ret; |
592 | } | |
593 | ||
cd897837 | 594 | static int |
6fbb702e | 595 | nouveau_do_resume(struct drm_device *dev, bool runtime) |
2d8b9ccb DA |
596 | { |
597 | struct nouveau_drm *drm = nouveau_drm(dev); | |
598 | struct nouveau_cli *cli; | |
599 | ||
c52f4fa6 | 600 | NV_INFO(drm, "re-enabling device...\n"); |
94580299 | 601 | |
cb75d97e BS |
602 | nouveau_agp_reset(drm); |
603 | ||
c52f4fa6 | 604 | NV_INFO(drm, "resuming kernel object tree...\n"); |
0ad72863 | 605 | nvif_client_resume(&drm->client.base); |
ebb945a9 | 606 | nouveau_agp_init(drm); |
94580299 | 607 | |
c52f4fa6 | 608 | NV_INFO(drm, "resuming client object trees...\n"); |
81dff21b BS |
609 | if (drm->fence && nouveau_fence(drm)->resume) |
610 | nouveau_fence(drm)->resume(drm); | |
611 | ||
94580299 | 612 | list_for_each_entry(cli, &drm->clients, head) { |
0ad72863 | 613 | nvif_client_resume(&cli->base); |
94580299 | 614 | } |
cb75d97e | 615 | |
77145f1c | 616 | nouveau_run_vbios_init(dev); |
77145f1c | 617 | |
9430738d | 618 | if (dev->mode_config.num_crtc) { |
c52f4fa6 | 619 | NV_INFO(drm, "resuming display...\n"); |
6fbb702e BS |
620 | nouveau_display_resume(dev, runtime); |
621 | NV_INFO(drm, "resuming console...\n"); | |
622 | nouveau_fbcon_set_suspend(dev, 0); | |
9430738d | 623 | } |
5addcf0a | 624 | |
77145f1c | 625 | return 0; |
94580299 BS |
626 | } |
627 | ||
7bb6d442 BS |
628 | int |
629 | nouveau_pmops_suspend(struct device *dev) | |
630 | { | |
631 | struct pci_dev *pdev = to_pci_dev(dev); | |
632 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
633 | int ret; | |
634 | ||
635 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || | |
636 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
637 | return 0; | |
638 | ||
639 | ret = nouveau_do_suspend(drm_dev, false); | |
640 | if (ret) | |
641 | return ret; | |
642 | ||
643 | pci_save_state(pdev); | |
644 | pci_disable_device(pdev); | |
7bb6d442 | 645 | pci_set_power_state(pdev, PCI_D3hot); |
c5fd936e | 646 | udelay(200); |
7bb6d442 BS |
647 | return 0; |
648 | } | |
649 | ||
650 | int | |
651 | nouveau_pmops_resume(struct device *dev) | |
2d8b9ccb DA |
652 | { |
653 | struct pci_dev *pdev = to_pci_dev(dev); | |
654 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
655 | int ret; | |
656 | ||
5addcf0a DA |
657 | if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF || |
658 | drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF) | |
2d8b9ccb DA |
659 | return 0; |
660 | ||
661 | pci_set_power_state(pdev, PCI_D0); | |
662 | pci_restore_state(pdev); | |
663 | ret = pci_enable_device(pdev); | |
664 | if (ret) | |
665 | return ret; | |
666 | pci_set_master(pdev); | |
667 | ||
6fbb702e | 668 | return nouveau_do_resume(drm_dev, false); |
2d8b9ccb DA |
669 | } |
670 | ||
7bb6d442 BS |
671 | static int |
672 | nouveau_pmops_freeze(struct device *dev) | |
2d8b9ccb DA |
673 | { |
674 | struct pci_dev *pdev = to_pci_dev(dev); | |
675 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
6fbb702e | 676 | return nouveau_do_suspend(drm_dev, false); |
2d8b9ccb DA |
677 | } |
678 | ||
7bb6d442 BS |
679 | static int |
680 | nouveau_pmops_thaw(struct device *dev) | |
2d8b9ccb DA |
681 | { |
682 | struct pci_dev *pdev = to_pci_dev(dev); | |
683 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
6fbb702e | 684 | return nouveau_do_resume(drm_dev, false); |
2d8b9ccb DA |
685 | } |
686 | ||
7bb6d442 BS |
687 | static int |
688 | nouveau_pmops_runtime_suspend(struct device *dev) | |
689 | { | |
690 | struct pci_dev *pdev = to_pci_dev(dev); | |
691 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
692 | int ret; | |
693 | ||
694 | if (nouveau_runtime_pm == 0) { | |
695 | pm_runtime_forbid(dev); | |
696 | return -EBUSY; | |
697 | } | |
698 | ||
699 | /* are we optimus enabled? */ | |
700 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
701 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
702 | pm_runtime_forbid(dev); | |
703 | return -EBUSY; | |
704 | } | |
705 | ||
7bb6d442 BS |
706 | drm_kms_helper_poll_disable(drm_dev); |
707 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF); | |
708 | nouveau_switcheroo_optimus_dsm(); | |
709 | ret = nouveau_do_suspend(drm_dev, true); | |
710 | pci_save_state(pdev); | |
711 | pci_disable_device(pdev); | |
8c863944 | 712 | pci_ignore_hotplug(pdev); |
7bb6d442 BS |
713 | pci_set_power_state(pdev, PCI_D3cold); |
714 | drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF; | |
715 | return ret; | |
716 | } | |
717 | ||
718 | static int | |
719 | nouveau_pmops_runtime_resume(struct device *dev) | |
720 | { | |
721 | struct pci_dev *pdev = to_pci_dev(dev); | |
722 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
723 | struct nvif_device *device = &nouveau_drm(drm_dev)->device; | |
724 | int ret; | |
725 | ||
726 | if (nouveau_runtime_pm == 0) | |
727 | return -EINVAL; | |
728 | ||
729 | pci_set_power_state(pdev, PCI_D0); | |
730 | pci_restore_state(pdev); | |
731 | ret = pci_enable_device(pdev); | |
732 | if (ret) | |
733 | return ret; | |
734 | pci_set_master(pdev); | |
735 | ||
736 | ret = nouveau_do_resume(drm_dev, true); | |
737 | drm_kms_helper_poll_enable(drm_dev); | |
738 | /* do magic */ | |
a01ca78c | 739 | nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25)); |
7bb6d442 BS |
740 | vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON); |
741 | drm_dev->switch_power_state = DRM_SWITCH_POWER_ON; | |
7bb6d442 BS |
742 | return ret; |
743 | } | |
744 | ||
745 | static int | |
746 | nouveau_pmops_runtime_idle(struct device *dev) | |
747 | { | |
748 | struct pci_dev *pdev = to_pci_dev(dev); | |
749 | struct drm_device *drm_dev = pci_get_drvdata(pdev); | |
750 | struct nouveau_drm *drm = nouveau_drm(drm_dev); | |
751 | struct drm_crtc *crtc; | |
752 | ||
753 | if (nouveau_runtime_pm == 0) { | |
754 | pm_runtime_forbid(dev); | |
755 | return -EBUSY; | |
756 | } | |
757 | ||
758 | /* are we optimus enabled? */ | |
759 | if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) { | |
760 | DRM_DEBUG_DRIVER("failing to power off - not optimus\n"); | |
761 | pm_runtime_forbid(dev); | |
762 | return -EBUSY; | |
763 | } | |
764 | ||
765 | /* if we have a hdmi audio device - make sure it has a driver loaded */ | |
766 | if (drm->hdmi_device) { | |
767 | if (!drm->hdmi_device->driver) { | |
768 | DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n"); | |
769 | pm_runtime_mark_last_busy(dev); | |
770 | return -EBUSY; | |
771 | } | |
772 | } | |
773 | ||
774 | list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) { | |
775 | if (crtc->enabled) { | |
776 | DRM_DEBUG_DRIVER("failing to power off - crtc active\n"); | |
777 | return -EBUSY; | |
778 | } | |
779 | } | |
780 | pm_runtime_mark_last_busy(dev); | |
781 | pm_runtime_autosuspend(dev); | |
782 | /* we don't want the main rpm_idle to call suspend - we want to autosuspend */ | |
783 | return 1; | |
784 | } | |
2d8b9ccb | 785 | |
5b8a43ae | 786 | static int |
ebb945a9 BS |
787 | nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv) |
788 | { | |
ebb945a9 BS |
789 | struct nouveau_drm *drm = nouveau_drm(dev); |
790 | struct nouveau_cli *cli; | |
a2896ced | 791 | char name[32], tmpname[TASK_COMM_LEN]; |
ebb945a9 BS |
792 | int ret; |
793 | ||
5addcf0a DA |
794 | /* need to bring up power immediately if opening device */ |
795 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 796 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
797 | return ret; |
798 | ||
a2896ced MS |
799 | get_task_comm(tmpname, current); |
800 | snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid)); | |
fa6df8c1 | 801 | |
9ad97ede | 802 | ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli); |
420b9469 | 803 | |
ebb945a9 | 804 | if (ret) |
5addcf0a | 805 | goto out_suspend; |
ebb945a9 | 806 | |
0ad72863 BS |
807 | cli->base.super = false; |
808 | ||
967e7bde | 809 | if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) { |
be83cd4e BS |
810 | ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40), |
811 | 0x1000, &cli->vm); | |
ebb945a9 BS |
812 | if (ret) { |
813 | nouveau_cli_destroy(cli); | |
5addcf0a | 814 | goto out_suspend; |
ebb945a9 | 815 | } |
3ee6f5b5 | 816 | |
989aa5b7 | 817 | nvxx_client(&cli->base)->vm = cli->vm; |
ebb945a9 BS |
818 | } |
819 | ||
820 | fpriv->driver_priv = cli; | |
821 | ||
822 | mutex_lock(&drm->client.mutex); | |
823 | list_add(&cli->head, &drm->clients); | |
824 | mutex_unlock(&drm->client.mutex); | |
5addcf0a DA |
825 | |
826 | out_suspend: | |
827 | pm_runtime_mark_last_busy(dev->dev); | |
828 | pm_runtime_put_autosuspend(dev->dev); | |
829 | ||
830 | return ret; | |
ebb945a9 BS |
831 | } |
832 | ||
5b8a43ae | 833 | static void |
ebb945a9 BS |
834 | nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv) |
835 | { | |
836 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
837 | struct nouveau_drm *drm = nouveau_drm(dev); | |
838 | ||
5addcf0a DA |
839 | pm_runtime_get_sync(dev->dev); |
840 | ||
ac8c7930 | 841 | mutex_lock(&cli->mutex); |
ebb945a9 BS |
842 | if (cli->abi16) |
843 | nouveau_abi16_fini(cli->abi16); | |
ac8c7930 | 844 | mutex_unlock(&cli->mutex); |
ebb945a9 BS |
845 | |
846 | mutex_lock(&drm->client.mutex); | |
847 | list_del(&cli->head); | |
848 | mutex_unlock(&drm->client.mutex); | |
5addcf0a | 849 | |
ebb945a9 BS |
850 | } |
851 | ||
5b8a43ae | 852 | static void |
ebb945a9 BS |
853 | nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv) |
854 | { | |
855 | struct nouveau_cli *cli = nouveau_cli(fpriv); | |
856 | nouveau_cli_destroy(cli); | |
5addcf0a DA |
857 | pm_runtime_mark_last_busy(dev->dev); |
858 | pm_runtime_put_autosuspend(dev->dev); | |
ebb945a9 BS |
859 | } |
860 | ||
baa70943 | 861 | static const struct drm_ioctl_desc |
77145f1c | 862 | nouveau_ioctls[] = { |
7d761258 | 863 | DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
77145f1c | 864 | DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
7d761258 MP |
865 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), |
866 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
867 | DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
868 | DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
869 | DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
870 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
871 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
872 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
873 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
874 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW), | |
77145f1c BS |
875 | }; |
876 | ||
27111a23 BS |
877 | long |
878 | nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |
5addcf0a | 879 | { |
27111a23 BS |
880 | struct drm_file *filp = file->private_data; |
881 | struct drm_device *dev = filp->minor->dev; | |
5addcf0a | 882 | long ret; |
5addcf0a DA |
883 | |
884 | ret = pm_runtime_get_sync(dev->dev); | |
b6c4285a | 885 | if (ret < 0 && ret != -EACCES) |
5addcf0a DA |
886 | return ret; |
887 | ||
27111a23 BS |
888 | switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) { |
889 | case DRM_NOUVEAU_NVIF: | |
890 | ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd)); | |
891 | break; | |
892 | default: | |
893 | ret = drm_ioctl(file, cmd, arg); | |
894 | break; | |
895 | } | |
5addcf0a DA |
896 | |
897 | pm_runtime_mark_last_busy(dev->dev); | |
898 | pm_runtime_put_autosuspend(dev->dev); | |
899 | return ret; | |
900 | } | |
27111a23 | 901 | |
77145f1c BS |
902 | static const struct file_operations |
903 | nouveau_driver_fops = { | |
904 | .owner = THIS_MODULE, | |
905 | .open = drm_open, | |
906 | .release = drm_release, | |
5addcf0a | 907 | .unlocked_ioctl = nouveau_drm_ioctl, |
77145f1c BS |
908 | .mmap = nouveau_ttm_mmap, |
909 | .poll = drm_poll, | |
77145f1c BS |
910 | .read = drm_read, |
911 | #if defined(CONFIG_COMPAT) | |
912 | .compat_ioctl = nouveau_compat_ioctl, | |
913 | #endif | |
914 | .llseek = noop_llseek, | |
915 | }; | |
916 | ||
917 | static struct drm_driver | |
915b4d11 | 918 | driver_stub = { |
77145f1c | 919 | .driver_features = |
4cb4ea39 | 920 | DRIVER_USE_AGP | |
0e975980 PA |
921 | DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER | |
922 | DRIVER_KMS_LEGACY_CONTEXT, | |
77145f1c BS |
923 | |
924 | .load = nouveau_drm_load, | |
925 | .unload = nouveau_drm_unload, | |
926 | .open = nouveau_drm_open, | |
927 | .preclose = nouveau_drm_preclose, | |
928 | .postclose = nouveau_drm_postclose, | |
929 | .lastclose = nouveau_vga_lastclose, | |
930 | ||
33b903e8 MS |
931 | #if defined(CONFIG_DEBUG_FS) |
932 | .debugfs_init = nouveau_debugfs_init, | |
933 | .debugfs_cleanup = nouveau_debugfs_takedown, | |
934 | #endif | |
935 | ||
77145f1c | 936 | .get_vblank_counter = drm_vblank_count, |
51cb4b39 BS |
937 | .enable_vblank = nouveau_display_vblank_enable, |
938 | .disable_vblank = nouveau_display_vblank_disable, | |
d83ef853 BS |
939 | .get_scanout_position = nouveau_display_scanoutpos, |
940 | .get_vblank_timestamp = nouveau_display_vblstamp, | |
77145f1c BS |
941 | |
942 | .ioctls = nouveau_ioctls, | |
baa70943 | 943 | .num_ioctls = ARRAY_SIZE(nouveau_ioctls), |
77145f1c BS |
944 | .fops = &nouveau_driver_fops, |
945 | ||
946 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, | |
947 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
ab9ccb96 AP |
948 | .gem_prime_export = drm_gem_prime_export, |
949 | .gem_prime_import = drm_gem_prime_import, | |
950 | .gem_prime_pin = nouveau_gem_prime_pin, | |
3aac4502 | 951 | .gem_prime_res_obj = nouveau_gem_prime_res_obj, |
1af7c7dd | 952 | .gem_prime_unpin = nouveau_gem_prime_unpin, |
ab9ccb96 AP |
953 | .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table, |
954 | .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table, | |
955 | .gem_prime_vmap = nouveau_gem_prime_vmap, | |
956 | .gem_prime_vunmap = nouveau_gem_prime_vunmap, | |
77145f1c | 957 | |
77145f1c BS |
958 | .gem_free_object = nouveau_gem_object_del, |
959 | .gem_open_object = nouveau_gem_object_open, | |
960 | .gem_close_object = nouveau_gem_object_close, | |
961 | ||
962 | .dumb_create = nouveau_display_dumb_create, | |
963 | .dumb_map_offset = nouveau_display_dumb_map_offset, | |
43387b37 | 964 | .dumb_destroy = drm_gem_dumb_destroy, |
77145f1c BS |
965 | |
966 | .name = DRIVER_NAME, | |
967 | .desc = DRIVER_DESC, | |
968 | #ifdef GIT_REVISION | |
969 | .date = GIT_REVISION, | |
970 | #else | |
971 | .date = DRIVER_DATE, | |
972 | #endif | |
973 | .major = DRIVER_MAJOR, | |
974 | .minor = DRIVER_MINOR, | |
975 | .patchlevel = DRIVER_PATCHLEVEL, | |
976 | }; | |
977 | ||
94580299 BS |
978 | static struct pci_device_id |
979 | nouveau_drm_pci_table[] = { | |
980 | { | |
981 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID), | |
982 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
983 | .class_mask = 0xff << 16, | |
984 | }, | |
985 | { | |
986 | PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID), | |
987 | .class = PCI_BASE_CLASS_DISPLAY << 16, | |
988 | .class_mask = 0xff << 16, | |
989 | }, | |
990 | {} | |
991 | }; | |
992 | ||
703fa264 PM |
993 | static void nouveau_display_options(void) |
994 | { | |
995 | DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n"); | |
996 | ||
997 | DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable); | |
998 | DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid); | |
999 | DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink); | |
1000 | DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel); | |
1001 | DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config); | |
1002 | DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug); | |
1003 | DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel); | |
1004 | DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset); | |
1005 | DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm); | |
1006 | DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf); | |
1007 | DRM_DEBUG_DRIVER("... pstate : %d\n", nouveau_pstate); | |
1008 | } | |
1009 | ||
2d8b9ccb DA |
1010 | static const struct dev_pm_ops nouveau_pm_ops = { |
1011 | .suspend = nouveau_pmops_suspend, | |
1012 | .resume = nouveau_pmops_resume, | |
1013 | .freeze = nouveau_pmops_freeze, | |
1014 | .thaw = nouveau_pmops_thaw, | |
1015 | .poweroff = nouveau_pmops_freeze, | |
1016 | .restore = nouveau_pmops_resume, | |
5addcf0a DA |
1017 | .runtime_suspend = nouveau_pmops_runtime_suspend, |
1018 | .runtime_resume = nouveau_pmops_runtime_resume, | |
1019 | .runtime_idle = nouveau_pmops_runtime_idle, | |
2d8b9ccb DA |
1020 | }; |
1021 | ||
94580299 BS |
1022 | static struct pci_driver |
1023 | nouveau_drm_pci_driver = { | |
1024 | .name = "nouveau", | |
1025 | .id_table = nouveau_drm_pci_table, | |
1026 | .probe = nouveau_drm_probe, | |
1027 | .remove = nouveau_drm_remove, | |
2d8b9ccb | 1028 | .driver.pm = &nouveau_pm_ops, |
94580299 BS |
1029 | }; |
1030 | ||
8ba9ff11 | 1031 | struct drm_device * |
47b2505e BS |
1032 | nouveau_platform_device_create(struct platform_device *pdev, |
1033 | struct nvkm_device **pdevice) | |
420b9469 | 1034 | { |
8ba9ff11 AC |
1035 | struct drm_device *drm; |
1036 | int err; | |
420b9469 | 1037 | |
e781dc8f BS |
1038 | err = nvkm_device_new(pdev, NVKM_BUS_PLATFORM, |
1039 | nouveau_platform_name(pdev), | |
1040 | dev_name(&pdev->dev), nouveau_config, | |
0ac9d210 BS |
1041 | nouveau_debug, true, true, ~0ULL, |
1042 | pdevice); | |
8ba9ff11 | 1043 | if (err) |
e781dc8f | 1044 | goto err_free; |
8ba9ff11 | 1045 | |
915b4d11 | 1046 | drm = drm_dev_alloc(&driver_platform, &pdev->dev); |
8ba9ff11 AC |
1047 | if (!drm) { |
1048 | err = -ENOMEM; | |
1049 | goto err_free; | |
420b9469 AC |
1050 | } |
1051 | ||
8ba9ff11 AC |
1052 | err = drm_dev_set_unique(drm, "%s", dev_name(&pdev->dev)); |
1053 | if (err < 0) | |
1054 | goto err_free; | |
1055 | ||
1056 | drm->platformdev = pdev; | |
1057 | platform_set_drvdata(pdev, drm); | |
1058 | ||
1059 | return drm; | |
1060 | ||
1061 | err_free: | |
e781dc8f | 1062 | nvkm_device_del(pdevice); |
8ba9ff11 AC |
1063 | |
1064 | return ERR_PTR(err); | |
420b9469 AC |
1065 | } |
1066 | ||
94580299 BS |
1067 | static int __init |
1068 | nouveau_drm_init(void) | |
1069 | { | |
915b4d11 DH |
1070 | driver_pci = driver_stub; |
1071 | driver_pci.set_busid = drm_pci_set_busid; | |
1072 | driver_platform = driver_stub; | |
1073 | driver_platform.set_busid = drm_platform_set_busid; | |
1074 | ||
703fa264 PM |
1075 | nouveau_display_options(); |
1076 | ||
77145f1c BS |
1077 | if (nouveau_modeset == -1) { |
1078 | #ifdef CONFIG_VGA_CONSOLE | |
1079 | if (vgacon_text_force()) | |
1080 | nouveau_modeset = 0; | |
77145f1c | 1081 | #endif |
77145f1c BS |
1082 | } |
1083 | ||
1084 | if (!nouveau_modeset) | |
1085 | return 0; | |
1086 | ||
055a65d5 AC |
1087 | #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER |
1088 | platform_driver_register(&nouveau_platform_driver); | |
1089 | #endif | |
1090 | ||
77145f1c | 1091 | nouveau_register_dsm_handler(); |
915b4d11 | 1092 | return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver); |
94580299 BS |
1093 | } |
1094 | ||
1095 | static void __exit | |
1096 | nouveau_drm_exit(void) | |
1097 | { | |
77145f1c BS |
1098 | if (!nouveau_modeset) |
1099 | return; | |
1100 | ||
915b4d11 | 1101 | drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver); |
77145f1c | 1102 | nouveau_unregister_dsm_handler(); |
055a65d5 AC |
1103 | |
1104 | #ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER | |
1105 | platform_driver_unregister(&nouveau_platform_driver); | |
1106 | #endif | |
94580299 BS |
1107 | } |
1108 | ||
1109 | module_init(nouveau_drm_init); | |
1110 | module_exit(nouveau_drm_exit); | |
1111 | ||
1112 | MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table); | |
77145f1c BS |
1113 | MODULE_AUTHOR(DRIVER_AUTHOR); |
1114 | MODULE_DESCRIPTION(DRIVER_DESC); | |
94580299 | 1115 | MODULE_LICENSE("GPL and additional rights"); |