drm/nouveau/kms: pass event mask to hpd handler
[linux-2.6-block.git] / drivers / gpu / drm / nouveau / nouveau_dp.c
CommitLineData
6ee73861
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1/*
2 * Copyright 2009 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
da68386d 25#include <drm/display/drm_dp_helper.h>
b01f0608 26
4dc28134 27#include "nouveau_drv.h"
b01f0608 28#include "nouveau_connector.h"
6ee73861 29#include "nouveau_encoder.h"
27a45987 30#include "nouveau_crtc.h"
6ee73861 31
016dacb6 32#include <nvif/event.h>
52aa30f2 33
f479c0ba
BS
34MODULE_PARM_DESC(mst, "Enable DisplayPort multi-stream (default: enabled)");
35static int nouveau_mst = 1;
36module_param_named(mst, nouveau_mst, int, 0400);
37
a4efad35
LP
38static bool
39nouveau_dp_has_sink_count(struct drm_connector *connector,
40 struct nouveau_encoder *outp)
41{
42 return drm_dp_read_sink_count_cap(connector, outp->dp.dpcd, &outp->dp.desc);
43}
44
a0922278
LP
45static enum drm_connector_status
46nouveau_dp_probe_dpcd(struct nouveau_connector *nv_connector,
47 struct nouveau_encoder *outp)
48{
a4efad35 49 struct drm_connector *connector = &nv_connector->base;
a0922278
LP
50 struct drm_dp_aux *aux = &nv_connector->aux;
51 struct nv50_mstm *mstm = NULL;
a4efad35 52 enum drm_connector_status status = connector_status_disconnected;
a0922278
LP
53 int ret;
54 u8 *dpcd = outp->dp.dpcd;
a0922278 55
79416e97
LP
56 ret = drm_dp_read_dpcd_caps(aux, dpcd);
57 if (ret < 0)
58 goto out;
59
60 ret = drm_dp_read_desc(aux, &outp->dp.desc, drm_dp_is_branch(dpcd));
61 if (ret < 0)
a4efad35 62 goto out;
a0922278 63
8b75e83e 64 if (nouveau_mst) {
a0922278 65 mstm = outp->dp.mstm;
8b75e83e
LP
66 if (mstm)
67 mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd);
a0922278
LP
68 }
69
a4efad35
LP
70 if (nouveau_dp_has_sink_count(connector, outp)) {
71 ret = drm_dp_read_sink_count(aux);
72 if (ret < 0)
73 goto out;
74
75 outp->dp.sink_count = ret;
76
77 /*
78 * Dongle connected, but no display. Don't bother reading
79 * downstream port info
80 */
81 if (!outp->dp.sink_count)
82 return connector_status_disconnected;
83 }
84
409d3813
LP
85 ret = drm_dp_read_downstream_info(aux, dpcd,
86 outp->dp.downstream_ports);
87 if (ret < 0)
a4efad35 88 goto out;
409d3813 89
a4efad35
LP
90 status = connector_status_connected;
91out:
92 if (status != connector_status_connected) {
93 /* Clear any cached info */
94 outp->dp.sink_count = 0;
95 }
96 return status;
a0922278
LP
97}
98
8777c5c1 99int
6ba11932
LP
100nouveau_dp_detect(struct nouveau_connector *nv_connector,
101 struct nouveau_encoder *nv_encoder)
6ee73861 102{
8777c5c1 103 struct drm_device *dev = nv_encoder->base.base.dev;
77145f1c 104 struct nouveau_drm *drm = nouveau_drm(dev);
a0922278
LP
105 struct drm_connector *connector = &nv_connector->base;
106 struct nv50_mstm *mstm = nv_encoder->dp.mstm;
107 enum drm_connector_status status;
108 u8 *dpcd = nv_encoder->dp.dpcd;
32dd9236 109 int ret = NOUVEAU_DP_NONE, hpd;
a0922278
LP
110
111 /* If we've already read the DPCD on an eDP device, we don't need to
112 * reread it as it won't change
113 */
114 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP &&
115 dpcd[DP_DPCD_REV] != 0)
116 return NOUVEAU_DP_SST;
6ee73861 117
a0922278
LP
118 mutex_lock(&nv_encoder->dp.hpd_irq_lock);
119 if (mstm) {
120 /* If we're not ready to handle MST state changes yet, just
121 * report the last status of the connector. We'll reprobe it
122 * once we've resumed.
123 */
124 if (mstm->suspended) {
125 if (mstm->is_mst)
126 ret = NOUVEAU_DP_MST;
127 else if (connector->status ==
128 connector_status_connected)
129 ret = NOUVEAU_DP_SST;
130
131 goto out;
132 }
133 }
134
32dd9236
BS
135 /* Check status of HPD pin before attempting an AUX transaction that
136 * would result in a number of (futile) retries on a connector which
137 * has no display plugged.
138 *
139 * TODO: look into checking this before probing I2C to detect DVI/HDMI
140 */
141 hpd = nvif_conn_hpd_status(&nv_connector->conn);
a62b7493
BS
142 if (hpd == NVIF_CONN_HPD_STATUS_NOT_PRESENT) {
143 nvif_outp_dp_aux_pwr(&nv_encoder->outp, false);
32dd9236 144 goto out;
a62b7493
BS
145 }
146 nvif_outp_dp_aux_pwr(&nv_encoder->outp, true);
32dd9236 147
a0922278 148 status = nouveau_dp_probe_dpcd(nv_connector, nv_encoder);
a62b7493
BS
149 if (status == connector_status_disconnected) {
150 nvif_outp_dp_aux_pwr(&nv_encoder->outp, false);
a0922278 151 goto out;
a62b7493 152 }
a0922278
LP
153
154 /* If we're in MST mode, we're done here */
155 if (mstm && mstm->can_mst && mstm->is_mst) {
156 ret = NOUVEAU_DP_MST;
157 goto out;
158 }
6ee73861 159
57940402
LP
160 nv_encoder->dp.link_bw = 27000 * dpcd[DP_MAX_LINK_RATE];
161 nv_encoder->dp.link_nr =
162 dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
6ee73861 163
70704fbf
BS
164 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP && dpcd[DP_DPCD_REV] >= 0x13) {
165 struct drm_dp_aux *aux = &nv_connector->aux;
166 int ret, i;
167 u8 sink_rates[16];
168
169 ret = drm_dp_dpcd_read(aux, DP_SUPPORTED_LINK_RATES, sink_rates, sizeof(sink_rates));
170 if (ret == sizeof(sink_rates)) {
171 for (i = 0; i < ARRAY_SIZE(sink_rates); i += 2) {
172 int val = ((sink_rates[i + 1] << 8) | sink_rates[i]) * 200 / 10;
173 if (val && (i == 0 || val > nv_encoder->dp.link_bw))
174 nv_encoder->dp.link_bw = val;
175 }
176 }
177 }
178
77145f1c 179 NV_DEBUG(drm, "display: %dx%d dpcd 0x%02x\n",
57940402
LP
180 nv_encoder->dp.link_nr, nv_encoder->dp.link_bw,
181 dpcd[DP_DPCD_REV]);
77145f1c 182 NV_DEBUG(drm, "encoder: %dx%d\n",
bbcd521e
LP
183 nv_encoder->dcb->dpconf.link_nr,
184 nv_encoder->dcb->dpconf.link_bw);
6ee73861 185
75a1fccf 186 if (nv_encoder->dcb->dpconf.link_nr < nv_encoder->dp.link_nr)
6ee73861 187 nv_encoder->dp.link_nr = nv_encoder->dcb->dpconf.link_nr;
75a1fccf
BS
188 if (nv_encoder->dcb->dpconf.link_bw < nv_encoder->dp.link_bw)
189 nv_encoder->dp.link_bw = nv_encoder->dcb->dpconf.link_bw;
6ee73861 190
77145f1c 191 NV_DEBUG(drm, "maximum: %dx%d\n",
bbcd521e 192 nv_encoder->dp.link_nr, nv_encoder->dp.link_bw);
fe224bb7 193
a0922278
LP
194 if (mstm && mstm->can_mst) {
195 ret = nv50_mstm_detect(nv_encoder);
196 if (ret == 1) {
197 ret = NOUVEAU_DP_MST;
198 goto out;
199 } else if (ret != 0) {
a62b7493 200 nvif_outp_dp_aux_pwr(&nv_encoder->outp, false);
a0922278
LP
201 goto out;
202 }
6ba11932 203 }
a0922278 204 ret = NOUVEAU_DP_SST;
52aa30f2 205
a0922278
LP
206out:
207 if (mstm && !mstm->suspended && ret != NOUVEAU_DP_MST)
208 nv50_mstm_remove(mstm);
209
210 mutex_unlock(&nv_encoder->dp.hpd_irq_lock);
52aa30f2 211 return ret;
6ee73861 212}
d6a9efec 213
a0922278
LP
214void nouveau_dp_irq(struct nouveau_drm *drm,
215 struct nouveau_connector *nv_connector)
216{
217 struct drm_connector *connector = &nv_connector->base;
218 struct nouveau_encoder *outp = find_encoder(connector, DCB_OUTPUT_DP);
219 struct nv50_mstm *mstm;
016dacb6 220 u64 hpd = 0;
a4efad35 221 int ret;
a0922278
LP
222
223 if (!outp)
224 return;
225
226 mstm = outp->dp.mstm;
227 NV_DEBUG(drm, "service %s\n", connector->name);
228
229 mutex_lock(&outp->dp.hpd_irq_lock);
230
231 if (mstm && mstm->is_mst) {
232 if (!nv50_mstm_service(drm, nv_connector, mstm))
016dacb6 233 hpd |= NVIF_NOTIFY_CONN_V0_UNPLUG;
a0922278
LP
234 } else {
235 drm_dp_cec_irq(&nv_connector->aux);
a4efad35
LP
236
237 if (nouveau_dp_has_sink_count(connector, outp)) {
238 ret = drm_dp_read_sink_count(&nv_connector->aux);
239 if (ret != outp->dp.sink_count)
016dacb6 240 hpd |= NVIF_NOTIFY_CONN_V0_PLUG;
a4efad35
LP
241 if (ret >= 0)
242 outp->dp.sink_count = ret;
243 }
a0922278
LP
244 }
245
246 mutex_unlock(&outp->dp.hpd_irq_lock);
a4efad35 247
016dacb6 248 nouveau_connector_hpd(nv_connector, NVIF_NOTIFY_CONN_V0_IRQ | hpd);
a0922278
LP
249}
250
d6a9efec
LP
251/* TODO:
252 * - Use the minimum possible BPC here, once we add support for the max bpc
253 * property.
d6a9efec
LP
254 * - Validate against the DP caps advertised by the GPU (we don't check these
255 * yet)
256 */
257enum drm_mode_status
258nv50_dp_mode_valid(struct drm_connector *connector,
259 struct nouveau_encoder *outp,
260 const struct drm_display_mode *mode,
261 unsigned *out_clock)
262{
d7787cc0
LP
263 const unsigned int min_clock = 25000;
264 unsigned int max_rate, mode_rate, ds_max_dotclock, clock = mode->clock;
265 const u8 bpp = connector->display_info.bpc * 3;
d6a9efec
LP
266
267 if (mode->flags & DRM_MODE_FLAG_INTERLACE && !outp->caps.dp_interlace)
268 return MODE_NO_INTERLACE;
269
2d831155
LP
270 if ((mode->flags & DRM_MODE_FLAG_3D_MASK) == DRM_MODE_FLAG_3D_FRAME_PACKING)
271 clock *= 2;
272
d7787cc0
LP
273 max_rate = outp->dp.link_nr * outp->dp.link_bw;
274 mode_rate = DIV_ROUND_UP(clock * bpp, 8);
275 if (mode_rate > max_rate)
276 return MODE_CLOCK_HIGH;
277
278 ds_max_dotclock = drm_dp_downstream_max_dotclock(outp->dp.dpcd, outp->dp.downstream_ports);
279 if (ds_max_dotclock && clock > ds_max_dotclock)
280 return MODE_CLOCK_HIGH;
d6a9efec 281
2d831155
LP
282 if (clock < min_clock)
283 return MODE_CLOCK_LOW;
2d831155 284
d6a9efec
LP
285 if (out_clock)
286 *out_clock = clock;
2d831155
LP
287
288 return MODE_OK;
d6a9efec 289}