Commit | Line | Data |
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6ee73861 BS |
1 | /* |
2 | * Copyright 2009 Red Hat Inc. | |
3 | * | |
4 | * Permission is hereby granted, free of charge, to any person obtaining a | |
5 | * copy of this software and associated documentation files (the "Software"), | |
6 | * to deal in the Software without restriction, including without limitation | |
7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
8 | * and/or sell copies of the Software, and to permit persons to whom the | |
9 | * Software is furnished to do so, subject to the following conditions: | |
10 | * | |
11 | * The above copyright notice and this permission notice shall be included in | |
12 | * all copies or substantial portions of the Software. | |
13 | * | |
14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | |
20 | * OTHER DEALINGS IN THE SOFTWARE. | |
21 | * | |
22 | * Authors: Ben Skeggs | |
23 | */ | |
24 | ||
da68386d | 25 | #include <drm/display/drm_dp_helper.h> |
b01f0608 | 26 | |
4dc28134 | 27 | #include "nouveau_drv.h" |
b01f0608 | 28 | #include "nouveau_connector.h" |
6ee73861 | 29 | #include "nouveau_encoder.h" |
27a45987 | 30 | #include "nouveau_crtc.h" |
6ee73861 | 31 | |
52aa30f2 BS |
32 | #include <nvif/class.h> |
33 | #include <nvif/cl5070.h> | |
34 | ||
f479c0ba BS |
35 | MODULE_PARM_DESC(mst, "Enable DisplayPort multi-stream (default: enabled)"); |
36 | static int nouveau_mst = 1; | |
37 | module_param_named(mst, nouveau_mst, int, 0400); | |
38 | ||
a4efad35 LP |
39 | static bool |
40 | nouveau_dp_has_sink_count(struct drm_connector *connector, | |
41 | struct nouveau_encoder *outp) | |
42 | { | |
43 | return drm_dp_read_sink_count_cap(connector, outp->dp.dpcd, &outp->dp.desc); | |
44 | } | |
45 | ||
a0922278 LP |
46 | static enum drm_connector_status |
47 | nouveau_dp_probe_dpcd(struct nouveau_connector *nv_connector, | |
48 | struct nouveau_encoder *outp) | |
49 | { | |
a4efad35 | 50 | struct drm_connector *connector = &nv_connector->base; |
a0922278 LP |
51 | struct drm_dp_aux *aux = &nv_connector->aux; |
52 | struct nv50_mstm *mstm = NULL; | |
a4efad35 | 53 | enum drm_connector_status status = connector_status_disconnected; |
a0922278 LP |
54 | int ret; |
55 | u8 *dpcd = outp->dp.dpcd; | |
a0922278 | 56 | |
79416e97 LP |
57 | ret = drm_dp_read_dpcd_caps(aux, dpcd); |
58 | if (ret < 0) | |
59 | goto out; | |
60 | ||
61 | ret = drm_dp_read_desc(aux, &outp->dp.desc, drm_dp_is_branch(dpcd)); | |
62 | if (ret < 0) | |
a4efad35 | 63 | goto out; |
a0922278 | 64 | |
8b75e83e | 65 | if (nouveau_mst) { |
a0922278 | 66 | mstm = outp->dp.mstm; |
8b75e83e LP |
67 | if (mstm) |
68 | mstm->can_mst = drm_dp_read_mst_cap(aux, dpcd); | |
a0922278 LP |
69 | } |
70 | ||
a4efad35 LP |
71 | if (nouveau_dp_has_sink_count(connector, outp)) { |
72 | ret = drm_dp_read_sink_count(aux); | |
73 | if (ret < 0) | |
74 | goto out; | |
75 | ||
76 | outp->dp.sink_count = ret; | |
77 | ||
78 | /* | |
79 | * Dongle connected, but no display. Don't bother reading | |
80 | * downstream port info | |
81 | */ | |
82 | if (!outp->dp.sink_count) | |
83 | return connector_status_disconnected; | |
84 | } | |
85 | ||
409d3813 LP |
86 | ret = drm_dp_read_downstream_info(aux, dpcd, |
87 | outp->dp.downstream_ports); | |
88 | if (ret < 0) | |
a4efad35 | 89 | goto out; |
409d3813 | 90 | |
a4efad35 LP |
91 | status = connector_status_connected; |
92 | out: | |
93 | if (status != connector_status_connected) { | |
94 | /* Clear any cached info */ | |
95 | outp->dp.sink_count = 0; | |
96 | } | |
97 | return status; | |
a0922278 LP |
98 | } |
99 | ||
8777c5c1 | 100 | int |
6ba11932 LP |
101 | nouveau_dp_detect(struct nouveau_connector *nv_connector, |
102 | struct nouveau_encoder *nv_encoder) | |
6ee73861 | 103 | { |
8777c5c1 | 104 | struct drm_device *dev = nv_encoder->base.base.dev; |
77145f1c | 105 | struct nouveau_drm *drm = nouveau_drm(dev); |
a0922278 LP |
106 | struct drm_connector *connector = &nv_connector->base; |
107 | struct nv50_mstm *mstm = nv_encoder->dp.mstm; | |
108 | enum drm_connector_status status; | |
109 | u8 *dpcd = nv_encoder->dp.dpcd; | |
32dd9236 | 110 | int ret = NOUVEAU_DP_NONE, hpd; |
a0922278 LP |
111 | |
112 | /* If we've already read the DPCD on an eDP device, we don't need to | |
113 | * reread it as it won't change | |
114 | */ | |
115 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP && | |
116 | dpcd[DP_DPCD_REV] != 0) | |
117 | return NOUVEAU_DP_SST; | |
6ee73861 | 118 | |
a0922278 LP |
119 | mutex_lock(&nv_encoder->dp.hpd_irq_lock); |
120 | if (mstm) { | |
121 | /* If we're not ready to handle MST state changes yet, just | |
122 | * report the last status of the connector. We'll reprobe it | |
123 | * once we've resumed. | |
124 | */ | |
125 | if (mstm->suspended) { | |
126 | if (mstm->is_mst) | |
127 | ret = NOUVEAU_DP_MST; | |
128 | else if (connector->status == | |
129 | connector_status_connected) | |
130 | ret = NOUVEAU_DP_SST; | |
131 | ||
132 | goto out; | |
133 | } | |
134 | } | |
135 | ||
32dd9236 BS |
136 | /* Check status of HPD pin before attempting an AUX transaction that |
137 | * would result in a number of (futile) retries on a connector which | |
138 | * has no display plugged. | |
139 | * | |
140 | * TODO: look into checking this before probing I2C to detect DVI/HDMI | |
141 | */ | |
142 | hpd = nvif_conn_hpd_status(&nv_connector->conn); | |
143 | if (hpd == NVIF_CONN_HPD_STATUS_NOT_PRESENT) | |
144 | goto out; | |
145 | ||
a0922278 LP |
146 | status = nouveau_dp_probe_dpcd(nv_connector, nv_encoder); |
147 | if (status == connector_status_disconnected) | |
148 | goto out; | |
149 | ||
150 | /* If we're in MST mode, we're done here */ | |
151 | if (mstm && mstm->can_mst && mstm->is_mst) { | |
152 | ret = NOUVEAU_DP_MST; | |
153 | goto out; | |
154 | } | |
6ee73861 | 155 | |
57940402 LP |
156 | nv_encoder->dp.link_bw = 27000 * dpcd[DP_MAX_LINK_RATE]; |
157 | nv_encoder->dp.link_nr = | |
158 | dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK; | |
6ee73861 | 159 | |
70704fbf BS |
160 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP && dpcd[DP_DPCD_REV] >= 0x13) { |
161 | struct drm_dp_aux *aux = &nv_connector->aux; | |
162 | int ret, i; | |
163 | u8 sink_rates[16]; | |
164 | ||
165 | ret = drm_dp_dpcd_read(aux, DP_SUPPORTED_LINK_RATES, sink_rates, sizeof(sink_rates)); | |
166 | if (ret == sizeof(sink_rates)) { | |
167 | for (i = 0; i < ARRAY_SIZE(sink_rates); i += 2) { | |
168 | int val = ((sink_rates[i + 1] << 8) | sink_rates[i]) * 200 / 10; | |
169 | if (val && (i == 0 || val > nv_encoder->dp.link_bw)) | |
170 | nv_encoder->dp.link_bw = val; | |
171 | } | |
172 | } | |
173 | } | |
174 | ||
77145f1c | 175 | NV_DEBUG(drm, "display: %dx%d dpcd 0x%02x\n", |
57940402 LP |
176 | nv_encoder->dp.link_nr, nv_encoder->dp.link_bw, |
177 | dpcd[DP_DPCD_REV]); | |
77145f1c | 178 | NV_DEBUG(drm, "encoder: %dx%d\n", |
bbcd521e LP |
179 | nv_encoder->dcb->dpconf.link_nr, |
180 | nv_encoder->dcb->dpconf.link_bw); | |
6ee73861 | 181 | |
75a1fccf | 182 | if (nv_encoder->dcb->dpconf.link_nr < nv_encoder->dp.link_nr) |
6ee73861 | 183 | nv_encoder->dp.link_nr = nv_encoder->dcb->dpconf.link_nr; |
75a1fccf BS |
184 | if (nv_encoder->dcb->dpconf.link_bw < nv_encoder->dp.link_bw) |
185 | nv_encoder->dp.link_bw = nv_encoder->dcb->dpconf.link_bw; | |
6ee73861 | 186 | |
77145f1c | 187 | NV_DEBUG(drm, "maximum: %dx%d\n", |
bbcd521e | 188 | nv_encoder->dp.link_nr, nv_encoder->dp.link_bw); |
fe224bb7 | 189 | |
a0922278 LP |
190 | if (mstm && mstm->can_mst) { |
191 | ret = nv50_mstm_detect(nv_encoder); | |
192 | if (ret == 1) { | |
193 | ret = NOUVEAU_DP_MST; | |
194 | goto out; | |
195 | } else if (ret != 0) { | |
196 | goto out; | |
197 | } | |
6ba11932 | 198 | } |
a0922278 | 199 | ret = NOUVEAU_DP_SST; |
52aa30f2 | 200 | |
a0922278 LP |
201 | out: |
202 | if (mstm && !mstm->suspended && ret != NOUVEAU_DP_MST) | |
203 | nv50_mstm_remove(mstm); | |
204 | ||
205 | mutex_unlock(&nv_encoder->dp.hpd_irq_lock); | |
52aa30f2 | 206 | return ret; |
6ee73861 | 207 | } |
d6a9efec | 208 | |
a0922278 LP |
209 | void nouveau_dp_irq(struct nouveau_drm *drm, |
210 | struct nouveau_connector *nv_connector) | |
211 | { | |
212 | struct drm_connector *connector = &nv_connector->base; | |
213 | struct nouveau_encoder *outp = find_encoder(connector, DCB_OUTPUT_DP); | |
214 | struct nv50_mstm *mstm; | |
a4efad35 LP |
215 | int ret; |
216 | bool send_hpd = false; | |
a0922278 LP |
217 | |
218 | if (!outp) | |
219 | return; | |
220 | ||
221 | mstm = outp->dp.mstm; | |
222 | NV_DEBUG(drm, "service %s\n", connector->name); | |
223 | ||
224 | mutex_lock(&outp->dp.hpd_irq_lock); | |
225 | ||
226 | if (mstm && mstm->is_mst) { | |
227 | if (!nv50_mstm_service(drm, nv_connector, mstm)) | |
a4efad35 | 228 | send_hpd = true; |
a0922278 LP |
229 | } else { |
230 | drm_dp_cec_irq(&nv_connector->aux); | |
a4efad35 LP |
231 | |
232 | if (nouveau_dp_has_sink_count(connector, outp)) { | |
233 | ret = drm_dp_read_sink_count(&nv_connector->aux); | |
234 | if (ret != outp->dp.sink_count) | |
235 | send_hpd = true; | |
236 | if (ret >= 0) | |
237 | outp->dp.sink_count = ret; | |
238 | } | |
a0922278 LP |
239 | } |
240 | ||
241 | mutex_unlock(&outp->dp.hpd_irq_lock); | |
a4efad35 LP |
242 | |
243 | if (send_hpd) | |
244 | nouveau_connector_hpd(connector); | |
a0922278 LP |
245 | } |
246 | ||
d6a9efec LP |
247 | /* TODO: |
248 | * - Use the minimum possible BPC here, once we add support for the max bpc | |
249 | * property. | |
d6a9efec LP |
250 | * - Validate against the DP caps advertised by the GPU (we don't check these |
251 | * yet) | |
252 | */ | |
253 | enum drm_mode_status | |
254 | nv50_dp_mode_valid(struct drm_connector *connector, | |
255 | struct nouveau_encoder *outp, | |
256 | const struct drm_display_mode *mode, | |
257 | unsigned *out_clock) | |
258 | { | |
d7787cc0 LP |
259 | const unsigned int min_clock = 25000; |
260 | unsigned int max_rate, mode_rate, ds_max_dotclock, clock = mode->clock; | |
261 | const u8 bpp = connector->display_info.bpc * 3; | |
d6a9efec LP |
262 | |
263 | if (mode->flags & DRM_MODE_FLAG_INTERLACE && !outp->caps.dp_interlace) | |
264 | return MODE_NO_INTERLACE; | |
265 | ||
2d831155 LP |
266 | if ((mode->flags & DRM_MODE_FLAG_3D_MASK) == DRM_MODE_FLAG_3D_FRAME_PACKING) |
267 | clock *= 2; | |
268 | ||
d7787cc0 LP |
269 | max_rate = outp->dp.link_nr * outp->dp.link_bw; |
270 | mode_rate = DIV_ROUND_UP(clock * bpp, 8); | |
271 | if (mode_rate > max_rate) | |
272 | return MODE_CLOCK_HIGH; | |
273 | ||
274 | ds_max_dotclock = drm_dp_downstream_max_dotclock(outp->dp.dpcd, outp->dp.downstream_ports); | |
275 | if (ds_max_dotclock && clock > ds_max_dotclock) | |
276 | return MODE_CLOCK_HIGH; | |
d6a9efec | 277 | |
2d831155 LP |
278 | if (clock < min_clock) |
279 | return MODE_CLOCK_LOW; | |
2d831155 | 280 | |
d6a9efec LP |
281 | if (out_clock) |
282 | *out_clock = clock; | |
2d831155 LP |
283 | |
284 | return MODE_OK; | |
d6a9efec | 285 | } |