Merge branch 'for-3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/wq
[linux-2.6-block.git] / drivers / gpu / drm / nouveau / nouveau_display.c
CommitLineData
6ee73861
BS
1/*
2 * Copyright (C) 2008 Maarten Maathuis.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
760285e7
DH
27#include <drm/drmP.h>
28#include <drm/drm_crtc_helper.h>
77145f1c 29
6ee73861 30#include "nouveau_fbcon.h"
1a646342 31#include "dispnv04/hw.h"
332b242f
FJ
32#include "nouveau_crtc.h"
33#include "nouveau_dma.h"
77145f1c 34#include "nouveau_gem.h"
de691855 35#include "nouveau_connector.h"
45c4e0aa 36#include "nv50_display.h"
6ee73861 37
ebb945a9
BS
38#include "nouveau_fence.h"
39
77145f1c 40#include <engine/disp.h>
e0996aea 41
1d7c71a3
BS
42#include <core/class.h>
43
51cb4b39
BS
44static int
45nouveau_display_vblank_handler(void *data, int head)
46{
47 struct nouveau_drm *drm = data;
48 drm_handle_vblank(drm->dev, head);
49 return NVKM_EVENT_KEEP;
50}
51
52int
53nouveau_display_vblank_enable(struct drm_device *dev, int head)
54{
55 struct nouveau_display *disp = nouveau_display(dev);
56 if (disp) {
57 nouveau_event_get(disp->vblank[head]);
58 return 0;
59 }
60 return -EIO;
61}
62
63void
64nouveau_display_vblank_disable(struct drm_device *dev, int head)
65{
66 struct nouveau_display *disp = nouveau_display(dev);
67 if (disp)
68 nouveau_event_put(disp->vblank[head]);
69}
70
71static void
72nouveau_display_vblank_fini(struct drm_device *dev)
73{
74 struct nouveau_display *disp = nouveau_display(dev);
75 int i;
76
77 if (disp->vblank) {
78 for (i = 0; i < dev->mode_config.num_crtc; i++)
79 nouveau_event_ref(NULL, &disp->vblank[i]);
80 kfree(disp->vblank);
81 disp->vblank = NULL;
82 }
83
84 drm_vblank_cleanup(dev);
85}
86
87static int
88nouveau_display_vblank_init(struct drm_device *dev)
89{
90 struct nouveau_display *disp = nouveau_display(dev);
91 struct nouveau_drm *drm = nouveau_drm(dev);
92 struct nouveau_disp *pdisp = nouveau_disp(drm->device);
93 int ret, i;
94
95 disp->vblank = kzalloc(dev->mode_config.num_crtc *
96 sizeof(*disp->vblank), GFP_KERNEL);
97 if (!disp->vblank)
98 return -ENOMEM;
99
100 for (i = 0; i < dev->mode_config.num_crtc; i++) {
101 ret = nouveau_event_new(pdisp->vblank, i,
102 nouveau_display_vblank_handler,
103 drm, &disp->vblank[i]);
104 if (ret) {
105 nouveau_display_vblank_fini(dev);
106 return ret;
107 }
108 }
109
110 ret = drm_vblank_init(dev, dev->mode_config.num_crtc);
111 if (ret) {
112 nouveau_display_vblank_fini(dev);
113 return ret;
114 }
115
116 return 0;
117}
118
6ee73861
BS
119static void
120nouveau_user_framebuffer_destroy(struct drm_framebuffer *drm_fb)
121{
122 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
6ee73861 123
bc9025bd 124 if (fb->nvbo)
55fb74ad 125 drm_gem_object_unreference_unlocked(&fb->nvbo->gem);
6ee73861
BS
126
127 drm_framebuffer_cleanup(drm_fb);
128 kfree(fb);
129}
130
131static int
132nouveau_user_framebuffer_create_handle(struct drm_framebuffer *drm_fb,
133 struct drm_file *file_priv,
134 unsigned int *handle)
135{
136 struct nouveau_framebuffer *fb = nouveau_framebuffer(drm_fb);
137
55fb74ad 138 return drm_gem_handle_create(file_priv, &fb->nvbo->gem, handle);
6ee73861
BS
139}
140
141static const struct drm_framebuffer_funcs nouveau_framebuffer_funcs = {
142 .destroy = nouveau_user_framebuffer_destroy,
143 .create_handle = nouveau_user_framebuffer_create_handle,
144};
145
38651674 146int
45c4e0aa
BS
147nouveau_framebuffer_init(struct drm_device *dev,
148 struct nouveau_framebuffer *nv_fb,
308e5bcb 149 struct drm_mode_fb_cmd2 *mode_cmd,
45c4e0aa 150 struct nouveau_bo *nvbo)
6ee73861 151{
77145f1c 152 struct nouveau_drm *drm = nouveau_drm(dev);
45c4e0aa 153 struct drm_framebuffer *fb = &nv_fb->base;
6ee73861
BS
154 int ret;
155
45c4e0aa
BS
156 drm_helper_mode_fill_fb_struct(fb, mode_cmd);
157 nv_fb->nvbo = nvbo;
158
77145f1c 159 if (nv_device(drm->device)->card_type >= NV_50) {
45c4e0aa
BS
160 u32 tile_flags = nouveau_bo_tile_layout(nvbo);
161 if (tile_flags == 0x7a00 ||
162 tile_flags == 0xfe00)
163 nv_fb->r_dma = NvEvoFB32;
164 else
165 if (tile_flags == 0x7000)
166 nv_fb->r_dma = NvEvoFB16;
167 else
168 nv_fb->r_dma = NvEvoVRAM_LP;
169
170 switch (fb->depth) {
4f6029da
BS
171 case 8: nv_fb->r_format = 0x1e00; break;
172 case 15: nv_fb->r_format = 0xe900; break;
173 case 16: nv_fb->r_format = 0xe800; break;
45c4e0aa 174 case 24:
4f6029da
BS
175 case 32: nv_fb->r_format = 0xcf00; break;
176 case 30: nv_fb->r_format = 0xd100; break;
45c4e0aa 177 default:
77145f1c 178 NV_ERROR(drm, "unknown depth %d\n", fb->depth);
45c4e0aa
BS
179 return -EINVAL;
180 }
181
bd9c5a20
ML
182 if (nvbo->tile_flags & NOUVEAU_GEM_TILE_NONCONTIG) {
183 NV_ERROR(drm, "framebuffer requires contiguous bo\n");
184 return -EINVAL;
185 }
186
77145f1c 187 if (nv_device(drm->device)->chipset == 0x50)
45c4e0aa
BS
188 nv_fb->r_format |= (tile_flags << 8);
189
2fad3d5e 190 if (!tile_flags) {
77145f1c 191 if (nv_device(drm->device)->card_type < NV_D0)
01f2c773 192 nv_fb->r_pitch = 0x00100000 | fb->pitches[0];
2fad3d5e 193 else
01f2c773 194 nv_fb->r_pitch = 0x01000000 | fb->pitches[0];
2fad3d5e 195 } else {
45c4e0aa 196 u32 mode = nvbo->tile_mode;
77145f1c 197 if (nv_device(drm->device)->card_type >= NV_C0)
45c4e0aa 198 mode >>= 4;
01f2c773 199 nv_fb->r_pitch = ((fb->pitches[0] / 4) << 4) | mode;
45c4e0aa
BS
200 }
201 }
202
c7d73f6a
DV
203 ret = drm_framebuffer_init(dev, fb, &nouveau_framebuffer_funcs);
204 if (ret) {
205 return ret;
206 }
207
38651674 208 return 0;
6ee73861
BS
209}
210
211static struct drm_framebuffer *
212nouveau_user_framebuffer_create(struct drm_device *dev,
213 struct drm_file *file_priv,
308e5bcb 214 struct drm_mode_fb_cmd2 *mode_cmd)
6ee73861 215{
38651674 216 struct nouveau_framebuffer *nouveau_fb;
6ee73861 217 struct drm_gem_object *gem;
fdfb8332 218 int ret = -ENOMEM;
6ee73861 219
308e5bcb 220 gem = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
6ee73861 221 if (!gem)
cce13ff7 222 return ERR_PTR(-ENOENT);
6ee73861 223
38651674
DA
224 nouveau_fb = kzalloc(sizeof(struct nouveau_framebuffer), GFP_KERNEL);
225 if (!nouveau_fb)
fdfb8332 226 goto err_unref;
38651674
DA
227
228 ret = nouveau_framebuffer_init(dev, nouveau_fb, mode_cmd, nouveau_gem_object(gem));
fdfb8332
ML
229 if (ret)
230 goto err;
6ee73861 231
38651674 232 return &nouveau_fb->base;
fdfb8332
ML
233
234err:
235 kfree(nouveau_fb);
236err_unref:
237 drm_gem_object_unreference(gem);
238 return ERR_PTR(ret);
6ee73861
BS
239}
240
27d5030a 241static const struct drm_mode_config_funcs nouveau_mode_config_funcs = {
6ee73861 242 .fb_create = nouveau_user_framebuffer_create,
eb1f8e4f 243 .output_poll_changed = nouveau_fbcon_output_poll_changed,
6ee73861
BS
244};
245
b29caa58 246
4a67d391 247struct nouveau_drm_prop_enum_list {
de691855 248 u8 gen_mask;
b29caa58
BS
249 int type;
250 char *name;
251};
252
4a67d391 253static struct nouveau_drm_prop_enum_list underscan[] = {
92854622
BS
254 { 6, UNDERSCAN_AUTO, "auto" },
255 { 6, UNDERSCAN_OFF, "off" },
256 { 6, UNDERSCAN_ON, "on" },
de691855 257 {}
b29caa58
BS
258};
259
4a67d391 260static struct nouveau_drm_prop_enum_list dither_mode[] = {
de691855
BS
261 { 7, DITHERING_MODE_AUTO, "auto" },
262 { 7, DITHERING_MODE_OFF, "off" },
263 { 1, DITHERING_MODE_ON, "on" },
264 { 6, DITHERING_MODE_STATIC2X2, "static 2x2" },
265 { 6, DITHERING_MODE_DYNAMIC2X2, "dynamic 2x2" },
266 { 4, DITHERING_MODE_TEMPORAL, "temporal" },
267 {}
268};
269
4a67d391 270static struct nouveau_drm_prop_enum_list dither_depth[] = {
de691855
BS
271 { 6, DITHERING_DEPTH_AUTO, "auto" },
272 { 6, DITHERING_DEPTH_6BPC, "6 bpc" },
273 { 6, DITHERING_DEPTH_8BPC, "8 bpc" },
274 {}
275};
276
277#define PROP_ENUM(p,gen,n,list) do { \
4a67d391 278 struct nouveau_drm_prop_enum_list *l = (list); \
de691855
BS
279 int c = 0; \
280 while (l->gen_mask) { \
281 if (l->gen_mask & (1 << (gen))) \
282 c++; \
283 l++; \
284 } \
285 if (c) { \
286 p = drm_property_create(dev, DRM_MODE_PROP_ENUM, n, c); \
287 l = (list); \
288 c = 0; \
289 while (p && l->gen_mask) { \
290 if (l->gen_mask & (1 << (gen))) { \
291 drm_property_add_enum(p, c, l->type, l->name); \
292 c++; \
293 } \
294 l++; \
295 } \
296 } \
297} while(0)
298
f62b27db
BS
299int
300nouveau_display_init(struct drm_device *dev)
301{
77145f1c 302 struct nouveau_display *disp = nouveau_display(dev);
52c4d767 303 struct drm_connector *connector;
f62b27db
BS
304 int ret;
305
306 ret = disp->init(dev);
52c4d767
BS
307 if (ret)
308 return ret;
309
7df898b1 310 /* enable polling for external displays */
52c4d767
BS
311 drm_kms_helper_poll_enable(dev);
312
313 /* enable hotplug interrupts */
314 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
315 struct nouveau_connector *conn = nouveau_connector(connector);
51cb4b39 316 if (conn->hpd_func) nouveau_event_get(conn->hpd_func);
f62b27db
BS
317 }
318
319 return ret;
320}
321
322void
323nouveau_display_fini(struct drm_device *dev)
324{
77145f1c 325 struct nouveau_display *disp = nouveau_display(dev);
52c4d767
BS
326 struct drm_connector *connector;
327
328 /* disable hotplug interrupts */
329 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
330 struct nouveau_connector *conn = nouveau_connector(connector);
51cb4b39 331 if (conn->hpd_func) nouveau_event_put(conn->hpd_func);
52c4d767 332 }
f62b27db
BS
333
334 drm_kms_helper_poll_disable(dev);
335 disp->fini(dev);
336}
337
27d5030a
BS
338int
339nouveau_display_create(struct drm_device *dev)
340{
77145f1c 341 struct nouveau_drm *drm = nouveau_drm(dev);
77145f1c 342 struct nouveau_display *disp;
de691855 343 int ret, gen;
27d5030a 344
77145f1c
BS
345 disp = drm->display = kzalloc(sizeof(*disp), GFP_KERNEL);
346 if (!disp)
347 return -ENOMEM;
348
27d5030a
BS
349 drm_mode_config_init(dev);
350 drm_mode_create_scaling_mode_property(dev);
4ceca5f8 351 drm_mode_create_dvi_i_properties(dev);
de691855 352
77145f1c 353 if (nv_device(drm->device)->card_type < NV_50)
de691855
BS
354 gen = 0;
355 else
77145f1c 356 if (nv_device(drm->device)->card_type < NV_D0)
de691855
BS
357 gen = 1;
358 else
359 gen = 2;
360
361 PROP_ENUM(disp->dithering_mode, gen, "dithering mode", dither_mode);
362 PROP_ENUM(disp->dithering_depth, gen, "dithering depth", dither_depth);
363 PROP_ENUM(disp->underscan_property, gen, "underscan", underscan);
b29caa58
BS
364
365 disp->underscan_hborder_property =
d9bc3c02 366 drm_property_create_range(dev, 0, "underscan hborder", 0, 128);
b29caa58
BS
367
368 disp->underscan_vborder_property =
d9bc3c02 369 drm_property_create_range(dev, 0, "underscan vborder", 0, 128);
b29caa58 370
f9887d09 371 if (gen >= 1) {
03e9a040 372 /* -90..+90 */
df26bc9c 373 disp->vibrant_hue_property =
03e9a040 374 drm_property_create_range(dev, 0, "vibrant hue", 0, 180);
df26bc9c 375
03e9a040 376 /* -100..+100 */
df26bc9c 377 disp->color_vibrance_property =
03e9a040 378 drm_property_create_range(dev, 0, "color vibrance", 0, 200);
df26bc9c
CB
379 }
380
e6ecefaa 381 dev->mode_config.funcs = &nouveau_mode_config_funcs;
27d5030a
BS
382 dev->mode_config.fb_base = pci_resource_start(dev->pdev, 1);
383
384 dev->mode_config.min_width = 0;
385 dev->mode_config.min_height = 0;
77145f1c 386 if (nv_device(drm->device)->card_type < NV_10) {
27d5030a
BS
387 dev->mode_config.max_width = 2048;
388 dev->mode_config.max_height = 2048;
389 } else
77145f1c 390 if (nv_device(drm->device)->card_type < NV_50) {
27d5030a
BS
391 dev->mode_config.max_width = 4096;
392 dev->mode_config.max_height = 4096;
393 } else {
394 dev->mode_config.max_width = 8192;
395 dev->mode_config.max_height = 8192;
396 }
397
f1377998
DA
398 dev->mode_config.preferred_depth = 24;
399 dev->mode_config.prefer_shadow = 1;
400
b9d9dcda
BS
401 if (nv_device(drm->device)->chipset < 0x11)
402 dev->mode_config.async_page_flip = false;
403 else
404 dev->mode_config.async_page_flip = true;
405
f62b27db
BS
406 drm_kms_helper_poll_init(dev);
407 drm_kms_helper_poll_disable(dev);
408
fc162088
BS
409 if (drm->vbios.dcb.entries) {
410 if (nv_device(drm->device)->card_type < NV_50)
411 ret = nv04_display_create(dev);
412 else
413 ret = nv50_display_create(dev);
414 } else {
415 ret = 0;
416 }
9430738d 417
fc162088
BS
418 if (ret)
419 goto disp_create_err;
9430738d 420
fc162088 421 if (dev->mode_config.num_crtc) {
51cb4b39 422 ret = nouveau_display_vblank_init(dev);
fc162088
BS
423 if (ret)
424 goto vblank_err;
f62b27db
BS
425 }
426
fc162088 427 nouveau_backlight_init(dev);
5ace2c9d
MS
428 return 0;
429
430vblank_err:
77145f1c 431 disp->dtor(dev);
5ace2c9d
MS
432disp_create_err:
433 drm_kms_helper_poll_fini(dev);
434 drm_mode_config_cleanup(dev);
2a44e499 435 return ret;
27d5030a
BS
436}
437
438void
439nouveau_display_destroy(struct drm_device *dev)
440{
77145f1c 441 struct nouveau_display *disp = nouveau_display(dev);
27d5030a 442
77145f1c 443 nouveau_backlight_exit(dev);
51cb4b39 444 nouveau_display_vblank_fini(dev);
f62b27db 445
d6bf2f37
BS
446 drm_kms_helper_poll_fini(dev);
447 drm_mode_config_cleanup(dev);
448
9430738d
BS
449 if (disp->dtor)
450 disp->dtor(dev);
f62b27db 451
77145f1c
BS
452 nouveau_drm(dev)->display = NULL;
453 kfree(disp);
454}
455
456int
457nouveau_display_suspend(struct drm_device *dev)
458{
459 struct nouveau_drm *drm = nouveau_drm(dev);
460 struct drm_crtc *crtc;
461
462 nouveau_display_fini(dev);
463
c52f4fa6 464 NV_INFO(drm, "unpinning framebuffer(s)...\n");
77145f1c
BS
465 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
466 struct nouveau_framebuffer *nouveau_fb;
467
468 nouveau_fb = nouveau_framebuffer(crtc->fb);
469 if (!nouveau_fb || !nouveau_fb->nvbo)
470 continue;
471
472 nouveau_bo_unpin(nouveau_fb->nvbo);
473 }
474
475 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
476 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
477
478 nouveau_bo_unmap(nv_crtc->cursor.nvbo);
479 nouveau_bo_unpin(nv_crtc->cursor.nvbo);
480 }
481
482 return 0;
483}
484
485void
5addcf0a 486nouveau_display_repin(struct drm_device *dev)
77145f1c
BS
487{
488 struct nouveau_drm *drm = nouveau_drm(dev);
489 struct drm_crtc *crtc;
490 int ret;
491
492 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
493 struct nouveau_framebuffer *nouveau_fb;
494
495 nouveau_fb = nouveau_framebuffer(crtc->fb);
496 if (!nouveau_fb || !nouveau_fb->nvbo)
497 continue;
498
499 nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
500 }
501
502 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
503 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
504
505 ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
506 if (!ret)
507 ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
508 if (ret)
509 NV_ERROR(drm, "Could not pin/map cursor.\n");
510 }
5addcf0a 511}
77145f1c 512
5addcf0a
DA
513void
514nouveau_display_resume(struct drm_device *dev)
515{
516 struct drm_crtc *crtc;
77145f1c
BS
517 nouveau_display_init(dev);
518
519 /* Force CLUT to get re-loaded during modeset */
520 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
521 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
522
523 nv_crtc->lut.depth = 0;
524 }
525
526 drm_helper_resume_force_mode(dev);
527
528 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
529 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
530 u32 offset = nv_crtc->cursor.nvbo->bo.offset;
531
532 nv_crtc->cursor.set_offset(nv_crtc, offset);
533 nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
534 nv_crtc->cursor_saved_y);
535 }
27d5030a
BS
536}
537
332b242f
FJ
538static int
539nouveau_page_flip_emit(struct nouveau_channel *chan,
540 struct nouveau_bo *old_bo,
541 struct nouveau_bo *new_bo,
542 struct nouveau_page_flip_state *s,
543 struct nouveau_fence **pfence)
544{
f589be88 545 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
546 struct nouveau_drm *drm = chan->drm;
547 struct drm_device *dev = drm->dev;
332b242f
FJ
548 unsigned long flags;
549 int ret;
550
551 /* Queue it to the pending list */
552 spin_lock_irqsave(&dev->event_lock, flags);
f589be88 553 list_add_tail(&s->head, &fctx->flip);
332b242f
FJ
554 spin_unlock_irqrestore(&dev->event_lock, flags);
555
556 /* Synchronize with the old framebuffer */
557 ret = nouveau_fence_sync(old_bo->bo.sync_obj, chan);
558 if (ret)
559 goto fail;
560
561 /* Emit the pageflip */
1e303c03 562 ret = RING_SPACE(chan, 2);
332b242f
FJ
563 if (ret)
564 goto fail;
565
1e303c03 566 if (nv_device(drm->device)->card_type < NV_C0)
6d597027 567 BEGIN_NV04(chan, NvSubSw, NV_SW_PAGE_FLIP, 1);
1e303c03
BS
568 else
569 BEGIN_NVC0(chan, FermiSw, NV_SW_PAGE_FLIP, 1);
570 OUT_RING (chan, 0x00000000);
bd2f2037 571 FIRE_RING (chan);
332b242f 572
264ce192 573 ret = nouveau_fence_new(chan, false, pfence);
332b242f
FJ
574 if (ret)
575 goto fail;
576
577 return 0;
578fail:
579 spin_lock_irqsave(&dev->event_lock, flags);
580 list_del(&s->head);
581 spin_unlock_irqrestore(&dev->event_lock, flags);
582 return ret;
583}
584
585int
586nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
b9d9dcda 587 struct drm_pending_vblank_event *event, u32 flags)
332b242f 588{
b9d9dcda 589 const int swap_interval = (flags & DRM_MODE_PAGE_FLIP_ASYNC) ? 0 : 1;
332b242f 590 struct drm_device *dev = crtc->dev;
77145f1c 591 struct nouveau_drm *drm = nouveau_drm(dev);
332b242f
FJ
592 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo;
593 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
594 struct nouveau_page_flip_state *s;
eae389f9 595 struct nouveau_channel *chan = drm->channel;
332b242f
FJ
596 struct nouveau_fence *fence;
597 int ret;
598
77145f1c 599 if (!drm->channel)
332b242f
FJ
600 return -ENODEV;
601
602 s = kzalloc(sizeof(*s), GFP_KERNEL);
603 if (!s)
604 return -ENOMEM;
605
eae389f9
BS
606 /* synchronise rendering channel with the kernel's channel */
607 spin_lock(&new_bo->bo.bdev->fence_lock);
608 fence = nouveau_fence_ref(new_bo->bo.sync_obj);
609 spin_unlock(&new_bo->bo.bdev->fence_lock);
610 ret = nouveau_fence_sync(fence, chan);
2fd04c81 611 nouveau_fence_unref(&fence);
eae389f9 612 if (ret)
bbc63196 613 goto fail_free;
b580c9e2 614
b580c9e2
ML
615 if (new_bo != old_bo) {
616 ret = nouveau_bo_pin(new_bo, TTM_PL_FLAG_VRAM);
060810d7
BS
617 if (ret)
618 goto fail_free;
b580c9e2 619 }
060810d7
BS
620
621 mutex_lock(&chan->cli->mutex);
07ad6ca0 622 ret = ttm_bo_reserve(&old_bo->bo, true, false, false, NULL);
060810d7
BS
623 if (ret)
624 goto fail_unpin;
b580c9e2
ML
625
626 /* Initialize a page flip struct */
627 *s = (struct nouveau_page_flip_state)
628 { { }, event, nouveau_crtc(crtc)->index,
629 fb->bits_per_pixel, fb->pitches[0], crtc->x, crtc->y,
630 new_bo->bo.offset };
631
332b242f 632 /* Emit a page flip */
77145f1c 633 if (nv_device(drm->device)->card_type >= NV_50) {
b9d9dcda 634 ret = nv50_display_flip_next(crtc, fb, chan, swap_interval);
060810d7 635 if (ret)
d7117e0d 636 goto fail_unreserve;
78ae0ad4
BS
637 } else {
638 struct nv04_display *dispnv04 = nv04_display(dev);
b9d9dcda
BS
639 int head = nouveau_crtc(crtc)->index;
640
641 if (swap_interval) {
642 ret = RING_SPACE(chan, 8);
643 if (ret)
644 goto fail_unreserve;
645
646 BEGIN_NV04(chan, NvSubImageBlit, 0x012c, 1);
647 OUT_RING (chan, 0);
648 BEGIN_NV04(chan, NvSubImageBlit, 0x0134, 1);
649 OUT_RING (chan, head);
650 BEGIN_NV04(chan, NvSubImageBlit, 0x0100, 1);
651 OUT_RING (chan, 0);
652 BEGIN_NV04(chan, NvSubImageBlit, 0x0130, 1);
653 OUT_RING (chan, 0);
654 }
655
656 nouveau_bo_ref(new_bo, &dispnv04->image[head]);
d7117e0d
BS
657 }
658
332b242f 659 ret = nouveau_page_flip_emit(chan, old_bo, new_bo, s, &fence);
77145f1c 660 mutex_unlock(&chan->cli->mutex);
332b242f
FJ
661 if (ret)
662 goto fail_unreserve;
663
664 /* Update the crtc struct and cleanup */
665 crtc->fb = fb;
666
07ad6ca0
BS
667 nouveau_bo_fence(old_bo, fence);
668 ttm_bo_unreserve(&old_bo->bo);
060810d7 669 if (old_bo != new_bo)
b580c9e2 670 nouveau_bo_unpin(old_bo);
332b242f
FJ
671 nouveau_fence_unref(&fence);
672 return 0;
673
674fail_unreserve:
07ad6ca0 675 ttm_bo_unreserve(&old_bo->bo);
060810d7
BS
676fail_unpin:
677 mutex_unlock(&chan->cli->mutex);
678 if (old_bo != new_bo)
b580c9e2 679 nouveau_bo_unpin(new_bo);
332b242f
FJ
680fail_free:
681 kfree(s);
682 return ret;
683}
684
685int
686nouveau_finish_page_flip(struct nouveau_channel *chan,
687 struct nouveau_page_flip_state *ps)
688{
f589be88 689 struct nouveau_fence_chan *fctx = chan->fence;
77145f1c
BS
690 struct nouveau_drm *drm = chan->drm;
691 struct drm_device *dev = drm->dev;
332b242f
FJ
692 struct nouveau_page_flip_state *s;
693 unsigned long flags;
694
695 spin_lock_irqsave(&dev->event_lock, flags);
696
f589be88 697 if (list_empty(&fctx->flip)) {
77145f1c 698 NV_ERROR(drm, "unexpected pageflip\n");
332b242f
FJ
699 spin_unlock_irqrestore(&dev->event_lock, flags);
700 return -EINVAL;
701 }
702
f589be88 703 s = list_first_entry(&fctx->flip, struct nouveau_page_flip_state, head);
95d38d14 704 if (s->event)
f074d733 705 drm_send_vblank_event(dev, s->crtc, s->event);
332b242f
FJ
706
707 list_del(&s->head);
d7117e0d
BS
708 if (ps)
709 *ps = *s;
332b242f
FJ
710 kfree(s);
711
712 spin_unlock_irqrestore(&dev->event_lock, flags);
713 return 0;
714}
33dbc27f 715
f589be88
BS
716int
717nouveau_flip_complete(void *data)
718{
719 struct nouveau_channel *chan = data;
77145f1c 720 struct nouveau_drm *drm = chan->drm;
f589be88
BS
721 struct nouveau_page_flip_state state;
722
723 if (!nouveau_finish_page_flip(chan, &state)) {
77145f1c
BS
724 if (nv_device(drm->device)->card_type < NV_50) {
725 nv_set_crtc_base(drm->dev, state.crtc, state.offset +
f589be88
BS
726 state.y * state.pitch +
727 state.x * state.bpp / 8);
728 }
729 }
730
731 return 0;
732}
733
33dbc27f
BS
734int
735nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
736 struct drm_mode_create_dumb *args)
737{
738 struct nouveau_bo *bo;
739 int ret;
740
741 args->pitch = roundup(args->width * (args->bpp / 8), 256);
742 args->size = args->pitch * args->height;
743 args->size = roundup(args->size, PAGE_SIZE);
744
610bd7da 745 ret = nouveau_gem_new(dev, args->size, 0, NOUVEAU_GEM_DOMAIN_VRAM, 0, 0, &bo);
33dbc27f
BS
746 if (ret)
747 return ret;
748
55fb74ad
DH
749 ret = drm_gem_handle_create(file_priv, &bo->gem, &args->handle);
750 drm_gem_object_unreference_unlocked(&bo->gem);
33dbc27f
BS
751 return ret;
752}
753
33dbc27f
BS
754int
755nouveau_display_dumb_map_offset(struct drm_file *file_priv,
756 struct drm_device *dev,
757 uint32_t handle, uint64_t *poffset)
758{
759 struct drm_gem_object *gem;
760
761 gem = drm_gem_object_lookup(dev, file_priv, handle);
762 if (gem) {
55fb74ad 763 struct nouveau_bo *bo = nouveau_gem_object(gem);
72525b3f 764 *poffset = drm_vma_node_offset_addr(&bo->bo.vma_node);
33dbc27f
BS
765 drm_gem_object_unreference_unlocked(gem);
766 return 0;
767 }
768
769 return -ENOENT;
770}