[linux-2.6-block.git] / drivers / gpu / drm / nouveau / include / nvkm / core / device.h

#ifndef __NVKM_DEVICE_H__
#define __NVKM_DEVICE_H__
#include <core/event.h>
#include <core/object.h>

enum nvkm_devidx {
	NVKM_SUBDEV_PCI,
	NVKM_SUBDEV_VBIOS,
	NVKM_SUBDEV_DEVINIT,
	NVKM_SUBDEV_TOP,
	NVKM_SUBDEV_IBUS,
	NVKM_SUBDEV_GPIO,
	NVKM_SUBDEV_I2C,
	NVKM_SUBDEV_FUSE,
	NVKM_SUBDEV_MXM,
	NVKM_SUBDEV_MC,
	NVKM_SUBDEV_BUS,
	NVKM_SUBDEV_TIMER,
	NVKM_SUBDEV_INSTMEM,
	NVKM_SUBDEV_FB,
	NVKM_SUBDEV_LTC,
	NVKM_SUBDEV_MMU,
	NVKM_SUBDEV_BAR,
	NVKM_SUBDEV_PMU,
	NVKM_SUBDEV_VOLT,
	NVKM_SUBDEV_ICCSENSE,
	NVKM_SUBDEV_THERM,
	NVKM_SUBDEV_CLK,
	NVKM_SUBDEV_SECBOOT,

	NVKM_ENGINE_BSP,

	NVKM_ENGINE_CE0,
	NVKM_ENGINE_CE1,
	NVKM_ENGINE_CE2,
	NVKM_ENGINE_CE3,
	NVKM_ENGINE_CE4,
	NVKM_ENGINE_CE5,
	NVKM_ENGINE_CE_LAST = NVKM_ENGINE_CE5,

	NVKM_ENGINE_CIPHER,
	NVKM_ENGINE_DISP,
	NVKM_ENGINE_DMAOBJ,
	NVKM_ENGINE_FIFO,
	NVKM_ENGINE_GR,
	NVKM_ENGINE_IFB,
	NVKM_ENGINE_ME,
	NVKM_ENGINE_MPEG,
	NVKM_ENGINE_MSENC,
	NVKM_ENGINE_MSPDEC,
	NVKM_ENGINE_MSPPP,
	NVKM_ENGINE_MSVLD,

	NVKM_ENGINE_NVENC0,
	NVKM_ENGINE_NVENC1,
	NVKM_ENGINE_NVENC2,
	NVKM_ENGINE_NVENC_LAST = NVKM_ENGINE_NVENC2,

	NVKM_ENGINE_NVDEC,
	NVKM_ENGINE_PM,
	NVKM_ENGINE_SEC,
	NVKM_ENGINE_SW,
	NVKM_ENGINE_VIC,
	NVKM_ENGINE_VP,

	NVKM_SUBDEV_NR
};

enum nvkm_device_type {
	NVKM_DEVICE_PCI,
	NVKM_DEVICE_AGP,
	NVKM_DEVICE_PCIE,
	NVKM_DEVICE_TEGRA,
};

struct nvkm_device {
	const struct nvkm_device_func *func;
	const struct nvkm_device_quirk *quirk;
	struct device *dev;
	enum nvkm_device_type type;
	u64 handle;
	const char *name;
	const char *cfgopt;
	const char *dbgopt;

	struct list_head head;
	struct mutex mutex;
	int refcount;

	void __iomem *pri;

	struct nvkm_event event;

	u64 disable_mask;
	u32 debug;

	const struct nvkm_device_chip *chip;
	enum {
		NV_04    = 0x04,
		NV_10    = 0x10,
		NV_11    = 0x11,
		NV_20    = 0x20,
		NV_30    = 0x30,
		NV_40    = 0x40,
		NV_50    = 0x50,
		NV_C0    = 0xc0,
		NV_E0    = 0xe0,
		GM100    = 0x110,
	} card_type;
	u32 chipset;
	u8  chiprev;
	u32 crystal;

	struct {
		struct notifier_block nb;
	} acpi;

	struct nvkm_bar *bar;
	struct nvkm_bios *bios;
	struct nvkm_bus *bus;
	struct nvkm_clk *clk;
	struct nvkm_devinit *devinit;
	struct nvkm_fb *fb;
	struct nvkm_fuse *fuse;
	struct nvkm_gpio *gpio;
	struct nvkm_i2c *i2c;
	struct nvkm_subdev *ibus;
	struct nvkm_iccsense *iccsense;
	struct nvkm_instmem *imem;
	struct nvkm_ltc *ltc;
	struct nvkm_mc *mc;
	struct nvkm_mmu *mmu;
	struct nvkm_subdev *mxm;
	struct nvkm_pci *pci;
	struct nvkm_pmu *pmu;
	struct nvkm_secboot *secboot;
	struct nvkm_therm *therm;
	struct nvkm_timer *timer;
	struct nvkm_top *top;
	struct nvkm_volt *volt;

	struct nvkm_engine *bsp;
	struct nvkm_engine *ce[6];
	struct nvkm_engine *cipher;
	struct nvkm_disp *disp;
	struct nvkm_dma *dma;
	struct nvkm_fifo *fifo;
	struct nvkm_gr *gr;
	struct nvkm_engine *ifb;
	struct nvkm_engine *me;
	struct nvkm_engine *mpeg;
	struct nvkm_engine *msenc;
	struct nvkm_engine *mspdec;
	struct nvkm_engine *msppp;
	struct nvkm_engine *msvld;
	struct nvkm_engine *nvenc[3];
	struct nvkm_engine *nvdec;
	struct nvkm_pm *pm;
	struct nvkm_engine *sec;
	struct nvkm_sw *sw;
	struct nvkm_engine *vic;
	struct nvkm_engine *vp;
};

struct nvkm_subdev *nvkm_device_subdev(struct nvkm_device *, int index);
struct nvkm_engine *nvkm_device_engine(struct nvkm_device *, int index);

struct nvkm_device_func {
	struct nvkm_device_pci *(*pci)(struct nvkm_device *);
	struct nvkm_device_tegra *(*tegra)(struct nvkm_device *);
	void *(*dtor)(struct nvkm_device *);
	int (*preinit)(struct nvkm_device *);
	int (*init)(struct nvkm_device *);
	void (*fini)(struct nvkm_device *, bool suspend);
	resource_size_t (*resource_addr)(struct nvkm_device *, unsigned bar);
	resource_size_t (*resource_size)(struct nvkm_device *, unsigned bar);
	bool cpu_coherent;
};

struct nvkm_device_quirk {
	u8 tv_pin_mask;
	u8 tv_gpio;
};

struct nvkm_device_chip {
	const char *name;

	int (*bar     )(struct nvkm_device *, int idx, struct nvkm_bar **);
	int (*bios    )(struct nvkm_device *, int idx, struct nvkm_bios **);
	int (*bus     )(struct nvkm_device *, int idx, struct nvkm_bus **);
	int (*clk     )(struct nvkm_device *, int idx, struct nvkm_clk **);
	int (*devinit )(struct nvkm_device *, int idx, struct nvkm_devinit **);
	int (*fb      )(struct nvkm_device *, int idx, struct nvkm_fb **);
	int (*fuse    )(struct nvkm_device *, int idx, struct nvkm_fuse **);
	int (*gpio    )(struct nvkm_device *, int idx, struct nvkm_gpio **);
	int (*i2c     )(struct nvkm_device *, int idx, struct nvkm_i2c **);
	int (*ibus    )(struct nvkm_device *, int idx, struct nvkm_subdev **);
	int (*iccsense)(struct nvkm_device *, int idx, struct nvkm_iccsense **);
	int (*imem    )(struct nvkm_device *, int idx, struct nvkm_instmem **);
	int (*ltc     )(struct nvkm_device *, int idx, struct nvkm_ltc **);
	int (*mc      )(struct nvkm_device *, int idx, struct nvkm_mc **);
	int (*mmu     )(struct nvkm_device *, int idx, struct nvkm_mmu **);
	int (*mxm     )(struct nvkm_device *, int idx, struct nvkm_subdev **);
	int (*pci     )(struct nvkm_device *, int idx, struct nvkm_pci **);
	int (*pmu     )(struct nvkm_device *, int idx, struct nvkm_pmu **);
	int (*secboot )(struct nvkm_device *, int idx, struct nvkm_secboot **);
	int (*therm   )(struct nvkm_device *, int idx, struct nvkm_therm **);
	int (*timer   )(struct nvkm_device *, int idx, struct nvkm_timer **);
	int (*top     )(struct nvkm_device *, int idx, struct nvkm_top **);
	int (*volt    )(struct nvkm_device *, int idx, struct nvkm_volt **);

	int (*bsp     )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*ce[6]   )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*cipher  )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*disp    )(struct nvkm_device *, int idx, struct nvkm_disp **);
	int (*dma     )(struct nvkm_device *, int idx, struct nvkm_dma **);
	int (*fifo    )(struct nvkm_device *, int idx, struct nvkm_fifo **);
	int (*gr      )(struct nvkm_device *, int idx, struct nvkm_gr **);
	int (*ifb     )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*me      )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*mpeg    )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*msenc   )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*mspdec  )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*msppp   )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*msvld   )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*nvenc[3])(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*nvdec   )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*pm      )(struct nvkm_device *, int idx, struct nvkm_pm **);
	int (*sec     )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*sw      )(struct nvkm_device *, int idx, struct nvkm_sw **);
	int (*vic     )(struct nvkm_device *, int idx, struct nvkm_engine **);
	int (*vp      )(struct nvkm_device *, int idx, struct nvkm_engine **);
};

struct nvkm_device *nvkm_device_find(u64 name);
int nvkm_device_list(u64 *name, int size);

/* privileged register interface accessor macros */
#define nvkm_rd08(d,a) ioread8((d)->pri + (a))
#define nvkm_rd16(d,a) ioread16_native((d)->pri + (a))
#define nvkm_rd32(d,a) ioread32_native((d)->pri + (a))
#define nvkm_wr08(d,a,v) iowrite8((v), (d)->pri + (a))
#define nvkm_wr16(d,a,v) iowrite16_native((v), (d)->pri + (a))
#define nvkm_wr32(d,a,v) iowrite32_native((v), (d)->pri + (a))
#define nvkm_mask(d,a,m,v) ({                                                  \
	struct nvkm_device *_device = (d);                                     \
	u32 _addr = (a), _temp = nvkm_rd32(_device, _addr);                    \
	nvkm_wr32(_device, _addr, (_temp & ~(m)) | (v));                       \
	_temp;                                                                 \
})

void nvkm_device_del(struct nvkm_device **);

struct nvkm_device_oclass {
	int (*ctor)(struct nvkm_device *, const struct nvkm_oclass *,
		    void *data, u32 size, struct nvkm_object **);
	struct nvkm_sclass base;
};

extern const struct nvkm_sclass nvkm_udevice_sclass;

/* device logging */
#define nvdev_printk_(d,l,p,f,a...) do {                                       \
	struct nvkm_device *_device = (d);                                     \
	if (_device->debug >= (l))                                             \
		dev_##p(_device->dev, f, ##a);                                 \
} while(0)
#define nvdev_printk(d,l,p,f,a...) nvdev_printk_((d), NV_DBG_##l, p, f, ##a)
#define nvdev_fatal(d,f,a...) nvdev_printk((d), FATAL,   crit, f, ##a)
#define nvdev_error(d,f,a...) nvdev_printk((d), ERROR,    err, f, ##a)
#define nvdev_warn(d,f,a...)  nvdev_printk((d),  WARN, notice, f, ##a)
#define nvdev_info(d,f,a...)  nvdev_printk((d),  INFO,   info, f, ##a)
#define nvdev_debug(d,f,a...) nvdev_printk((d), DEBUG,   info, f, ##a)
#define nvdev_trace(d,f,a...) nvdev_printk((d), TRACE,   info, f, ##a)
#define nvdev_spam(d,f,a...)  nvdev_printk((d),  SPAM,    dbg, f, ##a)
#endif
Commit	Line	Data
5025407b BS	1	#ifndef __NVKM_DEVICE_H__
5025407b BS	2	#define __NVKM_DEVICE_H__
ed76a870	3	#include <core/event.h>
68f3f702	4	#include <core/object.h>
9274f4a9	5
9ace404b	6	enum nvkm_devidx {
0a34fb31	7	NVKM_SUBDEV_PCI,
68f3f702 BS	8	NVKM_SUBDEV_VBIOS,
68f3f702 BS	9	NVKM_SUBDEV_DEVINIT,
eaebfcc3	10	NVKM_SUBDEV_TOP,
68f3f702 BS	11	NVKM_SUBDEV_IBUS,
	12	NVKM_SUBDEV_GPIO,
	13	NVKM_SUBDEV_I2C,
	14	NVKM_SUBDEV_FUSE,
	15	NVKM_SUBDEV_MXM,
	16	NVKM_SUBDEV_MC,
	17	NVKM_SUBDEV_BUS,
	18	NVKM_SUBDEV_TIMER,
77154fd9	19	NVKM_SUBDEV_INSTMEM,
68f3f702 BS	20	NVKM_SUBDEV_FB,
68f3f702 BS	21	NVKM_SUBDEV_LTC,
68f3f702 BS	22	NVKM_SUBDEV_MMU,
	23	NVKM_SUBDEV_BAR,
	24	NVKM_SUBDEV_PMU,
	25	NVKM_SUBDEV_VOLT,
dc06e366	26	NVKM_SUBDEV_ICCSENSE,
68f3f702 BS	27	NVKM_SUBDEV_THERM,
68f3f702 BS	28	NVKM_SUBDEV_CLK,
7d12388a	29	NVKM_SUBDEV_SECBOOT,
68f3f702	30
68f3f702	31	NVKM_ENGINE_BSP,
7cee0433	32
68f3f702 BS	33	NVKM_ENGINE_CE0,
	34	NVKM_ENGINE_CE1,
	35	NVKM_ENGINE_CE2,
34bf50cd BS	36	NVKM_ENGINE_CE3,
	37	NVKM_ENGINE_CE4,
	38	NVKM_ENGINE_CE5,
	39	NVKM_ENGINE_CE_LAST = NVKM_ENGINE_CE5,
7cee0433 BS	40
7cee0433 BS	41	NVKM_ENGINE_CIPHER,
68f3f702	42	NVKM_ENGINE_DISP,
7cee0433 BS	43	NVKM_ENGINE_DMAOBJ,
	44	NVKM_ENGINE_FIFO,
	45	NVKM_ENGINE_GR,
	46	NVKM_ENGINE_IFB,
	47	NVKM_ENGINE_ME,
	48	NVKM_ENGINE_MPEG,
	49	NVKM_ENGINE_MSENC,
	50	NVKM_ENGINE_MSPDEC,
	51	NVKM_ENGINE_MSPPP,
68f3f702	52	NVKM_ENGINE_MSVLD,
294af04b BS	53
	54	NVKM_ENGINE_NVENC0,
	55	NVKM_ENGINE_NVENC1,
cb7b5ea9 BS	56	NVKM_ENGINE_NVENC2,
cb7b5ea9 BS	57	NVKM_ENGINE_NVENC_LAST = NVKM_ENGINE_NVENC2,
294af04b	58
3545b425	59	NVKM_ENGINE_NVDEC,
7cee0433	60	NVKM_ENGINE_PM,
68f3f702	61	NVKM_ENGINE_SEC,
7cee0433 BS	62	NVKM_ENGINE_SW,
	63	NVKM_ENGINE_VIC,
	64	NVKM_ENGINE_VP,
68f3f702	65
26c9e8ef BS	66	NVKM_SUBDEV_NR
	67	};
	68
	69	enum nvkm_device_type {
	70	NVKM_DEVICE_PCI,
	71	NVKM_DEVICE_AGP,
	72	NVKM_DEVICE_PCIE,
	73	NVKM_DEVICE_TEGRA,
9ace404b BS	74	};
9ace404b BS	75
5025407b	76	struct nvkm_device {
7974dd1b BS	77	const struct nvkm_device_func *func;
	78	const struct nvkm_device_quirk *quirk;
	79	struct device *dev;
26c9e8ef	80	enum nvkm_device_type type;
7974dd1b BS	81	u64 handle;
	82	const char *name;
	83	const char *cfgopt;
	84	const char *dbgopt;
	85
9274f4a9	86	struct list_head head;
a1e88736 BS	87	struct mutex mutex;
a1e88736 BS	88	int refcount;
9274f4a9	89
2ebfa1bc BS	90	void __iomem *pri;
2ebfa1bc BS	91
79ca2770	92	struct nvkm_event event;
ed76a870	93
f0d13e3a	94	u64 disable_mask;
68f3f702	95	u32 debug;
9274f4a9	96
6cf813fb	97	const struct nvkm_device_chip *chip;
9274f4a9 BS	98	enum {
	99	NV_04 = 0x04,
	100	NV_10 = 0x10,
4a0ff754	101	NV_11 = 0x11,
9274f4a9 BS	102	NV_20 = 0x20,
	103	NV_30 = 0x30,
	104	NV_40 = 0x40,
	105	NV_50 = 0x50,
	106	NV_C0 = 0xc0,
9274f4a9	107	NV_E0 = 0xe0,
3f204647	108	GM100 = 0x110,
9274f4a9 BS	109	} card_type;
9274f4a9 BS	110	u32 chipset;
3704791d	111	u8 chiprev;
9274f4a9 BS	112	u32 crystal;
9274f4a9 BS	113
ed76a870 BS	114	struct {
	115	struct notifier_block nb;
	116	} acpi;
741d778e BS	117
	118	struct nvkm_bar *bar;
	119	struct nvkm_bios *bios;
	120	struct nvkm_bus *bus;
	121	struct nvkm_clk *clk;
	122	struct nvkm_devinit *devinit;
	123	struct nvkm_fb *fb;
	124	struct nvkm_fuse *fuse;
	125	struct nvkm_gpio *gpio;
	126	struct nvkm_i2c *i2c;
	127	struct nvkm_subdev *ibus;
dc06e366	128	struct nvkm_iccsense *iccsense;
741d778e BS	129	struct nvkm_instmem *imem;
	130	struct nvkm_ltc *ltc;
	131	struct nvkm_mc *mc;
	132	struct nvkm_mmu *mmu;
	133	struct nvkm_subdev *mxm;
0a34fb31	134	struct nvkm_pci *pci;
741d778e	135	struct nvkm_pmu *pmu;
7d12388a	136	struct nvkm_secboot *secboot;
741d778e BS	137	struct nvkm_therm *therm;
741d778e BS	138	struct nvkm_timer *timer;
eaebfcc3	139	struct nvkm_top *top;
741d778e BS	140	struct nvkm_volt *volt;
	141
	142	struct nvkm_engine *bsp;
34bf50cd	143	struct nvkm_engine *ce[6];
741d778e BS	144	struct nvkm_engine *cipher;
741d778e BS	145	struct nvkm_disp *disp;
19fef52d	146	struct nvkm_dma *dma;
741d778e BS	147	struct nvkm_fifo *fifo;
	148	struct nvkm_gr *gr;
	149	struct nvkm_engine *ifb;
	150	struct nvkm_engine *me;
	151	struct nvkm_engine *mpeg;
	152	struct nvkm_engine *msenc;
	153	struct nvkm_engine *mspdec;
	154	struct nvkm_engine *msppp;
	155	struct nvkm_engine *msvld;
cb7b5ea9	156	struct nvkm_engine *nvenc[3];
3545b425	157	struct nvkm_engine *nvdec;
741d778e BS	158	struct nvkm_pm *pm;
	159	struct nvkm_engine *sec;
	160	struct nvkm_sw *sw;
	161	struct nvkm_engine *vic;
	162	struct nvkm_engine *vp;
9274f4a9 BS	163	};
9274f4a9 BS	164
6cf813fb BS	165	struct nvkm_subdev nvkm_device_subdev(struct nvkm_device , int index);
	166	struct nvkm_engine nvkm_device_engine(struct nvkm_device , int index);
	167
7974dd1b BS	168	struct nvkm_device_func {
	169	struct nvkm_device_pci (pci)(struct nvkm_device *);
	170	struct nvkm_device_tegra (tegra)(struct nvkm_device *);
	171	void (dtor)(struct nvkm_device *);
	172	int (preinit)(struct nvkm_device );
2b700825	173	int (init)(struct nvkm_device );
7974dd1b	174	void (fini)(struct nvkm_device , bool suspend);
7e8820fe BS	175	resource_size_t (resource_addr)(struct nvkm_device , unsigned bar);
7e8820fe BS	176	resource_size_t (resource_size)(struct nvkm_device , unsigned bar);
26c9e8ef	177	bool cpu_coherent;
7974dd1b BS	178	};
	179
	180	struct nvkm_device_quirk {
c7af0ff0 BS	181	u8 tv_pin_mask;
c7af0ff0 BS	182	u8 tv_gpio;
7974dd1b BS	183	};
7974dd1b BS	184
6cf813fb BS	185	struct nvkm_device_chip {
	186	const char *name;
	187
dc06e366 MP	188	int (bar )(struct nvkm_device , int idx, struct nvkm_bar **);
	189	int (bios )(struct nvkm_device , int idx, struct nvkm_bios **);
	190	int (bus )(struct nvkm_device , int idx, struct nvkm_bus **);
	191	int (clk )(struct nvkm_device , int idx, struct nvkm_clk **);
	192	int (devinit )(struct nvkm_device , int idx, struct nvkm_devinit **);
	193	int (fb )(struct nvkm_device , int idx, struct nvkm_fb **);
	194	int (fuse )(struct nvkm_device , int idx, struct nvkm_fuse **);
	195	int (gpio )(struct nvkm_device , int idx, struct nvkm_gpio **);
	196	int (i2c )(struct nvkm_device , int idx, struct nvkm_i2c **);
	197	int (ibus )(struct nvkm_device , int idx, struct nvkm_subdev **);
	198	int (iccsense)(struct nvkm_device , int idx, struct nvkm_iccsense **);
	199	int (imem )(struct nvkm_device , int idx, struct nvkm_instmem **);
	200	int (ltc )(struct nvkm_device , int idx, struct nvkm_ltc **);
	201	int (mc )(struct nvkm_device , int idx, struct nvkm_mc **);
	202	int (mmu )(struct nvkm_device , int idx, struct nvkm_mmu **);
	203	int (mxm )(struct nvkm_device , int idx, struct nvkm_subdev **);
	204	int (pci )(struct nvkm_device , int idx, struct nvkm_pci **);
	205	int (pmu )(struct nvkm_device , int idx, struct nvkm_pmu **);
	206	int (secboot )(struct nvkm_device , int idx, struct nvkm_secboot **);
	207	int (therm )(struct nvkm_device , int idx, struct nvkm_therm **);
	208	int (timer )(struct nvkm_device , int idx, struct nvkm_timer **);
eaebfcc3	209	int (top )(struct nvkm_device , int idx, struct nvkm_top **);
dc06e366 MP	210	int (volt )(struct nvkm_device , int idx, struct nvkm_volt **);
	211
	212	int (bsp )(struct nvkm_device , int idx, struct nvkm_engine **);
34bf50cd	213	int (ce[6] )(struct nvkm_device , int idx, struct nvkm_engine **);
dc06e366 MP	214	int (cipher )(struct nvkm_device , int idx, struct nvkm_engine **);
	215	int (disp )(struct nvkm_device , int idx, struct nvkm_disp **);
	216	int (dma )(struct nvkm_device , int idx, struct nvkm_dma **);
	217	int (fifo )(struct nvkm_device , int idx, struct nvkm_fifo **);
	218	int (gr )(struct nvkm_device , int idx, struct nvkm_gr **);
	219	int (ifb )(struct nvkm_device , int idx, struct nvkm_engine **);
	220	int (me )(struct nvkm_device , int idx, struct nvkm_engine **);
	221	int (mpeg )(struct nvkm_device , int idx, struct nvkm_engine **);
	222	int (msenc )(struct nvkm_device , int idx, struct nvkm_engine **);
	223	int (mspdec )(struct nvkm_device , int idx, struct nvkm_engine **);
	224	int (msppp )(struct nvkm_device , int idx, struct nvkm_engine **);
	225	int (msvld )(struct nvkm_device , int idx, struct nvkm_engine **);
cb7b5ea9	226	int (nvenc[3])(struct nvkm_device , int idx, struct nvkm_engine **);
3545b425	227	int (nvdec )(struct nvkm_device , int idx, struct nvkm_engine **);
dc06e366 MP	228	int (pm )(struct nvkm_device , int idx, struct nvkm_pm **);
	229	int (sec )(struct nvkm_device , int idx, struct nvkm_engine **);
	230	int (sw )(struct nvkm_device , int idx, struct nvkm_sw **);
	231	int (vic )(struct nvkm_device , int idx, struct nvkm_engine **);
	232	int (vp )(struct nvkm_device , int idx, struct nvkm_engine **);
6cf813fb BS	233	};
6cf813fb BS	234
5025407b BS	235	struct nvkm_device *nvkm_device_find(u64 name);
5025407b BS	236	int nvkm_device_list(u64 *name, int size);
803c1787	237
dd646942	238	/* privileged register interface accessor macros */
2ebfa1bc BS	239	#define nvkm_rd08(d,a) ioread8((d)->pri + (a))
	240	#define nvkm_rd16(d,a) ioread16_native((d)->pri + (a))
	241	#define nvkm_rd32(d,a) ioread32_native((d)->pri + (a))
	242	#define nvkm_wr08(d,a,v) iowrite8((v), (d)->pri + (a))
	243	#define nvkm_wr16(d,a,v) iowrite16_native((v), (d)->pri + (a))
	244	#define nvkm_wr32(d,a,v) iowrite32_native((v), (d)->pri + (a))
dd646942 BS	245	#define nvkm_mask(d,a,m,v) ({ \
	246	struct nvkm_device *_device = (d); \
	247	u32 _addr = (a), _temp = nvkm_rd32(_device, _addr); \
	248	nvkm_wr32(_device, _addr, (_temp & ~(m)) \| (v)); \
	249	_temp; \
	250	})
	251
e781dc8f	252	void nvkm_device_del(struct nvkm_device **);
6594363b	253
0e29998a BS	254	struct nvkm_device_oclass {
	255	int (ctor)(struct nvkm_device , const struct nvkm_oclass *,
	256	void data, u32 size, struct nvkm_object *);
	257	struct nvkm_sclass base;
	258	};
	259
2a9f847f BS	260	extern const struct nvkm_sclass nvkm_udevice_sclass;
2a9f847f BS	261
6594363b BS	262	/* device logging */
	263	#define nvdev_printk_(d,l,p,f,a...) do { \
	264	struct nvkm_device *_device = (d); \
68f3f702	265	if (_device->debug >= (l)) \
6594363b BS	266	dev_##p(_device->dev, f, ##a); \
	267	} while(0)
	268	#define nvdev_printk(d,l,p,f,a...) nvdev_printk_((d), NV_DBG_##l, p, f, ##a)
	269	#define nvdev_fatal(d,f,a...) nvdev_printk((d), FATAL, crit, f, ##a)
	270	#define nvdev_error(d,f,a...) nvdev_printk((d), ERROR, err, f, ##a)
	271	#define nvdev_warn(d,f,a...) nvdev_printk((d), WARN, notice, f, ##a)
	272	#define nvdev_info(d,f,a...) nvdev_printk((d), INFO, info, f, ##a)
	273	#define nvdev_debug(d,f,a...) nvdev_printk((d), DEBUG, info, f, ##a)
	274	#define nvdev_trace(d,f,a...) nvdev_printk((d), TRACE, info, f, ##a)
	275	#define nvdev_spam(d,f,a...) nvdev_printk((d), SPAM, dbg, f, ##a)
9274f4a9	276	#endif