drm/nv50-/instmem: allocate vram for kernel objects from end of vram
[linux-block.git] / drivers / gpu / drm / nouveau / core / subdev / device / nve0.c
CommitLineData
9274f4a9
BS
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <subdev/device.h>
70c0f263 26#include <subdev/bios.h>
e0996aea 27#include <subdev/gpio.h>
4196faa8 28#include <subdev/i2c.h>
8aceb7de 29#include <subdev/clock.h>
cb75d97e 30#include <subdev/devinit.h>
7d9115de 31#include <subdev/mc.h>
5a5c7432 32#include <subdev/timer.h>
9274f4a9
BS
33
34int
35nve0_identify(struct nouveau_device *device)
36{
37 switch (device->chipset) {
38 case 0xe4:
70c0f263 39 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
e0996aea 40 device->oclass[NVDEV_SUBDEV_GPIO ] = &nvd0_gpio_oclass;
4196faa8 41 device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass;
8aceb7de 42 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nvc0_clock_oclass;
cb75d97e 43 device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
7d9115de 44 device->oclass[NVDEV_SUBDEV_MC ] = &nvc0_mc_oclass;
5a5c7432 45 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
9274f4a9
BS
46 break;
47 case 0xe7:
70c0f263 48 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nouveau_bios_oclass;
e0996aea 49 device->oclass[NVDEV_SUBDEV_GPIO ] = &nvd0_gpio_oclass;
4196faa8 50 device->oclass[NVDEV_SUBDEV_I2C ] = &nouveau_i2c_oclass;
8aceb7de 51 device->oclass[NVDEV_SUBDEV_CLOCK ] = &nvc0_clock_oclass;
cb75d97e 52 device->oclass[NVDEV_SUBDEV_DEVINIT] = &nv50_devinit_oclass;
7d9115de 53 device->oclass[NVDEV_SUBDEV_MC ] = &nvc0_mc_oclass;
5a5c7432 54 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
9274f4a9
BS
55 break;
56 default:
57 nv_fatal(device, "unknown Kepler chipset\n");
58 return -EINVAL;
59 }
60
61 return 0;
62}