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drm/nouveau/disp: audit and version display classes
[linux-2.6-block.git] / drivers / gpu / drm / nouveau / core / engine / graph / nv34.c
CommitLineData
ebb945a9 1#include <core/os.h>
ebb945a9
BS		 2#include <core/engctx.h>
3#include <core/enum.h>
4
5#include <subdev/timer.h>
6#include <subdev/fb.h>
7
8#include <engine/graph.h>
9
10#include "nv20.h"
11#include "regs.h"
12
13/*******************************************************************************
14 * Graphics object classes
15 ******************************************************************************/
16
17static struct nouveau_oclass
18nv34_graph_sclass[] = {
19 { 0x0012, &nv04_graph_ofuncs, NULL }, /* beta1 */
20 { 0x0019, &nv04_graph_ofuncs, NULL }, /* clip */
21 { 0x0030, &nv04_graph_ofuncs, NULL }, /* null */
22 { 0x0039, &nv04_graph_ofuncs, NULL }, /* m2mf */
23 { 0x0043, &nv04_graph_ofuncs, NULL }, /* rop */
24 { 0x0044, &nv04_graph_ofuncs, NULL }, /* patt */
25 { 0x004a, &nv04_graph_ofuncs, NULL }, /* gdi */
26 { 0x0062, &nv04_graph_ofuncs, NULL }, /* surf2d */
27 { 0x0072, &nv04_graph_ofuncs, NULL }, /* beta4 */
28 { 0x0089, &nv04_graph_ofuncs, NULL }, /* sifm */
29 { 0x008a, &nv04_graph_ofuncs, NULL }, /* ifc */
30 { 0x009f, &nv04_graph_ofuncs, NULL }, /* imageblit */
31 { 0x0362, &nv04_graph_ofuncs, NULL }, /* surf2d (nv30) */
32 { 0x0389, &nv04_graph_ofuncs, NULL }, /* sifm (nv30) */
33 { 0x038a, &nv04_graph_ofuncs, NULL }, /* ifc (nv30) */
34 { 0x039e, &nv04_graph_ofuncs, NULL }, /* swzsurf (nv30) */
35 { 0x0697, &nv04_graph_ofuncs, NULL }, /* rankine */
36 {},
37};
38
39/*******************************************************************************
40 * PGRAPH context
41 ******************************************************************************/
42
43static int
44nv34_graph_context_ctor(struct nouveau_object *parent,
45 struct nouveau_object *engine,
46 struct nouveau_oclass *oclass, void *data, u32 size,
47 struct nouveau_object **pobject)
48{
49 struct nv20_graph_chan *chan;
50 int ret, i;
51
52 ret = nouveau_graph_context_create(parent, engine, oclass, NULL, 0x46dc,
53 16, NVOBJ_FLAG_ZERO_ALLOC, &chan);
54 *pobject = nv_object(chan);
55 if (ret)
56 return ret;
57
58 chan->chid = nouveau_fifo_chan(parent)->chid;
59
60 nv_wo32(chan, 0x0028, 0x00000001 | (chan->chid << 24));
61 nv_wo32(chan, 0x040c, 0x01000101);
62 nv_wo32(chan, 0x0420, 0x00000111);
63 nv_wo32(chan, 0x0424, 0x00000060);
64 nv_wo32(chan, 0x0440, 0x00000080);
65 nv_wo32(chan, 0x0444, 0xffff0000);
66 nv_wo32(chan, 0x0448, 0x00000001);
67 nv_wo32(chan, 0x045c, 0x44400000);
68 nv_wo32(chan, 0x0480, 0xffff0000);
69 for (i = 0x04d4; i < 0x04dc; i += 4)
70 nv_wo32(chan, i, 0x0fff0000);
71 nv_wo32(chan, 0x04e0, 0x00011100);
72 for (i = 0x04fc; i < 0x053c; i += 4)
73 nv_wo32(chan, i, 0x07ff0000);
74 nv_wo32(chan, 0x0544, 0x4b7fffff);
75 nv_wo32(chan, 0x057c, 0x00000080);
76 nv_wo32(chan, 0x0580, 0x30201000);
77 nv_wo32(chan, 0x0584, 0x70605040);
78 nv_wo32(chan, 0x0588, 0xb8a89888);
79 nv_wo32(chan, 0x058c, 0xf8e8d8c8);
80 nv_wo32(chan, 0x05a0, 0xb0000000);
81 for (i = 0x05f0; i < 0x0630; i += 4)
82 nv_wo32(chan, i, 0x00010588);
83 for (i = 0x0630; i < 0x0670; i += 4)
84 nv_wo32(chan, i, 0x00030303);
85 for (i = 0x06b0; i < 0x06f0; i += 4)
86 nv_wo32(chan, i, 0x0008aae4);
87 for (i = 0x06f0; i < 0x0730; i += 4)
88 nv_wo32(chan, i, 0x01012000);
89 for (i = 0x0730; i < 0x0770; i += 4)
90 nv_wo32(chan, i, 0x00080008);
91 nv_wo32(chan, 0x0850, 0x00040000);
92 nv_wo32(chan, 0x0854, 0x00010000);
93 for (i = 0x0858; i < 0x0868; i += 4)
94 nv_wo32(chan, i, 0x00040004);
95 for (i = 0x15ac; i <= 0x271c ; i += 16) {
96 nv_wo32(chan, i + 0, 0x10700ff9);
97 nv_wo32(chan, i + 1, 0x0436086c);
98 nv_wo32(chan, i + 2, 0x000c001b);
99 }
100 for (i = 0x274c; i < 0x275c; i += 4)
101 nv_wo32(chan, i, 0x0000ffff);
102 nv_wo32(chan, 0x2ae0, 0x3f800000);
103 nv_wo32(chan, 0x2e9c, 0x3f800000);
104 nv_wo32(chan, 0x2eb0, 0x3f800000);
105 nv_wo32(chan, 0x2edc, 0x40000000);
106 nv_wo32(chan, 0x2ee0, 0x3f800000);
107 nv_wo32(chan, 0x2ee4, 0x3f000000);
108 nv_wo32(chan, 0x2eec, 0x40000000);
109 nv_wo32(chan, 0x2ef0, 0x3f800000);
110 nv_wo32(chan, 0x2ef8, 0xbf800000);
111 nv_wo32(chan, 0x2f00, 0xbf800000);
112 return 0;
113}
114
115static struct nouveau_oclass
116nv34_graph_cclass = {
117 .handle = NV_ENGCTX(GR, 0x34),
118 .ofuncs = &(struct nouveau_ofuncs) {
119 .ctor = nv34_graph_context_ctor,
120 .dtor = _nouveau_graph_context_dtor,
121 .init = nv20_graph_context_init,
122 .fini = nv20_graph_context_fini,
123 .rd32 = _nouveau_graph_context_rd32,
124 .wr32 = _nouveau_graph_context_wr32,
125 },
126};
127
128/*******************************************************************************
129 * PGRAPH engine/subdev functions
130 ******************************************************************************/
131
132static int
133nv34_graph_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
134 struct nouveau_oclass *oclass, void *data, u32 size,
135 struct nouveau_object **pobject)
136{
137 struct nv20_graph_priv *priv;
138 int ret;
139
140 ret = nouveau_graph_create(parent, engine, oclass, true, &priv);
141 *pobject = nv_object(priv);
142 if (ret)
143 return ret;
144
a3e6789a 145 ret = nouveau_gpuobj_new(nv_object(priv), NULL, 32 * 4, 16,
ebb945a9
BS		 146 NVOBJ_FLAG_ZERO_ALLOC, &priv->ctxtab);
147 if (ret)
148 return ret;
149
150 nv_subdev(priv)->unit = 0x00001000;
151 nv_subdev(priv)->intr = nv20_graph_intr;
152 nv_engine(priv)->cclass = &nv34_graph_cclass;
153 nv_engine(priv)->sclass = nv34_graph_sclass;
154 nv_engine(priv)->tile_prog = nv20_graph_tile_prog;
155 return 0;
156}
157
158struct nouveau_oclass
159nv34_graph_oclass = {
160 .handle = NV_ENGINE(GR, 0x34),
161 .ofuncs = &(struct nouveau_ofuncs) {
162 .ctor = nv34_graph_ctor,
163 .dtor = nv20_graph_dtor,
164 .init = nv30_graph_init,
165 .fini = _nouveau_graph_fini,
166 },
167};
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