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c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
45d59d70 MV |
2 | /* |
3 | * Copyright (C) 2016 Marek Vasut <marex@denx.de> | |
4 | * | |
5 | * This code is based on drivers/video/fbdev/mxsfb.c : | |
6 | * Copyright (C) 2010 Juergen Beisert, Pengutronix | |
7 | * Copyright (C) 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. | |
8 | * Copyright (C) 2008 Embedded Alley Solutions, Inc All Rights Reserved. | |
45d59d70 MV |
9 | */ |
10 | ||
45d59d70 MV |
11 | #include <linux/clk.h> |
12 | #include <linux/component.h> | |
d5742c6c | 13 | #include <linux/dma-mapping.h> |
45d59d70 | 14 | #include <linux/list.h> |
d5742c6c | 15 | #include <linux/module.h> |
45d59d70 MV |
16 | #include <linux/of_device.h> |
17 | #include <linux/of_graph.h> | |
18 | #include <linux/of_reserved_mem.h> | |
19 | #include <linux/pm_runtime.h> | |
52791eee | 20 | #include <linux/dma-resv.h> |
d5742c6c | 21 | #include <linux/spinlock.h> |
45d59d70 | 22 | |
45d59d70 MV |
23 | #include <drm/drm_atomic.h> |
24 | #include <drm/drm_atomic_helper.h> | |
25 | #include <drm/drm_crtc.h> | |
d5742c6c | 26 | #include <drm/drm_drv.h> |
45d59d70 | 27 | #include <drm/drm_fb_cma_helper.h> |
d5742c6c | 28 | #include <drm/drm_fb_helper.h> |
45d59d70 | 29 | #include <drm/drm_gem_cma_helper.h> |
98f3eac5 | 30 | #include <drm/drm_gem_framebuffer_helper.h> |
d5742c6c | 31 | #include <drm/drm_irq.h> |
45d59d70 MV |
32 | #include <drm/drm_of.h> |
33 | #include <drm/drm_panel.h> | |
fcd70cd3 | 34 | #include <drm/drm_probe_helper.h> |
45d59d70 | 35 | #include <drm/drm_simple_kms_helper.h> |
d5742c6c | 36 | #include <drm/drm_vblank.h> |
45d59d70 MV |
37 | |
38 | #include "mxsfb_drv.h" | |
39 | #include "mxsfb_regs.h" | |
40 | ||
41 | enum mxsfb_devtype { | |
42 | MXSFB_V3, | |
43 | MXSFB_V4, | |
44 | }; | |
45 | ||
46 | static const struct mxsfb_devdata mxsfb_devdata[] = { | |
47 | [MXSFB_V3] = { | |
48 | .transfer_count = LCDC_V3_TRANSFER_COUNT, | |
49 | .cur_buf = LCDC_V3_CUR_BUF, | |
50 | .next_buf = LCDC_V3_NEXT_BUF, | |
51 | .debug0 = LCDC_V3_DEBUG0, | |
52 | .hs_wdth_mask = 0xff, | |
53 | .hs_wdth_shift = 24, | |
54 | .ipversion = 3, | |
55 | }, | |
56 | [MXSFB_V4] = { | |
57 | .transfer_count = LCDC_V4_TRANSFER_COUNT, | |
58 | .cur_buf = LCDC_V4_CUR_BUF, | |
59 | .next_buf = LCDC_V4_NEXT_BUF, | |
60 | .debug0 = LCDC_V4_DEBUG0, | |
61 | .hs_wdth_mask = 0x3fff, | |
62 | .hs_wdth_shift = 18, | |
63 | .ipversion = 4, | |
64 | }, | |
65 | }; | |
66 | ||
67 | static const uint32_t mxsfb_formats[] = { | |
68 | DRM_FORMAT_XRGB8888, | |
69 | DRM_FORMAT_RGB565 | |
70 | }; | |
71 | ||
72 | static struct mxsfb_drm_private * | |
73 | drm_pipe_to_mxsfb_drm_private(struct drm_simple_display_pipe *pipe) | |
74 | { | |
75 | return container_of(pipe, struct mxsfb_drm_private, pipe); | |
76 | } | |
77 | ||
78 | void mxsfb_enable_axi_clk(struct mxsfb_drm_private *mxsfb) | |
79 | { | |
80 | if (mxsfb->clk_axi) | |
81 | clk_prepare_enable(mxsfb->clk_axi); | |
82 | } | |
83 | ||
84 | void mxsfb_disable_axi_clk(struct mxsfb_drm_private *mxsfb) | |
85 | { | |
86 | if (mxsfb->clk_axi) | |
87 | clk_disable_unprepare(mxsfb->clk_axi); | |
88 | } | |
89 | ||
90 | static const struct drm_mode_config_funcs mxsfb_mode_config_funcs = { | |
98f3eac5 | 91 | .fb_create = drm_gem_fb_create, |
45d59d70 MV |
92 | .atomic_check = drm_atomic_helper_check, |
93 | .atomic_commit = drm_atomic_helper_commit, | |
94 | }; | |
95 | ||
9f19fd3b LC |
96 | static const struct drm_mode_config_helper_funcs mxsfb_mode_config_helpers = { |
97 | .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, | |
98 | }; | |
99 | ||
45d59d70 | 100 | static void mxsfb_pipe_enable(struct drm_simple_display_pipe *pipe, |
0c9c7fd0 VS |
101 | struct drm_crtc_state *crtc_state, |
102 | struct drm_plane_state *plane_state) | |
45d59d70 MV |
103 | { |
104 | struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); | |
4201f4e8 | 105 | struct drm_device *drm = pipe->plane.dev; |
45d59d70 | 106 | |
4201f4e8 | 107 | pm_runtime_get_sync(drm->dev); |
3f81e134 | 108 | drm_panel_prepare(mxsfb->panel); |
45d59d70 | 109 | mxsfb_crtc_enable(mxsfb); |
3f81e134 | 110 | drm_panel_enable(mxsfb->panel); |
45d59d70 MV |
111 | } |
112 | ||
113 | static void mxsfb_pipe_disable(struct drm_simple_display_pipe *pipe) | |
114 | { | |
115 | struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); | |
4201f4e8 | 116 | struct drm_device *drm = pipe->plane.dev; |
9f19fd3b LC |
117 | struct drm_crtc *crtc = &pipe->crtc; |
118 | struct drm_pending_vblank_event *event; | |
45d59d70 | 119 | |
3f81e134 | 120 | drm_panel_disable(mxsfb->panel); |
45d59d70 | 121 | mxsfb_crtc_disable(mxsfb); |
3f81e134 | 122 | drm_panel_unprepare(mxsfb->panel); |
4201f4e8 | 123 | pm_runtime_put_sync(drm->dev); |
9f19fd3b LC |
124 | |
125 | spin_lock_irq(&drm->event_lock); | |
126 | event = crtc->state->event; | |
127 | if (event) { | |
128 | crtc->state->event = NULL; | |
129 | drm_crtc_send_vblank_event(crtc, event); | |
130 | } | |
131 | spin_unlock_irq(&drm->event_lock); | |
45d59d70 MV |
132 | } |
133 | ||
134 | static void mxsfb_pipe_update(struct drm_simple_display_pipe *pipe, | |
135 | struct drm_plane_state *plane_state) | |
136 | { | |
137 | struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); | |
138 | ||
139 | mxsfb_plane_atomic_update(mxsfb, plane_state); | |
140 | } | |
141 | ||
989c48e6 OA |
142 | static int mxsfb_pipe_enable_vblank(struct drm_simple_display_pipe *pipe) |
143 | { | |
144 | struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); | |
145 | ||
146 | /* Clear and enable VBLANK IRQ */ | |
147 | mxsfb_enable_axi_clk(mxsfb); | |
148 | writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); | |
149 | writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_SET); | |
150 | mxsfb_disable_axi_clk(mxsfb); | |
151 | ||
152 | return 0; | |
153 | } | |
154 | ||
155 | static void mxsfb_pipe_disable_vblank(struct drm_simple_display_pipe *pipe) | |
156 | { | |
157 | struct mxsfb_drm_private *mxsfb = drm_pipe_to_mxsfb_drm_private(pipe); | |
158 | ||
159 | /* Disable and clear VBLANK IRQ */ | |
160 | mxsfb_enable_axi_clk(mxsfb); | |
161 | writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_CLR); | |
162 | writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); | |
163 | mxsfb_disable_axi_clk(mxsfb); | |
164 | } | |
165 | ||
c5a82814 | 166 | static struct drm_simple_display_pipe_funcs mxsfb_funcs = { |
45d59d70 MV |
167 | .enable = mxsfb_pipe_enable, |
168 | .disable = mxsfb_pipe_disable, | |
169 | .update = mxsfb_pipe_update, | |
244cb3dd | 170 | .prepare_fb = drm_gem_fb_simple_display_pipe_prepare_fb, |
989c48e6 OA |
171 | .enable_vblank = mxsfb_pipe_enable_vblank, |
172 | .disable_vblank = mxsfb_pipe_disable_vblank, | |
45d59d70 MV |
173 | }; |
174 | ||
175 | static int mxsfb_load(struct drm_device *drm, unsigned long flags) | |
176 | { | |
177 | struct platform_device *pdev = to_platform_device(drm->dev); | |
178 | struct mxsfb_drm_private *mxsfb; | |
179 | struct resource *res; | |
180 | int ret; | |
181 | ||
182 | mxsfb = devm_kzalloc(&pdev->dev, sizeof(*mxsfb), GFP_KERNEL); | |
183 | if (!mxsfb) | |
184 | return -ENOMEM; | |
185 | ||
186 | drm->dev_private = mxsfb; | |
187 | mxsfb->devdata = &mxsfb_devdata[pdev->id_entry->driver_data]; | |
188 | ||
189 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
190 | mxsfb->base = devm_ioremap_resource(drm->dev, res); | |
191 | if (IS_ERR(mxsfb->base)) | |
192 | return PTR_ERR(mxsfb->base); | |
193 | ||
194 | mxsfb->clk = devm_clk_get(drm->dev, NULL); | |
195 | if (IS_ERR(mxsfb->clk)) | |
196 | return PTR_ERR(mxsfb->clk); | |
197 | ||
198 | mxsfb->clk_axi = devm_clk_get(drm->dev, "axi"); | |
199 | if (IS_ERR(mxsfb->clk_axi)) | |
200 | mxsfb->clk_axi = NULL; | |
201 | ||
202 | mxsfb->clk_disp_axi = devm_clk_get(drm->dev, "disp_axi"); | |
203 | if (IS_ERR(mxsfb->clk_disp_axi)) | |
204 | mxsfb->clk_disp_axi = NULL; | |
205 | ||
206 | ret = dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(32)); | |
207 | if (ret) | |
208 | return ret; | |
209 | ||
210 | pm_runtime_enable(drm->dev); | |
211 | ||
212 | ret = drm_vblank_init(drm, drm->mode_config.num_crtc); | |
213 | if (ret < 0) { | |
214 | dev_err(drm->dev, "Failed to initialise vblank\n"); | |
215 | goto err_vblank; | |
216 | } | |
217 | ||
218 | /* Modeset init */ | |
219 | drm_mode_config_init(drm); | |
220 | ||
221 | ret = mxsfb_create_output(drm); | |
222 | if (ret < 0) { | |
223 | dev_err(drm->dev, "Failed to create outputs\n"); | |
224 | goto err_vblank; | |
225 | } | |
226 | ||
227 | ret = drm_simple_display_pipe_init(drm, &mxsfb->pipe, &mxsfb_funcs, | |
e6fc3b68 | 228 | mxsfb_formats, ARRAY_SIZE(mxsfb_formats), NULL, |
45d59d70 MV |
229 | &mxsfb->connector); |
230 | if (ret < 0) { | |
231 | dev_err(drm->dev, "Cannot setup simple display pipe\n"); | |
232 | goto err_vblank; | |
233 | } | |
234 | ||
235 | ret = drm_panel_attach(mxsfb->panel, &mxsfb->connector); | |
236 | if (ret) { | |
237 | dev_err(drm->dev, "Cannot connect panel\n"); | |
238 | goto err_vblank; | |
239 | } | |
240 | ||
241 | drm->mode_config.min_width = MXSFB_MIN_XRES; | |
242 | drm->mode_config.min_height = MXSFB_MIN_YRES; | |
243 | drm->mode_config.max_width = MXSFB_MAX_XRES; | |
244 | drm->mode_config.max_height = MXSFB_MAX_YRES; | |
245 | drm->mode_config.funcs = &mxsfb_mode_config_funcs; | |
9f19fd3b | 246 | drm->mode_config.helper_private = &mxsfb_mode_config_helpers; |
45d59d70 MV |
247 | |
248 | drm_mode_config_reset(drm); | |
249 | ||
250 | pm_runtime_get_sync(drm->dev); | |
251 | ret = drm_irq_install(drm, platform_get_irq(pdev, 0)); | |
252 | pm_runtime_put_sync(drm->dev); | |
253 | ||
254 | if (ret < 0) { | |
255 | dev_err(drm->dev, "Failed to install IRQ handler\n"); | |
256 | goto err_irq; | |
257 | } | |
258 | ||
259 | drm_kms_helper_poll_init(drm); | |
260 | ||
45d59d70 MV |
261 | platform_set_drvdata(pdev, drm); |
262 | ||
263 | drm_helper_hpd_irq_event(drm); | |
264 | ||
265 | return 0; | |
266 | ||
45d59d70 MV |
267 | err_irq: |
268 | drm_panel_detach(mxsfb->panel); | |
269 | err_vblank: | |
270 | pm_runtime_disable(drm->dev); | |
271 | ||
272 | return ret; | |
273 | } | |
274 | ||
275 | static void mxsfb_unload(struct drm_device *drm) | |
276 | { | |
45d59d70 MV |
277 | drm_kms_helper_poll_fini(drm); |
278 | drm_mode_config_cleanup(drm); | |
45d59d70 MV |
279 | |
280 | pm_runtime_get_sync(drm->dev); | |
281 | drm_irq_uninstall(drm); | |
282 | pm_runtime_put_sync(drm->dev); | |
283 | ||
284 | drm->dev_private = NULL; | |
285 | ||
286 | pm_runtime_disable(drm->dev); | |
287 | } | |
288 | ||
989c48e6 | 289 | static void mxsfb_irq_preinstall(struct drm_device *drm) |
45d59d70 MV |
290 | { |
291 | struct mxsfb_drm_private *mxsfb = drm->dev_private; | |
292 | ||
989c48e6 | 293 | mxsfb_pipe_disable_vblank(&mxsfb->pipe); |
45d59d70 MV |
294 | } |
295 | ||
296 | static irqreturn_t mxsfb_irq_handler(int irq, void *data) | |
297 | { | |
298 | struct drm_device *drm = data; | |
299 | struct mxsfb_drm_private *mxsfb = drm->dev_private; | |
300 | u32 reg; | |
301 | ||
302 | mxsfb_enable_axi_clk(mxsfb); | |
303 | ||
304 | reg = readl(mxsfb->base + LCDC_CTRL1); | |
305 | ||
306 | if (reg & CTRL1_CUR_FRAME_DONE_IRQ) | |
307 | drm_crtc_handle_vblank(&mxsfb->pipe.crtc); | |
308 | ||
309 | writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); | |
310 | ||
311 | mxsfb_disable_axi_clk(mxsfb); | |
312 | ||
313 | return IRQ_HANDLED; | |
314 | } | |
315 | ||
d55f7e5d | 316 | DEFINE_DRM_GEM_CMA_FOPS(fops); |
45d59d70 MV |
317 | |
318 | static struct drm_driver mxsfb_driver = { | |
0424fdaf | 319 | .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, |
45d59d70 MV |
320 | .irq_handler = mxsfb_irq_handler, |
321 | .irq_preinstall = mxsfb_irq_preinstall, | |
322 | .irq_uninstall = mxsfb_irq_preinstall, | |
572b7bc0 | 323 | .gem_free_object_unlocked = drm_gem_cma_free_object, |
45d59d70 MV |
324 | .gem_vm_ops = &drm_gem_cma_vm_ops, |
325 | .dumb_create = drm_gem_cma_dumb_create, | |
45d59d70 MV |
326 | .prime_handle_to_fd = drm_gem_prime_handle_to_fd, |
327 | .prime_fd_to_handle = drm_gem_prime_fd_to_handle, | |
45d59d70 MV |
328 | .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table, |
329 | .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table, | |
330 | .gem_prime_vmap = drm_gem_cma_prime_vmap, | |
331 | .gem_prime_vunmap = drm_gem_cma_prime_vunmap, | |
332 | .gem_prime_mmap = drm_gem_cma_prime_mmap, | |
333 | .fops = &fops, | |
334 | .name = "mxsfb-drm", | |
335 | .desc = "MXSFB Controller DRM", | |
336 | .date = "20160824", | |
337 | .major = 1, | |
338 | .minor = 0, | |
339 | }; | |
340 | ||
341 | static const struct platform_device_id mxsfb_devtype[] = { | |
342 | { .name = "imx23-fb", .driver_data = MXSFB_V3, }, | |
343 | { .name = "imx28-fb", .driver_data = MXSFB_V4, }, | |
344 | { .name = "imx6sx-fb", .driver_data = MXSFB_V4, }, | |
345 | { /* sentinel */ } | |
346 | }; | |
347 | MODULE_DEVICE_TABLE(platform, mxsfb_devtype); | |
348 | ||
349 | static const struct of_device_id mxsfb_dt_ids[] = { | |
350 | { .compatible = "fsl,imx23-lcdif", .data = &mxsfb_devtype[0], }, | |
351 | { .compatible = "fsl,imx28-lcdif", .data = &mxsfb_devtype[1], }, | |
352 | { .compatible = "fsl,imx6sx-lcdif", .data = &mxsfb_devtype[2], }, | |
353 | { /* sentinel */ } | |
354 | }; | |
355 | MODULE_DEVICE_TABLE(of, mxsfb_dt_ids); | |
356 | ||
357 | static int mxsfb_probe(struct platform_device *pdev) | |
358 | { | |
359 | struct drm_device *drm; | |
360 | const struct of_device_id *of_id = | |
361 | of_match_device(mxsfb_dt_ids, &pdev->dev); | |
362 | int ret; | |
363 | ||
364 | if (!pdev->dev.of_node) | |
365 | return -ENODEV; | |
366 | ||
367 | if (of_id) | |
368 | pdev->id_entry = of_id->data; | |
369 | ||
370 | drm = drm_dev_alloc(&mxsfb_driver, &pdev->dev); | |
e89e50ac DC |
371 | if (IS_ERR(drm)) |
372 | return PTR_ERR(drm); | |
45d59d70 MV |
373 | |
374 | ret = mxsfb_load(drm, 0); | |
375 | if (ret) | |
376 | goto err_free; | |
377 | ||
378 | ret = drm_dev_register(drm, 0); | |
379 | if (ret) | |
380 | goto err_unload; | |
381 | ||
8e93f102 NT |
382 | drm_fbdev_generic_setup(drm, 32); |
383 | ||
45d59d70 MV |
384 | return 0; |
385 | ||
386 | err_unload: | |
387 | mxsfb_unload(drm); | |
388 | err_free: | |
808bad32 | 389 | drm_dev_put(drm); |
45d59d70 MV |
390 | |
391 | return ret; | |
392 | } | |
393 | ||
394 | static int mxsfb_remove(struct platform_device *pdev) | |
395 | { | |
396 | struct drm_device *drm = platform_get_drvdata(pdev); | |
397 | ||
398 | drm_dev_unregister(drm); | |
399 | mxsfb_unload(drm); | |
808bad32 | 400 | drm_dev_put(drm); |
45d59d70 MV |
401 | |
402 | return 0; | |
403 | } | |
404 | ||
f0525a1c LC |
405 | #ifdef CONFIG_PM_SLEEP |
406 | static int mxsfb_suspend(struct device *dev) | |
407 | { | |
408 | struct drm_device *drm = dev_get_drvdata(dev); | |
409 | ||
410 | return drm_mode_config_helper_suspend(drm); | |
411 | } | |
412 | ||
413 | static int mxsfb_resume(struct device *dev) | |
414 | { | |
415 | struct drm_device *drm = dev_get_drvdata(dev); | |
416 | ||
417 | return drm_mode_config_helper_resume(drm); | |
418 | } | |
419 | #endif | |
420 | ||
421 | static const struct dev_pm_ops mxsfb_pm_ops = { | |
422 | SET_SYSTEM_SLEEP_PM_OPS(mxsfb_suspend, mxsfb_resume) | |
423 | }; | |
424 | ||
45d59d70 MV |
425 | static struct platform_driver mxsfb_platform_driver = { |
426 | .probe = mxsfb_probe, | |
427 | .remove = mxsfb_remove, | |
428 | .id_table = mxsfb_devtype, | |
429 | .driver = { | |
430 | .name = "mxsfb", | |
431 | .of_match_table = mxsfb_dt_ids, | |
f0525a1c | 432 | .pm = &mxsfb_pm_ops, |
45d59d70 MV |
433 | }, |
434 | }; | |
435 | ||
436 | module_platform_driver(mxsfb_platform_driver); | |
437 | ||
438 | MODULE_AUTHOR("Marek Vasut <marex@denx.de>"); | |
439 | MODULE_DESCRIPTION("Freescale MXS DRM/KMS driver"); | |
440 | MODULE_LICENSE("GPL"); |