Commit | Line | Data |
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c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
45d59d70 MV |
2 | /* |
3 | * Copyright (C) 2016 Marek Vasut <marex@denx.de> | |
4 | * | |
5 | * This code is based on drivers/video/fbdev/mxsfb.c : | |
6 | * Copyright (C) 2010 Juergen Beisert, Pengutronix | |
7 | * Copyright (C) 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved. | |
8 | * Copyright (C) 2008 Embedded Alley Solutions, Inc All Rights Reserved. | |
45d59d70 MV |
9 | */ |
10 | ||
45d59d70 | 11 | #include <linux/clk.h> |
d5742c6c | 12 | #include <linux/dma-mapping.h> |
ae1ed009 | 13 | #include <linux/io.h> |
e1704914 | 14 | #include <linux/mod_devicetable.h> |
d5742c6c | 15 | #include <linux/module.h> |
ae1ed009 | 16 | #include <linux/platform_device.h> |
e1704914 | 17 | #include <linux/property.h> |
45d59d70 | 18 | #include <linux/pm_runtime.h> |
45d59d70 | 19 | |
45d59d70 | 20 | #include <drm/drm_atomic_helper.h> |
ae1ed009 LP |
21 | #include <drm/drm_bridge.h> |
22 | #include <drm/drm_connector.h> | |
d5742c6c | 23 | #include <drm/drm_drv.h> |
5fe96f6a | 24 | #include <drm/drm_fbdev_dma.h> |
d5a0c816 | 25 | #include <drm/drm_fourcc.h> |
4a83c26a | 26 | #include <drm/drm_gem_dma_helper.h> |
98f3eac5 | 27 | #include <drm/drm_gem_framebuffer_helper.h> |
ae1ed009 | 28 | #include <drm/drm_mode_config.h> |
d405054d | 29 | #include <drm/drm_module.h> |
45d59d70 | 30 | #include <drm/drm_of.h> |
fcd70cd3 | 31 | #include <drm/drm_probe_helper.h> |
d5742c6c | 32 | #include <drm/drm_vblank.h> |
45d59d70 MV |
33 | |
34 | #include "mxsfb_drv.h" | |
35 | #include "mxsfb_regs.h" | |
36 | ||
37 | enum mxsfb_devtype { | |
38 | MXSFB_V3, | |
39 | MXSFB_V4, | |
f6d94e71 LP |
40 | /* |
41 | * Starting at i.MX6 the hardware version register is gone, use the | |
42 | * i.MX family number as the version. | |
43 | */ | |
44 | MXSFB_V6, | |
45d59d70 MV |
45 | }; |
46 | ||
47 | static const struct mxsfb_devdata mxsfb_devdata[] = { | |
48 | [MXSFB_V3] = { | |
49 | .transfer_count = LCDC_V3_TRANSFER_COUNT, | |
50 | .cur_buf = LCDC_V3_CUR_BUF, | |
51 | .next_buf = LCDC_V3_NEXT_BUF, | |
45d59d70 MV |
52 | .hs_wdth_mask = 0xff, |
53 | .hs_wdth_shift = 24, | |
63aa581c | 54 | .has_overlay = false, |
9891cb54 | 55 | .has_ctrl2 = false, |
05ecc678 | 56 | .has_crc32 = false, |
45d59d70 MV |
57 | }, |
58 | [MXSFB_V4] = { | |
59 | .transfer_count = LCDC_V4_TRANSFER_COUNT, | |
60 | .cur_buf = LCDC_V4_CUR_BUF, | |
61 | .next_buf = LCDC_V4_NEXT_BUF, | |
45d59d70 MV |
62 | .hs_wdth_mask = 0x3fff, |
63 | .hs_wdth_shift = 18, | |
63aa581c | 64 | .has_overlay = false, |
9891cb54 | 65 | .has_ctrl2 = true, |
05ecc678 | 66 | .has_crc32 = true, |
45d59d70 | 67 | }, |
f6d94e71 LP |
68 | [MXSFB_V6] = { |
69 | .transfer_count = LCDC_V4_TRANSFER_COUNT, | |
70 | .cur_buf = LCDC_V4_CUR_BUF, | |
71 | .next_buf = LCDC_V4_NEXT_BUF, | |
72 | .hs_wdth_mask = 0x3fff, | |
73 | .hs_wdth_shift = 18, | |
63aa581c | 74 | .has_overlay = true, |
9891cb54 | 75 | .has_ctrl2 = true, |
05ecc678 | 76 | .has_crc32 = true, |
f6d94e71 | 77 | }, |
45d59d70 MV |
78 | }; |
79 | ||
45d59d70 MV |
80 | void mxsfb_enable_axi_clk(struct mxsfb_drm_private *mxsfb) |
81 | { | |
6d6defd4 | 82 | clk_prepare_enable(mxsfb->clk_axi); |
45d59d70 MV |
83 | } |
84 | ||
85 | void mxsfb_disable_axi_clk(struct mxsfb_drm_private *mxsfb) | |
86 | { | |
6d6defd4 | 87 | clk_disable_unprepare(mxsfb->clk_axi); |
45d59d70 MV |
88 | } |
89 | ||
d5a0c816 SA |
90 | static struct drm_framebuffer * |
91 | mxsfb_fb_create(struct drm_device *dev, struct drm_file *file_priv, | |
92 | const struct drm_mode_fb_cmd2 *mode_cmd) | |
93 | { | |
94 | const struct drm_format_info *info; | |
95 | ||
96 | info = drm_get_format_info(dev, mode_cmd); | |
97 | if (!info) | |
98 | return ERR_PTR(-EINVAL); | |
99 | ||
100 | if (mode_cmd->width * info->cpp[0] != mode_cmd->pitches[0]) { | |
101 | dev_dbg(dev->dev, "Invalid pitch: fb width must match pitch\n"); | |
102 | return ERR_PTR(-EINVAL); | |
103 | } | |
104 | ||
105 | return drm_gem_fb_create(dev, file_priv, mode_cmd); | |
106 | } | |
107 | ||
45d59d70 | 108 | static const struct drm_mode_config_funcs mxsfb_mode_config_funcs = { |
d5a0c816 | 109 | .fb_create = mxsfb_fb_create, |
45d59d70 MV |
110 | .atomic_check = drm_atomic_helper_check, |
111 | .atomic_commit = drm_atomic_helper_commit, | |
112 | }; | |
113 | ||
9f19fd3b LC |
114 | static const struct drm_mode_config_helper_funcs mxsfb_mode_config_helpers = { |
115 | .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm, | |
116 | }; | |
117 | ||
c42001e3 LP |
118 | static int mxsfb_attach_bridge(struct mxsfb_drm_private *mxsfb) |
119 | { | |
120 | struct drm_device *drm = mxsfb->drm; | |
121 | struct drm_connector_list_iter iter; | |
122 | struct drm_panel *panel; | |
123 | struct drm_bridge *bridge; | |
124 | int ret; | |
125 | ||
126 | ret = drm_of_find_panel_or_bridge(drm->dev->of_node, 0, 0, &panel, | |
127 | &bridge); | |
128 | if (ret) | |
129 | return ret; | |
130 | ||
131 | if (panel) { | |
132 | bridge = devm_drm_panel_bridge_add_typed(drm->dev, panel, | |
133 | DRM_MODE_CONNECTOR_DPI); | |
134 | if (IS_ERR(bridge)) | |
135 | return PTR_ERR(bridge); | |
136 | } | |
137 | ||
138 | if (!bridge) | |
139 | return -ENODEV; | |
140 | ||
ae1ed009 | 141 | ret = drm_bridge_attach(&mxsfb->encoder, bridge, NULL, 0); |
ee46d16d GG |
142 | if (ret) |
143 | return dev_err_probe(drm->dev, ret, "Failed to attach bridge\n"); | |
c42001e3 LP |
144 | |
145 | mxsfb->bridge = bridge; | |
146 | ||
147 | /* | |
148 | * Get hold of the connector. This is a bit of a hack, until the bridge | |
149 | * API gives us bus flags and formats. | |
150 | */ | |
151 | drm_connector_list_iter_begin(drm, &iter); | |
152 | mxsfb->connector = drm_connector_list_iter_next(&iter); | |
153 | drm_connector_list_iter_end(&iter); | |
154 | ||
155 | return 0; | |
156 | } | |
157 | ||
5fc40f41 TZ |
158 | static irqreturn_t mxsfb_irq_handler(int irq, void *data) |
159 | { | |
160 | struct drm_device *drm = data; | |
161 | struct mxsfb_drm_private *mxsfb = drm->dev_private; | |
05ecc678 MV |
162 | u32 reg, crc; |
163 | u64 vbc; | |
5fc40f41 TZ |
164 | |
165 | reg = readl(mxsfb->base + LCDC_CTRL1); | |
166 | ||
05ecc678 | 167 | if (reg & CTRL1_CUR_FRAME_DONE_IRQ) { |
5fc40f41 | 168 | drm_crtc_handle_vblank(&mxsfb->crtc); |
05ecc678 MV |
169 | if (mxsfb->crc_active) { |
170 | crc = readl(mxsfb->base + LCDC_V4_CRC_STAT); | |
171 | vbc = drm_crtc_accurate_vblank_count(&mxsfb->crtc); | |
172 | drm_crtc_add_crc_entry(&mxsfb->crtc, true, vbc, &crc); | |
173 | } | |
174 | } | |
5fc40f41 TZ |
175 | |
176 | writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); | |
177 | ||
178 | return IRQ_HANDLED; | |
179 | } | |
180 | ||
181 | static void mxsfb_irq_disable(struct drm_device *drm) | |
182 | { | |
183 | struct mxsfb_drm_private *mxsfb = drm->dev_private; | |
184 | ||
185 | mxsfb_enable_axi_clk(mxsfb); | |
3cfc1830 MV |
186 | |
187 | /* Disable and clear VBLANK IRQ */ | |
188 | writel(CTRL1_CUR_FRAME_DONE_IRQ_EN, mxsfb->base + LCDC_CTRL1 + REG_CLR); | |
189 | writel(CTRL1_CUR_FRAME_DONE_IRQ, mxsfb->base + LCDC_CTRL1 + REG_CLR); | |
190 | ||
5fc40f41 TZ |
191 | mxsfb_disable_axi_clk(mxsfb); |
192 | } | |
193 | ||
194 | static int mxsfb_irq_install(struct drm_device *dev, int irq) | |
195 | { | |
196 | if (irq == IRQ_NOTCONNECTED) | |
197 | return -ENOTCONN; | |
198 | ||
199 | mxsfb_irq_disable(dev); | |
200 | ||
201 | return request_irq(irq, mxsfb_irq_handler, 0, dev->driver->name, dev); | |
202 | } | |
203 | ||
204 | static void mxsfb_irq_uninstall(struct drm_device *dev) | |
205 | { | |
206 | struct mxsfb_drm_private *mxsfb = dev->dev_private; | |
207 | ||
208 | mxsfb_irq_disable(dev); | |
209 | free_irq(mxsfb->irq, dev); | |
210 | } | |
211 | ||
c6ddee82 LP |
212 | static int mxsfb_load(struct drm_device *drm, |
213 | const struct mxsfb_devdata *devdata) | |
45d59d70 MV |
214 | { |
215 | struct platform_device *pdev = to_platform_device(drm->dev); | |
216 | struct mxsfb_drm_private *mxsfb; | |
217 | struct resource *res; | |
218 | int ret; | |
219 | ||
220 | mxsfb = devm_kzalloc(&pdev->dev, sizeof(*mxsfb), GFP_KERNEL); | |
221 | if (!mxsfb) | |
222 | return -ENOMEM; | |
223 | ||
c42001e3 | 224 | mxsfb->drm = drm; |
45d59d70 | 225 | drm->dev_private = mxsfb; |
c6ddee82 | 226 | mxsfb->devdata = devdata; |
45d59d70 MV |
227 | |
228 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
229 | mxsfb->base = devm_ioremap_resource(drm->dev, res); | |
230 | if (IS_ERR(mxsfb->base)) | |
231 | return PTR_ERR(mxsfb->base); | |
232 | ||
233 | mxsfb->clk = devm_clk_get(drm->dev, NULL); | |
234 | if (IS_ERR(mxsfb->clk)) | |
235 | return PTR_ERR(mxsfb->clk); | |
236 | ||
6d6defd4 | 237 | mxsfb->clk_axi = devm_clk_get_optional(drm->dev, "axi"); |
45d59d70 | 238 | if (IS_ERR(mxsfb->clk_axi)) |
6d6defd4 | 239 | return PTR_ERR(mxsfb->clk_axi); |
45d59d70 MV |
240 | |
241 | mxsfb->clk_disp_axi = devm_clk_get(drm->dev, "disp_axi"); | |
242 | if (IS_ERR(mxsfb->clk_disp_axi)) | |
243 | mxsfb->clk_disp_axi = NULL; | |
244 | ||
245 | ret = dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(32)); | |
246 | if (ret) | |
247 | return ret; | |
248 | ||
249 | pm_runtime_enable(drm->dev); | |
250 | ||
45d59d70 MV |
251 | /* Modeset init */ |
252 | drm_mode_config_init(drm); | |
253 | ||
ae1ed009 | 254 | ret = mxsfb_kms_init(mxsfb); |
45d59d70 | 255 | if (ret < 0) { |
ae1ed009 | 256 | dev_err(drm->dev, "Failed to initialize KMS pipeline\n"); |
45d59d70 MV |
257 | goto err_vblank; |
258 | } | |
259 | ||
b9f59376 LP |
260 | ret = drm_vblank_init(drm, drm->mode_config.num_crtc); |
261 | if (ret < 0) { | |
262 | dev_err(drm->dev, "Failed to initialise vblank\n"); | |
263 | goto err_vblank; | |
264 | } | |
265 | ||
266 | /* Start with vertical blanking interrupt reporting disabled. */ | |
267 | drm_crtc_vblank_off(&mxsfb->crtc); | |
268 | ||
c42001e3 LP |
269 | ret = mxsfb_attach_bridge(mxsfb); |
270 | if (ret) { | |
c5e804ba | 271 | dev_err_probe(drm->dev, ret, "Cannot connect bridge\n"); |
c42001e3 | 272 | goto err_vblank; |
45d59d70 MV |
273 | } |
274 | ||
275 | drm->mode_config.min_width = MXSFB_MIN_XRES; | |
276 | drm->mode_config.min_height = MXSFB_MIN_YRES; | |
277 | drm->mode_config.max_width = MXSFB_MAX_XRES; | |
278 | drm->mode_config.max_height = MXSFB_MAX_YRES; | |
279 | drm->mode_config.funcs = &mxsfb_mode_config_funcs; | |
9f19fd3b | 280 | drm->mode_config.helper_private = &mxsfb_mode_config_helpers; |
45d59d70 MV |
281 | |
282 | drm_mode_config_reset(drm); | |
283 | ||
5fc40f41 TZ |
284 | ret = platform_get_irq(pdev, 0); |
285 | if (ret < 0) | |
286 | goto err_vblank; | |
287 | mxsfb->irq = ret; | |
288 | ||
45d59d70 | 289 | pm_runtime_get_sync(drm->dev); |
5fc40f41 | 290 | ret = mxsfb_irq_install(drm, mxsfb->irq); |
45d59d70 MV |
291 | pm_runtime_put_sync(drm->dev); |
292 | ||
293 | if (ret < 0) { | |
294 | dev_err(drm->dev, "Failed to install IRQ handler\n"); | |
c42001e3 | 295 | goto err_vblank; |
45d59d70 MV |
296 | } |
297 | ||
298 | drm_kms_helper_poll_init(drm); | |
299 | ||
45d59d70 MV |
300 | platform_set_drvdata(pdev, drm); |
301 | ||
302 | drm_helper_hpd_irq_event(drm); | |
303 | ||
304 | return 0; | |
305 | ||
45d59d70 MV |
306 | err_vblank: |
307 | pm_runtime_disable(drm->dev); | |
308 | ||
309 | return ret; | |
310 | } | |
311 | ||
312 | static void mxsfb_unload(struct drm_device *drm) | |
313 | { | |
45d59d70 MV |
314 | drm_kms_helper_poll_fini(drm); |
315 | drm_mode_config_cleanup(drm); | |
45d59d70 MV |
316 | |
317 | pm_runtime_get_sync(drm->dev); | |
5fc40f41 | 318 | mxsfb_irq_uninstall(drm); |
45d59d70 MV |
319 | pm_runtime_put_sync(drm->dev); |
320 | ||
321 | drm->dev_private = NULL; | |
322 | ||
323 | pm_runtime_disable(drm->dev); | |
324 | } | |
325 | ||
4a83c26a | 326 | DEFINE_DRM_GEM_DMA_FOPS(fops); |
45d59d70 | 327 | |
70a59dd8 | 328 | static const struct drm_driver mxsfb_driver = { |
0424fdaf | 329 | .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC, |
4a83c26a | 330 | DRM_GEM_DMA_DRIVER_OPS, |
45d59d70 MV |
331 | .fops = &fops, |
332 | .name = "mxsfb-drm", | |
333 | .desc = "MXSFB Controller DRM", | |
334 | .date = "20160824", | |
335 | .major = 1, | |
336 | .minor = 0, | |
337 | }; | |
338 | ||
45d59d70 | 339 | static const struct of_device_id mxsfb_dt_ids[] = { |
c6ddee82 LP |
340 | { .compatible = "fsl,imx23-lcdif", .data = &mxsfb_devdata[MXSFB_V3], }, |
341 | { .compatible = "fsl,imx28-lcdif", .data = &mxsfb_devdata[MXSFB_V4], }, | |
342 | { .compatible = "fsl,imx6sx-lcdif", .data = &mxsfb_devdata[MXSFB_V6], }, | |
45d59d70 MV |
343 | { /* sentinel */ } |
344 | }; | |
345 | MODULE_DEVICE_TABLE(of, mxsfb_dt_ids); | |
346 | ||
347 | static int mxsfb_probe(struct platform_device *pdev) | |
348 | { | |
349 | struct drm_device *drm; | |
45d59d70 MV |
350 | int ret; |
351 | ||
45d59d70 | 352 | drm = drm_dev_alloc(&mxsfb_driver, &pdev->dev); |
e89e50ac DC |
353 | if (IS_ERR(drm)) |
354 | return PTR_ERR(drm); | |
45d59d70 | 355 | |
e1704914 | 356 | ret = mxsfb_load(drm, device_get_match_data(&pdev->dev)); |
45d59d70 MV |
357 | if (ret) |
358 | goto err_free; | |
359 | ||
360 | ret = drm_dev_register(drm, 0); | |
361 | if (ret) | |
362 | goto err_unload; | |
363 | ||
5fe96f6a | 364 | drm_fbdev_dma_setup(drm, 32); |
8e93f102 | 365 | |
45d59d70 MV |
366 | return 0; |
367 | ||
368 | err_unload: | |
369 | mxsfb_unload(drm); | |
370 | err_free: | |
808bad32 | 371 | drm_dev_put(drm); |
45d59d70 MV |
372 | |
373 | return ret; | |
374 | } | |
375 | ||
bd296a59 | 376 | static void mxsfb_remove(struct platform_device *pdev) |
45d59d70 MV |
377 | { |
378 | struct drm_device *drm = platform_get_drvdata(pdev); | |
379 | ||
380 | drm_dev_unregister(drm); | |
72f6c033 | 381 | drm_atomic_helper_shutdown(drm); |
45d59d70 | 382 | mxsfb_unload(drm); |
808bad32 | 383 | drm_dev_put(drm); |
45d59d70 MV |
384 | } |
385 | ||
653af51c MV |
386 | static void mxsfb_shutdown(struct platform_device *pdev) |
387 | { | |
388 | struct drm_device *drm = platform_get_drvdata(pdev); | |
389 | ||
390 | drm_atomic_helper_shutdown(drm); | |
391 | } | |
392 | ||
f0525a1c LC |
393 | #ifdef CONFIG_PM_SLEEP |
394 | static int mxsfb_suspend(struct device *dev) | |
395 | { | |
396 | struct drm_device *drm = dev_get_drvdata(dev); | |
397 | ||
398 | return drm_mode_config_helper_suspend(drm); | |
399 | } | |
400 | ||
401 | static int mxsfb_resume(struct device *dev) | |
402 | { | |
403 | struct drm_device *drm = dev_get_drvdata(dev); | |
404 | ||
405 | return drm_mode_config_helper_resume(drm); | |
406 | } | |
407 | #endif | |
408 | ||
409 | static const struct dev_pm_ops mxsfb_pm_ops = { | |
410 | SET_SYSTEM_SLEEP_PM_OPS(mxsfb_suspend, mxsfb_resume) | |
411 | }; | |
412 | ||
45d59d70 MV |
413 | static struct platform_driver mxsfb_platform_driver = { |
414 | .probe = mxsfb_probe, | |
bd296a59 | 415 | .remove_new = mxsfb_remove, |
653af51c | 416 | .shutdown = mxsfb_shutdown, |
45d59d70 MV |
417 | .driver = { |
418 | .name = "mxsfb", | |
419 | .of_match_table = mxsfb_dt_ids, | |
f0525a1c | 420 | .pm = &mxsfb_pm_ops, |
45d59d70 MV |
421 | }, |
422 | }; | |
423 | ||
d405054d | 424 | drm_module_platform_driver(mxsfb_platform_driver); |
45d59d70 MV |
425 | |
426 | MODULE_AUTHOR("Marek Vasut <marex@denx.de>"); | |
427 | MODULE_DESCRIPTION("Freescale MXS DRM/KMS driver"); | |
428 | MODULE_LICENSE("GPL"); |