treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 234
[linux-2.6-block.git] / drivers / gpu / drm / msm / msm_rd.c
CommitLineData
caab277b 1// SPDX-License-Identifier: GPL-2.0-only
a7d3c950
RC
2/*
3 * Copyright (C) 2013 Red Hat
4 * Author: Rob Clark <robdclark@gmail.com>
a7d3c950
RC
5 */
6
7/* For debugging crashes, userspace can:
8 *
9 * tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd
10 *
2165e2b9 11 * to log the cmdstream in a format that is understood by freedreno/cffdump
a7d3c950
RC
12 * utility. By comparing the last successfully completed fence #, to the
13 * cmdstream for the next fence, you can narrow down which process and submit
14 * caused the gpu crash/lockup.
15 *
2165e2b9
RC
16 * Additionally:
17 *
18 * tail -f /sys/kernel/debug/dri/<minor>/hangrd > logfile.rd
19 *
20 * will capture just the cmdstream from submits which triggered a GPU hang.
21 *
a7d3c950
RC
22 * This bypasses drm_debugfs_create_files() mainly because we need to use
23 * our own fops for a bit more control. In particular, we don't want to
24 * do anything if userspace doesn't have the debugfs file open.
79c21187
RC
25 *
26 * The module-param "rd_full", which defaults to false, enables snapshotting
27 * all (non-written) buffers in the submit, rather than just cmdstream bo's.
28 * This is useful to capture the contents of (for example) vbo's or textures,
29 * or shader programs (if not emitted inline in cmdstream).
a7d3c950
RC
30 */
31
32#ifdef CONFIG_DEBUG_FS
33
34#include <linux/kfifo.h>
35#include <linux/debugfs.h>
36#include <linux/circ_buf.h>
37#include <linux/wait.h>
38
39#include "msm_drv.h"
40#include "msm_gpu.h"
41#include "msm_gem.h"
42
79c21187
RC
43static bool rd_full = false;
44MODULE_PARM_DESC(rd_full, "If true, $debugfs/.../rd will snapshot all buffer contents");
45module_param_named(rd_full, rd_full, bool, 0600);
46
a7d3c950
RC
47enum rd_sect_type {
48 RD_NONE,
49 RD_TEST, /* ascii text */
50 RD_CMD, /* ascii text */
51 RD_GPUADDR, /* u32 gpuaddr, u32 size */
52 RD_CONTEXT, /* raw dump */
53 RD_CMDSTREAM, /* raw dump */
54 RD_CMDSTREAM_ADDR, /* gpu addr of cmdstream */
55 RD_PARAM, /* u32 param_type, u32 param_val, u32 bitlen */
56 RD_FLUSH, /* empty, clear previous params */
57 RD_PROGRAM, /* shader program, raw dump */
58 RD_VERT_SHADER,
59 RD_FRAG_SHADER,
60 RD_BUFFER_CONTENTS,
61 RD_GPU_ID,
62};
63
64#define BUF_SZ 512 /* should be power of 2 */
65
66/* space used: */
67#define circ_count(circ) \
68 (CIRC_CNT((circ)->head, (circ)->tail, BUF_SZ))
69#define circ_count_to_end(circ) \
70 (CIRC_CNT_TO_END((circ)->head, (circ)->tail, BUF_SZ))
71/* space available: */
72#define circ_space(circ) \
73 (CIRC_SPACE((circ)->head, (circ)->tail, BUF_SZ))
74#define circ_space_to_end(circ) \
75 (CIRC_SPACE_TO_END((circ)->head, (circ)->tail, BUF_SZ))
76
77struct msm_rd_state {
78 struct drm_device *dev;
79
80 bool open;
81
a7d3c950
RC
82 /* current submit to read out: */
83 struct msm_gem_submit *submit;
84
85 /* fifo access is synchronized on the producer side by
86 * struct_mutex held by submit code (otherwise we could
87 * end up w/ cmds logged in different order than they
88 * were executed). And read_lock synchronizes the reads
89 */
90 struct mutex read_lock;
91
92 wait_queue_head_t fifo_event;
93 struct circ_buf fifo;
94
95 char buf[BUF_SZ];
96};
97
98static void rd_write(struct msm_rd_state *rd, const void *buf, int sz)
99{
100 struct circ_buf *fifo = &rd->fifo;
101 const char *ptr = buf;
102
103 while (sz > 0) {
104 char *fptr = &fifo->buf[fifo->head];
105 int n;
106
99c66bc0
KK
107 wait_event(rd->fifo_event, circ_space(&rd->fifo) > 0 || !rd->open);
108 if (!rd->open)
109 return;
a7d3c950 110
f44001e2
RC
111 /* Note that smp_load_acquire() is not strictly required
112 * as CIRC_SPACE_TO_END() does not access the tail more
113 * than once.
114 */
a7d3c950
RC
115 n = min(sz, circ_space_to_end(&rd->fifo));
116 memcpy(fptr, ptr, n);
117
f44001e2 118 smp_store_release(&fifo->head, (fifo->head + n) & (BUF_SZ - 1));
a7d3c950
RC
119 sz -= n;
120 ptr += n;
121
122 wake_up_all(&rd->fifo_event);
123 }
124}
125
126static void rd_write_section(struct msm_rd_state *rd,
127 enum rd_sect_type type, const void *buf, int sz)
128{
129 rd_write(rd, &type, 4);
130 rd_write(rd, &sz, 4);
131 rd_write(rd, buf, sz);
132}
133
134static ssize_t rd_read(struct file *file, char __user *buf,
135 size_t sz, loff_t *ppos)
136{
137 struct msm_rd_state *rd = file->private_data;
138 struct circ_buf *fifo = &rd->fifo;
139 const char *fptr = &fifo->buf[fifo->tail];
140 int n = 0, ret = 0;
141
142 mutex_lock(&rd->read_lock);
143
144 ret = wait_event_interruptible(rd->fifo_event,
145 circ_count(&rd->fifo) > 0);
146 if (ret)
147 goto out;
148
f44001e2
RC
149 /* Note that smp_load_acquire() is not strictly required
150 * as CIRC_CNT_TO_END() does not access the head more than
151 * once.
152 */
a7d3c950 153 n = min_t(int, sz, circ_count_to_end(&rd->fifo));
5745d21f
DC
154 if (copy_to_user(buf, fptr, n)) {
155 ret = -EFAULT;
a7d3c950 156 goto out;
5745d21f 157 }
a7d3c950 158
f44001e2 159 smp_store_release(&fifo->tail, (fifo->tail + n) & (BUF_SZ - 1));
a7d3c950
RC
160 *ppos += n;
161
162 wake_up_all(&rd->fifo_event);
163
164out:
165 mutex_unlock(&rd->read_lock);
166 if (ret)
167 return ret;
168 return n;
169}
170
171static int rd_open(struct inode *inode, struct file *file)
172{
173 struct msm_rd_state *rd = inode->i_private;
174 struct drm_device *dev = rd->dev;
175 struct msm_drm_private *priv = dev->dev_private;
176 struct msm_gpu *gpu = priv->gpu;
177 uint64_t val;
178 uint32_t gpu_id;
179 int ret = 0;
180
181 mutex_lock(&dev->struct_mutex);
182
183 if (rd->open || !gpu) {
184 ret = -EBUSY;
185 goto out;
186 }
187
188 file->private_data = rd;
189 rd->open = true;
190
191 /* the parsing tools need to know gpu-id to know which
192 * register database to load.
193 */
194 gpu->funcs->get_param(gpu, MSM_PARAM_GPU_ID, &val);
195 gpu_id = val;
196
197 rd_write_section(rd, RD_GPU_ID, &gpu_id, sizeof(gpu_id));
198
199out:
200 mutex_unlock(&dev->struct_mutex);
201 return ret;
202}
203
204static int rd_release(struct inode *inode, struct file *file)
205{
206 struct msm_rd_state *rd = inode->i_private;
99c66bc0 207
a7d3c950 208 rd->open = false;
99c66bc0
KK
209 wake_up_all(&rd->fifo_event);
210
a7d3c950
RC
211 return 0;
212}
213
214
215static const struct file_operations rd_debugfs_fops = {
216 .owner = THIS_MODULE,
217 .open = rd_open,
218 .read = rd_read,
219 .llseek = no_llseek,
220 .release = rd_release,
221};
222
2165e2b9
RC
223
224static void rd_cleanup(struct msm_rd_state *rd)
225{
226 if (!rd)
227 return;
228
229 mutex_destroy(&rd->read_lock);
230 kfree(rd);
231}
232
233static struct msm_rd_state *rd_init(struct drm_minor *minor, const char *name)
a7d3c950 234{
a7d3c950 235 struct msm_rd_state *rd;
81895b54 236 struct dentry *ent;
2165e2b9 237 int ret = 0;
a7d3c950
RC
238
239 rd = kzalloc(sizeof(*rd), GFP_KERNEL);
240 if (!rd)
2165e2b9 241 return ERR_PTR(-ENOMEM);
a7d3c950
RC
242
243 rd->dev = minor->dev;
244 rd->fifo.buf = rd->buf;
245
246 mutex_init(&rd->read_lock);
a7d3c950
RC
247
248 init_waitqueue_head(&rd->fifo_event);
249
2165e2b9 250 ent = debugfs_create_file(name, S_IFREG | S_IRUGO,
a7d3c950 251 minor->debugfs_root, rd, &rd_debugfs_fops);
81895b54 252 if (!ent) {
2165e2b9
RC
253 DRM_ERROR("Cannot create /sys/kernel/debug/dri/%pd/%s\n",
254 minor->debugfs_root, name);
255 ret = -ENOMEM;
a7d3c950
RC
256 goto fail;
257 }
258
2165e2b9
RC
259 return rd;
260
261fail:
262 rd_cleanup(rd);
263 return ERR_PTR(ret);
264}
265
266int msm_rd_debugfs_init(struct drm_minor *minor)
267{
268 struct msm_drm_private *priv = minor->dev->dev_private;
269 struct msm_rd_state *rd;
270 int ret;
271
272 /* only create on first minor: */
273 if (priv->rd)
274 return 0;
275
276 rd = rd_init(minor, "rd");
277 if (IS_ERR(rd)) {
278 ret = PTR_ERR(rd);
279 goto fail;
280 }
281
282 priv->rd = rd;
283
284 rd = rd_init(minor, "hangrd");
285 if (IS_ERR(rd)) {
286 ret = PTR_ERR(rd);
287 goto fail;
288 }
289
290 priv->hangrd = rd;
291
a7d3c950
RC
292 return 0;
293
294fail:
85eac470 295 msm_rd_debugfs_cleanup(priv);
2165e2b9 296 return ret;
a7d3c950
RC
297}
298
85eac470 299void msm_rd_debugfs_cleanup(struct msm_drm_private *priv)
a7d3c950 300{
2165e2b9 301 rd_cleanup(priv->rd);
a7d3c950 302 priv->rd = NULL;
2165e2b9
RC
303
304 rd_cleanup(priv->hangrd);
305 priv->hangrd = NULL;
a7d3c950
RC
306}
307
6507e799
RC
308static void snapshot_buf(struct msm_rd_state *rd,
309 struct msm_gem_submit *submit, int idx,
d0651fe8 310 uint64_t iova, uint32_t size)
6507e799
RC
311{
312 struct msm_gem_object *obj = submit->bos[idx].obj;
47e7f506 313 unsigned offset = 0;
6507e799
RC
314 const char *buf;
315
79c21187 316 if (iova) {
47e7f506 317 offset = iova - submit->bos[idx].iova;
79c21187
RC
318 } else {
319 iova = submit->bos[idx].iova;
320 size = obj->base.size;
321 }
6507e799 322
78b8e5b8
JC
323 /*
324 * Always write the GPUADDR header so can get a complete list of all the
325 * buffers in the cmd
326 */
6507e799 327 rd_write_section(rd, RD_GPUADDR,
d0651fe8 328 (uint32_t[3]){ iova, size, iova >> 32 }, 12);
78b8e5b8
JC
329
330 /* But only dump the contents of buffers marked READ */
331 if (!(submit->bos[idx].flags & MSM_SUBMIT_BO_READ))
332 return;
333
fad33f4b 334 buf = msm_gem_get_vaddr_active(&obj->base);
78b8e5b8
JC
335 if (IS_ERR(buf))
336 return;
337
47e7f506
RC
338 buf += offset;
339
6507e799
RC
340 rd_write_section(rd, RD_BUFFER_CONTENTS, buf, size);
341
0e08270a 342 msm_gem_put_vaddr(&obj->base);
6507e799
RC
343}
344
7a93d5c3
RC
345static bool
346should_dump(struct msm_gem_submit *submit, int idx)
347{
348 return rd_full || (submit->bos[idx].flags & MSM_SUBMIT_BO_DUMP);
349}
350
a7d3c950 351/* called under struct_mutex */
998b9a58
RC
352void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
353 const char *fmt, ...)
a7d3c950
RC
354{
355 struct drm_device *dev = submit->dev;
2165e2b9 356 struct task_struct *task;
998b9a58 357 char msg[256];
a7d3c950
RC
358 int i, n;
359
360 if (!rd->open)
361 return;
362
363 /* writing into fifo is serialized by caller, and
364 * rd->read_lock is used to serialize the reads
365 */
366 WARN_ON(!mutex_is_locked(&dev->struct_mutex));
367
998b9a58
RC
368 if (fmt) {
369 va_list args;
370
371 va_start(args, fmt);
b689a830 372 n = vscnprintf(msg, sizeof(msg), fmt, args);
998b9a58
RC
373 va_end(args);
374
375 rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4));
376 }
377
2165e2b9
RC
378 rcu_read_lock();
379 task = pid_task(submit->pid, PIDTYPE_PID);
380 if (task) {
b689a830 381 n = scnprintf(msg, sizeof(msg), "%.*s/%d: fence=%u",
2165e2b9
RC
382 TASK_COMM_LEN, task->comm,
383 pid_nr(submit->pid), submit->seqno);
384 } else {
b689a830 385 n = scnprintf(msg, sizeof(msg), "???/%d: fence=%u",
2165e2b9
RC
386 pid_nr(submit->pid), submit->seqno);
387 }
388 rcu_read_unlock();
a7d3c950
RC
389
390 rd_write_section(rd, RD_CMD, msg, ALIGN(n, 4));
391
7a93d5c3
RC
392 for (i = 0; i < submit->nr_bos; i++)
393 if (should_dump(submit, i))
394 snapshot_buf(rd, submit, i, 0, 0);
a7d3c950
RC
395
396 for (i = 0; i < submit->nr_cmds; i++) {
22dd5c14 397 uint64_t iova = submit->cmd[i].iova;
a7d3c950 398 uint32_t szd = submit->cmd[i].size; /* in dwords */
69a834c2 399
79c21187 400 /* snapshot cmdstream bo's (if we haven't already): */
7a93d5c3 401 if (!should_dump(submit, i)) {
79c21187
RC
402 snapshot_buf(rd, submit, submit->cmd[i].idx,
403 submit->cmd[i].iova, szd * 4);
404 }
a7d3c950
RC
405
406 switch (submit->cmd[i].type) {
407 case MSM_SUBMIT_CMD_IB_TARGET_BUF:
408 /* ignore IB-targets, we've logged the buffer, the
409 * parser tool will follow the IB based on the logged
410 * buffer/gpuaddr, so nothing more to do.
411 */
412 break;
413 case MSM_SUBMIT_CMD_CTX_RESTORE_BUF:
414 case MSM_SUBMIT_CMD_BUF:
415 rd_write_section(rd, RD_CMDSTREAM_ADDR,
22dd5c14 416 (uint32_t[3]){ iova, szd, iova >> 32 }, 12);
a7d3c950
RC
417 break;
418 }
419 }
420}
421#endif